1 2007-01-04 Julian Brown <julian@codesourcery.com>
3 * arm-dis.c (neon_opcode): Fix disassembly for vshl, vqshl, vrshl,
6 2006-12-27 Kazu Hirata <kazu@codesourcery.com>
8 * m68k-dis.c (print_insn_arg): Add support for cac and mbb.
10 2006-12-27 Kazu Hirata <kazu@codesourcery.com>
12 * m68k-opc.c (m68k_opcodes): Add sleep and trapx.
14 2006-12-15 H.J. Lu <hongjiu.lu@intel.com>
16 * i386-dis.c (o_mode): New for 16-byte operand.
17 (intel_operand_size): Generate "OWORD PTR " for o_mode.
18 (CMPXCHG8B_Fixup): Set bytemode to o_mode instead of x_mode.
20 2006-12-14 H.J. Lu <hongjiu.lu@intel.com>
22 * i386-dis.c (CMPXCHG8B_Fixup): New.
23 (grps): Use CMPXCHG8B_Fixup for cmpxchg8b.
25 2006-12-11 H.J. Lu <hongjiu.lu@intel.com>
27 * i386-dis.c (Eq): Replaced by ...
29 (Ma): Defined with OP_M instead of OP_E.
30 (grps): Updated cmpxchg8b and vmptrst for Eq -> Mq.
31 (OP_M): Added bound, cmpxchg8b and vmptrst to bad modrm list.
33 2006-12-11 Daniel Jacobowitz <dan@codesourcery.com>
35 * po/Make-in (.po.gmo): Put gmo files in objdir.
37 2006-12-09 H.J. Lu <hongjiu.lu@intel.com>
39 * i386-dis.c (X86_64_1): New.
42 (dis386): Replace 0x60, 0x61 and 0x62 entries with x86-64
44 (x86_64_table): Add entries for 0x60, 0x61 and 0x62.
46 2006-12-09 H.J. Lu <hongjiu.lu@intel.com>
48 * i386-dis.c: Adjust white spaces.
50 2006-12-04 Jan Beulich <jbeulich@novell.com>
52 * i386-dis.c (OP_J): Update used_prefixes in v_mode.
54 2006-11-30 Jan Beulich <jbeulich@novell.com>
56 * i386-dis.c (SEG_Fixup): Delete.
58 (putop): New suffix character 'D'.
61 (OP_SEG): Handle bytemode other than w_mode.
63 2006-11-30 Jan Beulich <jbeulich@novell.com>
65 * i386-dis.c (zAX): New.
70 (putop): New suffix character 'G'.
71 (dis386): Use it for in, out, ins, and outs.
72 (intel_operand_size): Handle z_mode.
73 (OP_REG): Delete unreachable case indir_dx_reg.
74 (OP_IMREG): Fix Intel syntax output for case indir_dx_reg. Handle
76 (OP_ESreg): Fix Intel syntax operand size handling.
79 2006-11-30 Jan Beulich <jbeulich@novell.com>
81 * i386-dis.c (dis386): Use 'R' and 'O' for cbw/cwd unconditionally.
82 (putop): For 'O' suffix, print 'q' in Intel mode, and mark data prefix
83 used. For 'R' and 'W' suffix, simplify and fix Intel mode.
85 2006-11-29 Paul Brook <paul@codesourcery.com>
87 * arm-dis.c (coprocessor_opcodes): Fix bitfields for fconstd/fconstd.
89 2006-11-22 Daniel Jacobowitz <dan@codesourcery.com>
91 * arm-dis.c (last_is_thumb): Delete.
92 (enum map_type, last_type): New.
93 (print_insn_data): New.
94 (get_sym_code_type): Take MAP_TYPE argument. Check the type of
95 the right symbol. Handle $d.
96 (print_insn): Check for mapping symbols even without a normal
97 symbol. Adjust searching. If $d is found see how much data
98 to print. Handle data.
100 2006-11-16 Nathan Sidwell <nathan@codesourcery.com>
102 * m68k-opc.c (m68k_opcodes): Place trap instructions before set
103 conditionals. Add tpf coldfire instruction as alias for trapf.
105 2006-11-09 H.J. Lu <hongjiu.lu@intel.com>
107 * i386-dis.c (print_insn): Check PREFIX_REPNZ before
108 PREFIX_DATA when prefix user table is used.
110 2006-11-09 H.J. Lu <hongjiu.lu@intel.com>
112 * i386-dis.c (twobyte_uses_SSE_prefix): Renamed to ...
113 (twobyte_uses_DATA_prefix): This.
114 (twobyte_uses_REPNZ_prefix): New.
115 (twobyte_uses_REPZ_prefix): Likewise.
116 (threebyte_0x38_uses_DATA_prefix): Likewise.
117 (threebyte_0x38_uses_REPNZ_prefix): Likewise.
118 (threebyte_0x38_uses_REPZ_prefix): Likewise.
119 (threebyte_0x3a_uses_DATA_prefix): Likewise.
120 (threebyte_0x3a_uses_REPNZ_prefix): Likewise.
121 (threebyte_0x3a_uses_REPZ_prefix): Likewise.
122 (print_insn): Updated checking usages of DATA/REPNZ/REPZ
125 2006-11-06 Troy Rollo <troy@corvu.com.au>
127 * ppc-opc.c: Restore COM to mfcr wrongly removed 2003-07-04.
129 2006-11-01 Mei Ligang <ligang@sunnorth.com.cn>
131 * score-opc.h (score_opcodes): Delete modifier '0x'.
133 2006-10-30 Paul Brook <paul@codesourcery.com>
135 * arm-dis.c (last_is_thumb, last_mapping_sym, last_mapping_addr): New.
136 (get_sym_code_type): New function.
137 (print_insn): Search for mapping symbols.
139 2006-10-31 Mei Ligang <ligang@sunnorth.com.cn>
141 * score-dis.c (print_insn): Correct the error code to print
142 correct PCE instruction disassembly.
144 2006-10-26 Ben Elliston <bje@au.ibm.com>
145 Anton Blanchard <anton@samba.org>
146 Peter Bergner <bergner@vnet.ibm.com>
148 * ppc-opc.c (A_L, DCM, DGM, TE, RMC, R, SP, S, SH16, XRT_L, EH,
149 AFRALFRC_MASK, Z, ZRC, Z_MASK, XLRT_MASK, XEH_MASK): Define.
151 (powerpc_opcodes): Extend "lwarx", "ldarx", "dcbf", "fres", "fres.",
152 "frsqrtes", "frsqrtes." "fre", "fre.", "frsqrte" and "frsqrte.".
153 Add "doze", "nap", "sleep", "rvwinkle", "dcbfl", "prtyw", "prtyd",
154 "mfcfar", "cmpb", "lfdpx", "stfdpx", "mtcfar", "mffgpr", "mftgpr",
155 "lwzcix", "lhzcix", "lbzcix", "ldcix", "lfiwax", "stwcix", "sthcix",
156 "stbcix", "stdcix", "lfdp", "dadd", "dadd.", "dqua", "dqua.", "dmul",
157 "dmul.", "drrnd", "drrnd.", "dscli", "dscli.", "dquai", "dquai.",
158 "dscri", "dscri.", "drintx", "drintx.", "dcmpo", "dtstex", "dtstdc",
159 "dtstdg", "dtstsf", "drintn", "drintn.", "dctdp", "dctdp.", "dctfix",
160 "dctfix.", "ddedpd", "ddedpd.", "dxex", "dxex.", "dsub", "dsub.",
161 "ddiv", "ddiv.", "dcmpu", "drsp", "drsp.", "dcffix", "dcffix.",
162 "denbcd", "denbcd.", "diex", "diex.", "stfdp", "daddq", "daddq.",
163 "dquaq", "dquaq.", "fcpsgn", "fcpsgn.", "dmulq", "dmulq.",
164 "drrndq", "drrndq.", "dscliq", "dscliq.", "dquaiq", "dquaiq.",
165 "dscriq", "dscriq.", "drintxq", "drintxq.", "dcmpoq", "dtstexq",
166 "dtstdcq", "dtstdgq", "dtstsfq", "drintnq", "drintnq.",
167 "dctqpq", "dctqpq.", "dctfixq", "dctfixq.", "ddedpdq", "ddedpdq.",
168 "dxexq", "dxexq.", "dsubq", "dsubq.", "ddivq", "ddivq.", "dcmpuq",
169 "drdpq", "drdpq.", "dcffixq", "dcffixq.", "denbcdq", "denbcdq.",
170 "diexq" and "diexq." opcodes.
172 2006-10-26 Daniel Jacobowitz <dan@codesourcery.com>
174 * h8300-dis.c (bfd_h8_disassemble): Add missing consts.
176 2006-10-25 Trevor Smigiel <Trevor_Smigiel@playstation.sony.com>
177 Yukishige Shibata <shibata@rd.scei.sony.co.jp>
178 Nobuhisa Fujinami <fnami@rd.scei.sony.co.jp>
179 Takeaki Fukuoka <fukuoka@rd.scei.sony.co.jp>
180 Alan Modra <amodra@bigpond.net.au>
182 * spu-dis.c: New file.
183 * spu-opc.c: New file.
184 * configure.in: Add SPU support.
185 * disassemble.c: Likewise.
186 * Makefile.am: Likewise. Run "make dep-am".
187 * Makefile.in: Regenerate.
188 * configure: Regenerate.
189 * po/POTFILES.in: Regenerate.
191 2006-10-24 Andrew Pinski <andrew_pinski@playstation.sony.com>
193 * ppc-opc.c (CELL): New define.
194 (powerpc_opcodes): Enable hrfid for Cell. Add ldbrx and stdbrx,
195 cell specific instructions. Add {st,l}x{r,l}{,l} cell specific
197 * ppc-dis.c (powerpc_dialect): Handle cell.
199 2006-10-23 Dwarakanath Rajagopal <dwarak.rajagopal@amd.com>
201 * i386-dis.c (dis386): Add support for the change in POPCNT opcode in
202 amdfam10 architecture.
204 (print_insn): Disallow REP prefix for POPCNT.
206 2006-10-20 Andrew Stubbs <andrew.stubbs@st.com>
208 * sh-dis.c (print_insn_sh): Remove 0x from output to prevent GDB
211 2006-10-18 Dave Brolley <brolley@redhat.com>
213 * configure.in (BFD_MACHINES): Add cgen-bitset.lo for bfd_sh_arch.
214 * configure: Regenerated.
216 2006-09-29 Alan Modra <amodra@bigpond.net.au>
218 * po/POTFILES.in: Regenerate.
220 2006-09-26 Mark Shinwell <shinwell@codesourcery.com>
221 Joseph Myers <joseph@codesourcery.com>
222 Ian Lance Taylor <ian@wasabisystems.com>
223 Ben Elliston <bje@wasabisystems.com>
225 * arm-dis.c (coprocessor_opcodes): The X-qualifier to WMADD may
226 only be used with the default multiply-add operation, so if N is
227 set, don't bother printing X. Add new iwmmxt instructions.
228 (IWMMXT_INSN_COUNT): Update.
229 (iwmmxt_wwssnames): Qualify "wwss" names at index 2, 6, 10 and 14
231 (print_insn_coprocessor): Check for iWMMXt2. Handle format
234 2006-09-24 Dwarakanath Rajagopal <dwarak.rajagopal@amd.com>
237 * i386-dis.c (prefix_user_table): Fix the second operand of
238 maskmovdqu instruction to allow only %xmm register instead of
239 both %xmm register and memory.
241 2006-09-23 H.J. Lu <hongjiu.lu@intel.com>
244 * i386-dis.c (OP_OFF64): Get 32bit offset if there is an
247 2006-09-17 Mei Ligang <ligang@sunnorth.com.cn>
249 * score-dis.c: New file.
250 * score-opc.h: New file.
251 * Makefile.am: Add Score files.
252 * Makefile.in: Regenerate.
253 * configure.in: Add support for Score target.
254 * configure: Regenerate.
255 * disassemble.c: Add support for Score target.
257 2006-09-16 Nick Clifton <nickc@redhat.com>
258 Pedro Alves <pedro_alves@portugalmail.pt>
260 * arm-dis.c: Make use of new STRING_COMMA_LEN and CONST_STRNEQ
261 macros defined in bfd.h.
262 * cris-dis.c: Likewise.
263 * h8300-dis.c: Likewise.
264 * i386-dis.c: Likewise.
265 * ia64-gen.c: Likewise.
266 * mips-dis: Likewise.
268 2006-09-04 Paul Brook <paul@codesourcery.com>
270 * arm-dis.c (neon_opcode): Fix suffix on VMOVN.
272 2006-08-23 H.J. Lu <hongjiu.lu@intel.com>
274 * i386-dis.c (three_byte_table): Expand to 256 elements.
276 2006-08-04 Dwarakanath Rajagopal <dwarak.rajagopal@amd.com>
279 * i386-dis.c (MXC,EMC): Define.
280 (OP_MXC): New function to handle cvt* (convert instructions) between
281 %xmm and %mm register correctly.
283 (prefix_user_table): Modified cvtpi2pd,cvtpd2pi and cvttpd2pi
284 instruction operands in PREGRP2,PREGRP3,PREGRP4 appropriately
287 2006-07-29 Richard Sandiford <richard@codesourcery.com>
289 * m68k-opc.c (m68k_opcodes): Fix operand specificer in the Coldfire
292 2006-07-19 Paul Brook <paul@codesourcery.com>
294 * armd-dis.c (arm_opcodes): Fix rbit opcode.
296 2006-07-18 H.J. Lu <hongjiu.lu@intel.com>
298 * i386-dis.c (grps): Change "sldtQ", "strQ" and "smswQ" to
299 "sldt", "str" and "smsw".
301 2006-07-15 H.J. Lu <hongjiu.lu@intel.com>
304 * i386-dis.c (GRP11_C6): NEW.
305 (GRP11_C7): Likewise.
312 (GRPPADLCK1): Likewise.
313 (GRPPADLCK2): Likewise.
314 (dis386): Use GRP11_C6 and GRP11_C7 for entres 0xc6 and 0xc7,
316 (grps): Add entries for GRP11_C6 and GRP11_C7.
318 2006-07-10 Dwarakanath Rajagopal <dwarak.rajagopal@amd.com>
319 Michael Meissner <michael.meissner@amd.com>
321 * i386-dis.c (dis386): Add support for 4 operand instructions. Add
322 support for amdfam10 SSE4a/ABM instructions. Modify all
323 initializer macros to have additional arguments. Disallow REP
324 prefix for non-string instructions.
327 2006-07-05 Julian Brown <julian@codesourcery.com>
329 * arm-dis.c (coprocessor): Alter fmsrr disassembly syntax.
331 2006-06-12 H.J. Lu <hongjiu.lu@intel.com>
333 * i386-dis.c (dis386_twobyte): Use "nopQ" for 0x1f.
334 (twobyte_has_modrm): Set 1 for 0x1f.
336 2006-06-12 H.J. Lu <hongjiu.lu@intel.com>
338 * i386-dis.c (NOP_Fixup): Removed.
340 (NOP_Fixup2): Likewise.
341 (dis386): Use NOP_Fixup1 and NOP_Fixup2 on 0x90.
343 2006-06-12 Julian Brown <julian@codesourcery.com>
345 * arm-dis.c (print_insn_neon): Disassemble 32-bit immediates as signed
348 2006-06-10 H.J. Lu <hongjiu.lu@intel.com>
350 * i386.c (GRP10): Renamed to ...
352 (GRP11): Renamed to ...
354 (GRP12): Renamed to ...
356 (GRP13): Renamed to ...
358 (GRP14): Renamed to ...
360 (dis386_twobyte): Updated.
363 2006-06-09 Nick Clifton <nickc@redhat.com>
365 * po/fi.po: Updated Finnish translation.
367 2006-06-07 Joseph S. Myers <joseph@codesourcery.com>
369 * po/Make-in (pdf, ps): New dummy targets.
371 2006-06-06 Paul Brook <paul@codesourcery.com>
373 * arm-dis.c (coprocessor_opcodes): Add %c to unconditional arm
375 (neon_opcodes): Add conditional execution specifiers.
376 (thumb_opcodes): Ditto.
377 (thumb32_opcodes): Ditto.
378 (arm_conditional): Change 0xe to "al" and add "" to end.
379 (ifthen_state, ifthen_next_state, ifthen_address): New.
380 (IFTHEN_COND): Define.
381 (print_insn_coprocessor, print_insn_neon): Print thumb conditions.
382 (print_insn_arm): Change %c to use new values of arm_conditional.
383 (print_insn_thumb16): Print thumb conditions. Add %I.
384 (print_insn_thumb32): Print thumb conditions.
385 (find_ifthen_state): New function.
386 (print_insn): Track IT block state.
388 2006-06-06 Ben Elliston <bje@au.ibm.com>
389 Anton Blanchard <anton@samba.org>
390 Peter Bergner <bergner@vnet.ibm.com>
392 * ppc-dis.c (powerpc_dialect): Handle power6 option.
393 (print_ppc_disassembler_options): Mention power6.
395 2006-06-06 Thiemo Seufer <ths@mips.com>
396 Chao-ying Fu <fu@mips.com>
398 * mips-dis.c: Disassemble DSP64 instructions for MIPS64R2.
399 * mips-opc.c: Add DSP64 instructions.
401 2006-06-06 Alan Modra <amodra@bigpond.net.au>
403 * m68hc11-dis.c (print_insn): Warning fix.
405 2006-06-05 Daniel Jacobowitz <dan@codesourcery.com>
407 * po/Make-in (top_builddir): Define.
409 2006-06-05 Alan Modra <amodra@bigpond.net.au>
411 * Makefile.am: Run "make dep-am".
412 * Makefile.in: Regenerate.
413 * config.in: Regenerate.
415 2006-05-31 Daniel Jacobowitz <dan@codesourcery.com>
417 * Makefile.am (INCLUDES): Use @INCINTL@.
418 * acinclude.m4: Include new gettext macros.
419 * configure.in: Use ZW_GNU_GETTEXT_SISTER_DIR and AM_PO_SUBDIRS.
420 Remove local code for po/Makefile.
421 * Makefile.in, aclocal.m4, configure: Regenerated.
423 2006-05-30 Nick Clifton <nickc@redhat.com>
425 * po/es.po: Updated Spanish translation.
427 2006-05-25 Richard Sandiford <richard@codesourcery.com>
429 * m68k-opc.c (m68k_opcodes): Fix the masks of the Coldfire fmovemd
430 and fmovem entries. Put register list entries before immediate
431 mask entries. Use "l" rather than "L" in the fmovem entries.
432 * m68k-dis.c (match_insn_m68k): Remove the PRIV argument and work it
434 (m68k_scan_mask): New function, split out from...
435 (print_insn_m68k): ...here. If no architecture has been set,
436 first try printing an m680x0 instruction, then try a Coldfire one.
438 2006-05-24 Nick Clifton <nickc@redhat.com>
440 * po/ga.po: Updated Irish translation.
442 2006-05-22 Nick Clifton <nickc@redhat.com>
444 * crx-dis.c (EXTRACT): Make macro work on 64-bit hosts.
446 2006-05-22 Nick Clifton <nickc@redhat.com>
448 * po/nl.po: Updated translation.
450 2006-05-18 Alan Modra <amodra@bigpond.net.au>
452 * avr-dis.c: Formatting fix.
454 2006-05-14 Thiemo Seufer <ths@mips.com>
456 * mips16-opc.c (I1, I32, I64): New shortcut defines.
457 (mips16_opcodes): Change membership of instructions to their
460 2006-05-09 H.J. Lu <hongjiu.lu@intel.com>
462 * i386-dis.c (grps): Update sgdt/sidt for 64bit.
464 2006-05-05 Julian Brown <julian@codesourcery.com>
466 * arm-dis.c (coprocessor_opcodes): Don't interpret fldmx/fstmx as
469 2006-05-05 Thiemo Seufer <ths@mips.com>
470 David Ung <davidu@mips.com>
472 * mips-opc.c: Add macro for cache instruction.
474 2006-05-04 Thiemo Seufer <ths@mips.com>
475 Nigel Stephens <nigel@mips.com>
476 David Ung <davidu@mips.com>
478 * mips-dis.c (mips_arch_choices): Add smartmips instruction
479 decoding to MIPS32 and MIPS32R2. Limit DSP decoding to release
480 2 ISAs. Add MIPS3D decoding to MIPS32R2. Add MT decoding to
482 * mips-opc.c: fix random typos in comments.
483 (INSN_SMARTMIPS): New defines.
484 (mips_builtin_opcodes): Add paired single support for MIPS32R2.
485 Move bc3f, bc3fl, bc3t, bc3tl downwards. Move flushi, flushd,
486 flushid, wb upwards. Move cfc3, ctc3 downwards. Rework the
487 FP_S and FP_D flags to denote single and double register
488 accesses separately. Move dmfc3, dmtc3, mfc3, mtc3 downwards.
489 Allow jr.hb and jalr.hb for release 1 ISAs. Allow luxc1, suxc1
490 for MIPS32R2. Add SmartMIPS instructions. Add two-argument
491 variants of bc2f, bc2fl, bc2t, bc2tl. Add mfhc2, mthc2 to
493 * mips16-opc.c (mips16_opcodes): Add sdbbp instruction.
495 2006-05-03 Thiemo Seufer <ths@mips.com>
497 * mips-opc.c (mips_builtin_opcodes): Fix mftr argument order.
499 2006-05-02 Thiemo Seufer <ths@mips.com>
500 Nigel Stephens <nigel@mips.com>
501 David Ung <davidu@mips.com>
503 * mips-dis.c (print_insn_args): Force mips16 to odd addresses.
504 (print_mips16_insn_arg): Force mips16 to odd addresses.
506 2006-04-30 Thiemo Seufer <ths@mips.com>
507 David Ung <davidu@mips.com>
509 * mips-opc.c (mips_builtin_opcodes): Add udi instructions
511 * mips-dis.c (print_insn_args): Adds udi argument handling.
513 2006-04-28 James E Wilson <wilson@specifix.com>
515 * m68k-dis.c (match_insn_m68k): Restore fprintf_func before printing
518 2006-04-28 Thiemo Seufer <ths@mips.com>
519 David Ung <davidu@mips.com>
520 Nigel Stephens <nigel@mips.com>
522 * mips-dis.c (mips_cp0sel_names_mips3264r2): Add MT register
525 2006-04-28 Thiemo Seufer <ths@mips.com>
526 Nigel Stephens <nigel@mips.com>
527 David Ung <davidu@mips.com>
529 * mips-dis.c (print_insn_args): Add mips_opcode argument.
530 (print_insn_mips): Adjust print_insn_args call.
532 2006-04-28 Thiemo Seufer <ths@mips.com>
533 Nigel Stephens <nigel@mips.com>
535 * mips-dis.c (print_insn_args): Print $fcc only for FP
536 instructions, use $cc elsewise.
538 2006-04-28 Thiemo Seufer <ths@mips.com>
539 Nigel Stephens <nigel@mips.com>
541 * opcodes/mips-dis.c (mips16_to_32_reg_map, mips16_reg_names):
542 Map MIPS16 registers to O32 names.
543 (print_mips16_insn_arg): Use mips16_reg_names.
545 2006-04-26 Julian Brown <julian@codesourcery.com>
547 * arm-dis.c (print_insn_neon): Disassemble floating-point constant
550 2006-04-26 Nathan Sidwell <nathan@codesourcery.com>
551 Julian Brown <julian@codesourcery.com>
553 * opcodes/arm-dis.c (coprocessor_opcodes): Add %A, %B, %k, convert
554 %<code>[zy] into %[zy]<code>. Expand meaning of %<bitfield>['`?].
555 Add unified load/store instruction names.
556 (neon_opcode_table): New.
557 (arm_opcodes): Expand meaning of %<bitfield>['`?].
558 (arm_decode_bitfield): New.
559 (print_insn_coprocessor): Add pc argument. Add %A & %B specifiers.
560 Use arm_decode_bitfield and adjust numeric specifiers. Adjust %z & %y.
561 (print_insn_neon): New.
562 (print_insn_arm): Adjust print_insn_coprocessor call. Call
563 print_insn_neon. Use arm_decode_bitfield and adjust numeric specifiers.
564 (print_insn_thumb32): Likewise.
566 2006-04-19 Alan Modra <amodra@bigpond.net.au>
568 * Makefile.am: Run "make dep-am".
569 * Makefile.in: Regenerate.
571 2006-04-19 Alan Modra <amodra@bigpond.net.au>
573 * avr-dis.c (avr_operand): Warning fix.
575 * configure: Regenerate.
577 2006-04-16 Daniel Jacobowitz <dan@codesourcery.com>
579 * po/POTFILES.in: Regenerated.
581 2006-04-12 Hochstein <hochstein@algo.informatik.tu-darmstadt.de>
584 * avr-dis.c (avr_operand): Arrange for a comment to appear before
585 the symolic form of an address, so that the output of objdump -d
588 2006-04-10 DJ Delorie <dj@redhat.com>
590 * m32c-asm.c: Regenerate.
592 2006-04-06 Carlos O'Donell <carlos@codesourcery.com>
594 * Makefile.am: Add install-html target.
595 * Makefile.in: Regenerate.
597 2006-04-06 Nick Clifton <nickc@redhat.com>
599 * po/vi/po: Updated Vietnamese translation.
601 2006-03-31 Paul Koning <ni1d@arrl.net>
603 * pdp11-opc.c (pdp11_opcodes): Fix opcode for SEC instruction.
605 2006-03-16 Bernd Schmidt <bernd.schmidt@analog.com>
607 * bfin-dis.c (decode_dsp32shiftimm_0): Simplify and correct the
608 logic to identify halfword shifts.
610 2006-03-16 Paul Brook <paul@codesourcery.com>
612 * arm-dis.c (arm_opcodes): Rename swi to svc.
613 (thumb_opcodes): Ditto.
615 2006-03-13 DJ Delorie <dj@redhat.com>
617 * m32c-asm.c: Regenerate.
618 * m32c-desc.c: Likewise.
619 * m32c-desc.h: Likewise.
620 * m32c-dis.c: Likewise.
621 * m32c-ibld.c: Likewise.
622 * m32c-opc.c: Likewise.
623 * m32c-opc.h: Likewise.
625 2006-03-10 DJ Delorie <dj@redhat.com>
627 * m32c-desc.c: Regenerate with mul.l, mulu.l.
628 * m32c-opc.c: Likewise.
629 * m32c-opc.h: Likewise.
632 2006-03-09 Nick Clifton <nickc@redhat.com>
634 * po/sv.po: Updated Swedish translation.
636 2006-03-07 H.J. Lu <hongjiu.lu@intel.com>
639 * i386-dis.c (REP_Fixup): New function.
640 (AL): Remove duplicate.
645 (indirDXr): Likewise.
648 (dis386): Updated entries of ins, outs, movs, lods and stos.
650 2006-03-05 Nick Clifton <nickc@redhat.com>
652 * cgen-ibld.in (insert_normal): Cope with attempts to insert a
653 signed 32-bit value into an unsigned 32-bit field when the host is
655 * fr30-ibld.c: Regenerate.
656 * frv-ibld.c: Regenerate.
657 * ip2k-ibld.c: Regenerate.
658 * iq2000-asm.c: Regenerate.
659 * iq2000-ibld.c: Regenerate.
660 * m32c-ibld.c: Regenerate.
661 * m32r-ibld.c: Regenerate.
662 * openrisc-ibld.c: Regenerate.
663 * xc16x-ibld.c: Regenerate.
664 * xstormy16-ibld.c: Regenerate.
666 2006-03-03 Shrirang Khisti <shrirangk@kpitcummins.com)
668 * xc16x-asm.c: Regenerate.
669 * xc16x-dis.c: Regenerate.
671 2006-02-27 Carlos O'Donell <carlos@codesourcery.com>
673 * po/Make-in: Add html target.
675 2006-02-27 H.J. Lu <hongjiu.lu@intel.com>
677 * i386-dis.c (IS_3BYTE_OPCODE): New for 3-byte opcodes used by
678 Intel Merom New Instructions.
679 (THREE_BYTE_0): Likewise.
680 (THREE_BYTE_1): Likewise.
681 (three_byte_table): Likewise.
682 (dis386_twobyte): Use THREE_BYTE_0 for entry 0x38. Use
683 THREE_BYTE_1 for entry 0x3a.
684 (twobyte_has_modrm): Updated.
685 (twobyte_uses_SSE_prefix): Likewise.
686 (print_insn): Handle 3-byte opcodes used by Intel Merom New
689 2006-02-24 David S. Miller <davem@sunset.davemloft.net>
691 * sparc-dis.c (v9_priv_reg_names): Add "gl" entry.
692 (v9_hpriv_reg_names): New table.
693 (print_insn_sparc): Allow values up to 16 for '?' and '!'.
694 New cases '$' and '%' for read/write hyperprivileged register.
695 * sparc-opc.c (sparc_opcodes): Add new entries for UA2005
696 window handling and rdhpr/wrhpr instructions.
698 2006-02-24 DJ Delorie <dj@redhat.com>
700 * m32c-desc.c: Regenerate with linker relaxation attributes.
701 * m32c-desc.h: Likewise.
702 * m32c-dis.c: Likewise.
703 * m32c-opc.c: Likewise.
705 2006-02-24 Paul Brook <paul@codesourcery.com>
707 * arm-dis.c (arm_opcodes): Add V7 instructions.
708 (thumb32_opcodes): Ditto. Handle V7M MSR/MRS variants.
709 (print_arm_address): New function.
710 (print_insn_arm): Use it. Add 'P' and 'U' cases.
711 (psr_name): New function.
712 (print_insn_thumb32): Add 'U', 'C' and 'D' cases.
714 2006-02-23 H.J. Lu <hongjiu.lu@intel.com>
716 * ia64-opc-i.c (bXc): New.
718 (OpX2TaTbYaXcC): Likewise.
721 (ia64_opcodes_i): Add instructions for tf.
723 * ia64-opc.h (IMMU5b): New.
725 * ia64-asmtab.c: Regenerated.
727 2006-02-23 H.J. Lu <hongjiu.lu@intel.com>
729 * ia64-gen.c: Update copyright years.
730 * ia64-opc-b.c: Likewise.
732 2006-02-22 H.J. Lu <hongjiu.lu@intel.com>
734 * ia64-gen.c (lookup_regindex): Handle ".vm".
735 (print_dependency_table): Handle '\"'.
737 * ia64-ic.tbl: Updated from SDM 2.2.
738 * ia64-raw.tbl: Likewise.
739 * ia64-waw.tbl: Likewise.
740 * ia64-asmtab.c: Regenerated.
742 * ia64-opc-b.c (ia64_opcodes_b): Add vmsw.0 and vmsw.1.
744 2006-02-17 Shrirang Khisti <shrirangk@kpitcummins.com>
745 Anil Paranjape <anilp1@kpitcummins.com>
746 Shilin Shakti <shilins@kpitcummins.com>
748 * xc16x-desc.h: New file
749 * xc16x-desc.c: New file
750 * xc16x-opc.h: New file
751 * xc16x-opc.c: New file
752 * xc16x-ibld.c: New file
753 * xc16x-asm.c: New file
754 * xc16x-dis.c: New file
755 * Makefile.am: Entries for xc16x
756 * Makefile.in: Regenerate
757 * cofigure.in: Add xc16x target information.
758 * configure: Regenerate.
759 * disassemble.c: Add xc16x target information.
761 2006-02-11 H.J. Lu <hongjiu.lu@intel.com>
763 * i386-dis.c (dis386_twobyte): Use "movZ" for debug register
766 2006-02-11 H.J. Lu <hongjiu.lu@intel.com>
768 * i386-dis.c ('Z'): Add a new macro.
769 (dis386_twobyte): Use "movZ" for control register moves.
771 2006-02-10 Nick Clifton <nickc@redhat.com>
773 * iq2000-asm.c: Regenerate.
775 2006-02-07 Nathan Sidwell <nathan@codesourcery.com>
777 * m68k-dis.c (print_insn_m68k): Use bfd_m68k_mach_to_features.
779 2006-01-26 David Ung <davidu@mips.com>
781 * mips-opc.c: Add I33 masks to these MIPS32R2 instructions: prefx,
782 ceil.l.d, ceil.l.s, cvt.d.l, cvt.l.d, cvt.l.s, cvt.s.l, floor.l.d,
783 floor.l.s, ldxc1, lwxc1, madd.d, madd.s, msub.d, msub.s, nmadd.d,
784 nmadd.s, nmsub.d, nmsub.s, recip.d, recip.s, round.l.d, rsqrt.d,
785 rsqrt.s, sdxc1, swxc1, trunc.l.d, trunc.l.s.
787 2006-01-18 Arnold Metselaar <arnoldm@sourceware.org>
789 * z80-dis.c (struct buffer, prt_d, prt_d_n, arit_d, ld_r_d,
790 ld_d_r, pref_xd_cb): Use signed char to hold data to be
792 * z80-dis.c (TXTSIZ): Increase buffer size to 24, this fixes
793 buffer overflows when disassembling instructions like
795 * z80-dis.c (opc_ind, pref_xd_cb): Suppress '+' in an indexed
796 operand, if the offset is negative.
798 2006-01-17 Arnold Metselaar <arnoldm@sourceware.org>
800 * z80-dis.c (struct buffer, prt_d, prt_d_n, pref_xd_cb): Use
801 unsigned char to hold data to be disassembled.
803 2006-01-17 Andreas Schwab <schwab@suse.de>
806 * disassemble.c (disassemble_init_for_target): Set
807 disassembler_needs_relocs for bfd_arch_arm.
809 2006-01-16 Paul Brook <paul@codesourcery.com>
811 * m68k-opc.c (m68k_opcodes): Fix opcodes for ColdFire f?abss,
812 f?add?, and f?sub? instructions.
814 2006-01-16 Nick Clifton <nickc@redhat.com>
816 * po/zh_CN.po: New Chinese (simplified) translation.
817 * configure.in (ALL_LINGUAS): Add "zh_CH".
818 * configure: Regenerate.
820 2006-01-05 Paul Brook <paul@codesourcery.com>
822 * m68k-opc.c (m68k_opcodes): Add missing ColdFire fdsqrtd entry.
824 2006-01-06 DJ Delorie <dj@redhat.com>
826 * m32c-desc.c: Regenerate.
827 * m32c-opc.c: Regenerate.
828 * m32c-opc.h: Regenerate.
830 2006-01-03 DJ Delorie <dj@redhat.com>
832 * cgen-ibld.in (extract_normal): Avoid memory range errors.
833 * m32c-ibld.c: Regenerated.
835 For older changes see ChangeLog-2005
841 version-control: never