1 2012-10-18 Kai Tietz <ktietz@redhat.com>
3 * aarch64-asm.c (aarch64_ins_ldst_reglist): Initialize
5 (do_special_encoding): Likewise.
6 (aarch64_ins_ldst_elemlist): Pre-initialize QSsize, and opcodeh2
7 variables with default.
8 * arc-dis.c (write_comments_): Don't use strncat due
9 size of state->commentBuffer pointer isn't predictable.
11 2012-10-15 Yufeng Zhang <yufeng.zhang@arm.com>
13 * aarch64-opc.c (aarch64_sys_regs): Add rmr_el1, rmr_el2 and
14 rmr_el3; remove daifset and daifclr.
16 2012-10-15 Yufeng Zhang <yufeng.zhang@arm.com>
18 * aarch64-opc.c (operand_general_constraint_met_p): Change to check
19 the alignment of addr.offset.imm instead of that of shifter.amount for
20 operand type AARCH64_OPND_ADDR_UIMM12.
22 2012-10-11 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
24 * arm-dis.c: Use preferred form of vrint instruction variants
27 2012-10-09 Nagajyothi Eggone <nagajyothi.eggone@amd.com>
29 * i386-gen.c (cpu_flag_init): Add CPU_BDVER3_FLAGS.
30 * i386-init.h: Regenerated.
32 2012-10-05 Peter Bergner <bergner@vnet.ibm.com>
34 * ppc-dis.c (ppc_opts) <altivec>: Use PPC_OPCODE_ALTIVEC2;
35 * ppc-opc.c (VBA): New define.
36 (powerpc_opcodes) <vcuxwfp, vcsxwfp, vcfpuxws, vcfpsxsw, vmr, vnot,
37 mfppr, mfppr32, mtppr, mtppr32>: New extended mnemonics.
39 2012-10-04 Nick Clifton <nickc@redhat.com>
41 * v850-dis.c (disassemble): Place square parentheses around second
42 register operand of clr1, not1, set1 and tst1 instructions.
44 2012-10-04 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
46 * s390-mkopc.c: Support new option zEC12.
47 * s390-opc.c: Add new instruction formats.
48 * s390-opc.txt: Add new instructions for zEC12.
50 2012-09-27 Anthony Green <green@moxielogic.com>
52 * moxie-dis.c (print_insn_moxie): Print 'bad' instructions.
53 * moxie-opc.c: All 'bad' instructions have the itype MOXIE_BAD.
55 2012-09-25 Saravanan Ekanathan <saravanan.ekanathan@amd.com>
57 * i386-gen.c (cpu_flag_init): Add missing Cpu flags in
58 CPU_BDVER1_FLAGS, CPU_BDVER2_FLAGS, CPU_BTVER1_FLAGS
60 * i386-init.h: Regenerated.
62 2012-09-20 Michael Zolotukhin <michael.v.zolotukhin@intel.com>
64 * i386-gen.c (cpu_flag_init): Add CpuCX16 to CPU_NOCONA_FLAGS,
65 CPU_CORE_FLAGS, CPU_CORE2_FLAGS, CPU_COREI7_FLAGS,
66 CPU_BDVER1_FLAGS, CPU_BDVER2_FLAGS, CPU_BTVER1_FLAGS,
67 CPU_BTVER2_FLAGS. Add CPU_CX16_FLAGS.
68 (cpu_flags): Add CpuCX16.
69 * i386-opc.h (CpuCX16): New.
70 (i386_cpu_flags): Add cpucx16.
71 * i386-opc.tbl: Replace CpuSSE3 with CpuCX16 for cmpxchg16b.
72 * i386-tbl.h: Regenerate.
73 * i386-init.h: Likewise.
75 2012-09-18 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
77 * arm-dis.c: Changed ldra and strl-form mnemonics
80 2012-09-18 Chao-ying Fu <fu@mips.com>
82 * micromips-opc.c (micromips_opcodes): Correct the encoding of
83 the "swxc1" instruction.
85 2012-09-17 Yufeng Zhang <yufeng.zhang@arm.com>
87 * aarch64-asm.c (aarch64_ins_imm_half): Remove ATTRIBUTE_UNUSED from
89 (aarch64_ins_addr_simm): Add ATTRIBUTE_UNUSED to the parameter 'inst'.
90 (convert_mov_to_movewide): Change to assert (0) when
91 aarch64_wide_constant_p returns FALSE.
93 2012-09-14 David Edelsohn <dje.gcc@gmail.com>
95 * configure: Regenerate.
97 2012-09-14 Anthony Green <green@moxielogic.com>
99 * moxie-dis.c (print_insn_moxie): Branch targets are relative to
100 the address after the branch instruction.
102 2012-09-13 Anthony Green <green@moxielogic.com>
104 * moxie-dis.c (print_insn_moxie): Handle bi-endian encodings.
106 2012-09-10 Matthias Klose <doko@ubuntu.com>
108 * config.in: Disable sanity check for kfreebsd.
110 2012-09-10 H.J. Lu <hongjiu.lu@intel.com>
112 * configure: Regenerated.
114 2012-09-04 Sergey A. Guriev <sergey.a.guriev@intel.com>
116 * ia64-asmtab.h (completer_index): Extend bitfield to full uint.
117 * ia64-gen.c: Promote completer index type to longlong.
118 (irf_operand): Add new register recognition.
119 (in_iclass_mov_x): Add an entry for the new mov_* instruction type.
120 (lookup_specifier): Add new resource recognition.
121 (insert_bit_table_ent): Relax abort condition according to the
122 changed completer index type.
123 (print_dis_table): Fix printf format for completer index.
124 * ia64-ic.tbl: Add a new instruction class.
125 * ia64-opc-i.c (ia64_opcodes_i): Define new I-instructions.
126 * ia64-opc-m.c (ia64_opcodes_m): Define new M-instructions.
127 * ia64-opc.h: Define short names for new operand types.
128 * ia64-raw.tbl: Add new RAW resource for DAHR register.
129 * ia64-waw.tbl: Add new WAW resource for DAHR register.
130 * ia64-asmtab.c: Regenerate.
132 2012-08-29 Peter Bergner <bergner@vnet.ibm.com>
134 * ppc-opc.c (VXASHB_MASK): New define.
135 (powerpc_opcodes) <vsldoi>: Use VXASHB_MASK.
137 2012-08-28 Peter Bergner <bergner@vnet.ibm.com>
139 * ppc-opc.c (UIMM4, UIMM3, UIMM2, VXVA_MASK, VXVB_MASK, VXVAVB_MASK,
140 VXVDVA_MASK, VXUIMM4_MASK, VXUIMM3_MASK, VXUIMM2_MASK): New defines.
141 (powerpc_opcodes) <vexptefp, vlogefp, vrefp, vrfim, vrfin, vrfip,
142 vrfiz, vrsqrtefp, vupkhpx, vupkhsb, vupkhsh, vupklpx, vupklsb,
143 vupklsh>: Use VXVA_MASK.
144 <vspltisb, vspltish, vspltisw>: Use VXVB_MASK.
145 <mfvscr>: Use VXVAVB_MASK.
146 <mtvscr>: Use VXVDVA_MASK.
147 <vspltb>: Use VXUIMM4_MASK.
148 <vsplth>: Use VXUIMM3_MASK.
149 <vspltw>: Use VXUIMM2_MASK.
151 2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
153 * arm-dis.c (neon_opcodes): Add 2 operand sha instructions.
155 2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
157 * arm-dis.c (neon_opcodes): Add SHA 3-operand instructions.
159 2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
161 * arm-dis.c (neon_opcodes): Handle VMULL.P64.
163 2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
165 * arm-dis.c (neon_opcodes): Add support for AES instructions.
167 2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
169 * arm-dis.c (coprocessor_opcodes): Add support for HP/DP
172 2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
174 * arm-dis.c (coprocessor_opcodes): Add VRINT.
175 (neon_opcodes): Likewise.
177 2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
179 * arm-dis.c (coprocessor_opcodes): Add support for new VCVT
181 (neon_opcodes): Likewise.
183 2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
185 * arm-dis.c (coprocessor_opcodes): Add VMAXNM/VMINNM.
186 (neon_opcodes): Likewise.
188 2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
190 * arm-dis.c (coprocessor_opcodes): Add VSEL.
191 (print_insn_coprocessor): Add new %<>c bitfield format
194 2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
196 * arm-dis.c (arm_opcodes): Add LDRA/STRL instructions.
197 (thumb32_opcodes): Likewise.
198 (print_arm_insn): Add support for %<>T formatter.
200 2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
202 * arm-dis.c (arm_opcodes): Add HLT.
203 (thumb_opcodes): Likewise.
205 2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
207 * arm-dis.c (thumb32_opcodes): Add DCPS instruction.
209 2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
211 * arm-dis.c (arm_opcodes): Add SEVL.
212 (thumb_opcodes): Likewise.
213 (thumb32_opcodes): Likewise.
215 2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
217 * arm-dis.c (data_barrier_option): New function.
218 (print_insn_arm): Use data_barrier_option.
219 (print_insn_thumb32): Use data_barrier_option.
221 2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com
223 * arm-dis.c (COND_UNCOND): New constant.
224 (print_insn_coprocessor): Add support for %u format specifier.
225 (print_insn_neon): Likewise.
227 2012-08-21 David S. Miller <davem@davemloft.net>
229 * sparc-opc.c (4-argument crypto instructions): Fix encoding using
232 2012-08-20 Edmar Wienskoski <edmar@freescale.com>
234 * ppc-opc.c (powerpc_opcodes): Changed opcode for vabsdub,
235 vabsduh, vabsduw, mviwsplt.
237 2012-08-17 Nagajyothi Eggone <nagajyothi.eggone@amd.com>
239 * i386-gen.c (cpu_flag_init): Add CPU_BTVER1_FLAGS and
242 * i386-opc.h: Update CpuPRFCHW comment.
244 * i386-opc.tbl: Enable prefetch instruction for CpuPRFCHW.
245 * i386-init.h: Regenerated.
246 * i386-tbl.h: Likewise.
248 2012-08-17 Nick Clifton <nickc@redhat.com>
250 * po/uk.po: New Ukranian translation.
251 * configure.in (ALL_LINGUAS): Add uk.
252 * configure: Regenerate.
254 2012-08-16 Peter Bergner <bergner@vnet.ibm.com>
256 * ppc-opc.c (powerpc_opcodes) <"lswx">: Use RAX for the second and
257 RBX for the third operand.
258 <"lswi">: Use RAX for second and NBI for the third operand.
260 2012-08-15 DJ Delorie <dj@redhat.com>
262 * rl78-decode.opc (rl78_decode_opcode): Merge %e and %[01]
263 operands, so that data addresses can be corrected when not
265 * rl78-decode.c: Regenerate.
266 * rl78-dis.c (print_insn_rl78): Make order of modifiers
267 irrelevent. When the 'e' specifier is used on an operand and no
268 ES prefix is provided, adjust address to make it absolute.
270 2012-08-15 Peter Bergner <bergner@vnet.ibm.com>
272 * ppc-opc.c <RSQ, RTQ>: Use PPC_OPERAND_GPR.
274 2012-08-15 Peter Bergner <bergner@vnet.ibm.com>
276 * ppc-opc.c <xnop, yield, mdoio, mdoom>: New extended mnemonics.
278 2012-08-14 Maciej W. Rozycki <macro@codesourcery.com>
280 * mips-dis.c (print_insn_args): Add GET_OP and GET_OP_S local
281 macros, use local variables for info struct member accesses,
282 update the type of the variable used to hold the instruction
284 (print_insn_mips, print_mips16_insn_arg): Likewise.
285 (print_insn_mips16): Add GET_OP and GET_OP_S local macros, use
286 local variables for info struct member accesses.
287 (print_insn_micromips): Add GET_OP_S local macro.
288 (_print_insn_mips): Update the type of the variable used to hold
289 the instruction word.
291 2012-08-13 Ian Bolton <ian.bolton@arm.com>
292 Laurent Desnogues <laurent.desnogues@arm.com>
293 Jim MacArthur <jim.macarthur@arm.com>
294 Marcus Shawcroft <marcus.shawcroft@arm.com>
295 Nigel Stephens <nigel.stephens@arm.com>
296 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
297 Richard Earnshaw <rearnsha@arm.com>
298 Sofiane Naci <sofiane.naci@arm.com>
299 Tejas Belagod <tejas.belagod@arm.com>
300 Yufeng Zhang <yufeng.zhang@arm.com>
302 * Makefile.am: Add AArch64.
303 * Makefile.in: Regenerate.
304 * aarch64-asm.c: New file.
305 * aarch64-asm.h: New file.
306 * aarch64-dis.c: New file.
307 * aarch64-dis.h: New file.
308 * aarch64-gen.c: New file.
309 * aarch64-opc.c: New file.
310 * aarch64-opc.h: New file.
311 * aarch64-tbl.h: New file.
312 * configure.in: Add AArch64.
313 * configure: Regenerate.
314 * disassemble.c: Add AArch64.
315 * aarch64-asm-2.c: New file (automatically generated).
316 * aarch64-dis-2.c: New file (automatically generated).
317 * aarch64-opc-2.c: New file (automatically generated).
318 * po/POTFILES.in: Regenerate.
320 2012-08-13 Maciej W. Rozycki <macro@codesourcery.com>
322 * micromips-opc.c (micromips_opcodes): Update comment.
323 * mips-opc.c (mips_builtin_opcodes): Likewise. Mark coprocessor
324 instructions for IOCT as appropriate.
325 * mips-dis.c (print_insn_mips): Replace OPCODE_IS_MEMBER with
327 * configure.in: Substitute NO_WMISSING_FIELD_INITIALIZERS with
328 the result of a check for the -Wno-missing-field-initializers
330 * Makefile.am (NO_WMISSING_FIELD_INITIALIZERS): New variable.
331 (mips-opc.lo): Pass $(NO_WMISSING_FIELD_INITIALIZERS) to
333 (mips16-opc.lo): Likewise.
334 (micromips-opc.lo): Likewise.
335 * aclocal.m4: Regenerate.
336 * configure: Regenerate.
337 * Makefile.in: Regenerate.
339 2012-08-11 Saravanan Ekanathan <saravanan.ekanathan@amd.com>
342 * i386-gen.c (cpu_flag_init): Add CpuFMA in CPU_BDVER2_FLAGS.
343 * i386-init.h: Regenerated.
345 2012-08-09 Nick Clifton <nickc@redhat.com>
347 * po/vi.po: Updated Vietnamese translation.
349 2012-08-07 Roland McGrath <mcgrathr@google.com>
351 * i386-dis.c (reg_table): Fill out REG_0F0D table with
352 AMD-reserved cases as "prefetch".
353 (MOD_0F18_REG_4, MOD_0F18_REG_5): New enum constants.
354 (MOD_0F18_REG_6, MOD_0F18_REG_7): Likewise.
355 (reg_table): Use those under REG_0F18.
356 (mod_table): Add those cases as "nop/reserved".
358 2012-08-07 Jan Beulich <jbeulich@suse.com>
360 * i386-opc.tbl: Remove "FIXME" comments from SVME instructions.
362 2012-08-06 Roland McGrath <mcgrathr@google.com>
364 * i386-dis.c (print_insn): Print spaces between multiple excess
365 prefixes. Return actual number of excess prefixes consumed,
368 * i386-dis.c (OP_REG): Ignore REX_B for segment register cases.
370 2012-08-06 Roland McGrath <mcgrathr@google.com>
371 Victor Khimenko <khim@google.com>
372 H.J. Lu <hongjiu.lu@intel.com>
374 * i386-dis.c (OP_sI): In b_T_mode and v_mode, REX_W trumps DFLAG.
375 (putop): For 'T', 'U', and 'V', treat REX_W like DFLAG.
376 (intel_operand_size): For stack_v_mode, treat REX_W like DFLAG.
377 (OP_E_register): Likewise.
378 (OP_REG): For low 8 whole registers, treat REX_W like DFLAG.
380 2012-08-02 Jan-Benedict Glaw <jbglaw@lug-owl.de>
382 * configure.in: Formatting.
383 * configure: Regenerate.
385 2012-08-01 Alan Modra <amodra@gmail.com>
387 * h8300-dis.c: Fix printf arg warnings.
388 * i960-dis.c: Likewise.
389 * mips-dis.c: Likewise.
390 * pdp11-dis.c: Likewise.
391 * sh-dis.c: Likewise.
392 * v850-dis.c: Likewise.
393 * configure.in: Formatting.
394 * configure: Regenerate.
395 * rl78-decode.c: Regenerate.
396 * po/POTFILES.in: Regenerate.
398 2012-07-31 Chao-Ying Fu <fu@mips.com>
399 Catherine Moore <clm@codesourcery.com>
400 Maciej W. Rozycki <macro@codesourcery.com>
402 * micromips-opc.c (WR_a, RD_a, MOD_a): New macros.
403 (DSP_VOLA): Likewise.
404 (D32, D33): Likewise.
405 (micromips_opcodes): Add DSP ASE instructions.
406 * mips-dis.c (print_insn_micromips) <'2', '3'>: New cases.
407 <'4', '5', '6', '7', '8', '0', '^', '@'>: Likewise.
409 2012-07-31 Jan Beulich <jbeulich@suse.com>
411 * i386-opc.tbl (vmovntdqa): Move up into 256-bit integer AVX2
412 instruction group. Mark as requiring AVX2.
413 * i386-tbl.h: Re-generate.
415 2012-07-30 Nick Clifton <nickc@redhat.com>
417 * po/opcodes.pot: Updated template.
418 * po/es.po: Updated Spanish translation.
419 * po/fi.po: Updated Finnish translation.
421 2012-07-27 Mike Frysinger <vapier@gentoo.org>
423 * configure.in (BFD_VERSION): Run bfd/configure --version and
424 parse the output of that.
425 * configure: Regenerate.
427 2012-07-25 James Lemke <jwlemke@codesourcery.com>
429 * ppc-opc.c (powerpc_opcodes): Add/remove PPCVLE for some 32-bit insns.
431 2012-07-24 Stephan McCamant <smcc@cs.berkeley.edu>
432 Dr David Alan Gilbert <dave@treblig.org>
435 * arm-dis.c: Add necessary casts for printing integer values.
436 Use %s when printing string values.
437 * hppa-dis.c: Likewise.
438 * m68k-dis.c: Likewise.
439 * microblaze-dis.c: Likewise.
440 * mips-dis.c: Likewise.
441 * sparc-dis.c: Likewise.
443 2012-07-19 Michael Zolotukhin <michael.v.zolotukhin@intel.com>
446 * i386-dis.c (VEX_LEN_0FXOP_08_CC): New.
447 (VEX_LEN_0FXOP_08_CD): Likewise.
448 (VEX_LEN_0FXOP_08_CE): Likewise.
449 (VEX_LEN_0FXOP_08_CF): Likewise.
450 (VEX_LEN_0FXOP_08_EC): Likewise.
451 (VEX_LEN_0FXOP_08_ED): Likewise.
452 (VEX_LEN_0FXOP_08_EE): Likewise.
453 (VEX_LEN_0FXOP_08_EF): Likewise.
454 (xop_table): Fix entries for vpcomb, vpcomw, vpcomd, vpcomq,
455 vpcomub, vpcomuw, vpcomud, vpcomuq.
456 (vex_len_table): Add entries for VEX_LEN_0FXOP_08_CC,
457 VEX_LEN_0FXOP_08_CD, VEX_LEN_0FXOP_08_CE, VEX_LEN_0FXOP_08_CF,
458 VEX_LEN_0FXOP_08_EC, VEX_LEN_0FXOP_08_ED, VEX_LEN_0FXOP_08_EE,
461 2012-07-16 Michael Zolotukhin <michael.v.zolotukhin@intel.com>
463 * i386-dis.c (PREFIX_0F38F6): New.
464 (prefix_table): Add adcx, adox instructions.
465 (three_byte_table): Use PREFIX_0F38F6.
466 (mod_table): Add rdseed instruction.
467 * i386-gen.c (cpu_flag_init): Add CpuADX, CpuRDSEED, CpuPRFCHW.
468 (cpu_flags): Likewise.
469 * i386-opc.h: Add CpuADX, CpuRDSEED, CpuPRFCHW.
470 (i386_cpu_flags): Add fields cpurdseed, cpuadx, cpuprfchw.
471 * i386-opc.tbl: Add instrcutions adcx, adox, rdseed. Extend
473 * i386-tbl.h: Regenerate.
474 * i386-init.h: Likewise.
476 2012-07-05 Thomas Schwinge <thomas@codesourcery.com>
478 * mips-dis.c: Remove gratuitous newline.
480 2012-07-05 Sean Keys <skeys@ipdatasys.com>
482 * xgate-dis.c: Removed an IF statement that will
483 always be false due to overlapping operand masks.
484 * xgate-opc.c: Corrected 'com' opcode entry and
487 2012-07-02 Roland McGrath <mcgrathr@google.com>
489 * i386-opc.tbl: Add RepPrefixOk to nop.
490 * i386-tbl.h: Regenerate.
492 2012-06-28 Nick Clifton <nickc@redhat.com>
494 * po/vi.po: Updated Vietnamese translation.
496 2012-06-22 Roland McGrath <mcgrathr@google.com>
498 * i386-opc.tbl: Add RepPrefixOk to ret.
499 * i386-tbl.h: Regenerate.
501 * i386-opc.h (RepPrefixOk): New enum constant.
502 (i386_opcode_modifier): New bitfield 'repprefixok'.
503 * i386-gen.c (opcode_modifiers): Add RepPrefixOk.
504 * i386-opc.tbl: Add RepPrefixOk to bsf, bsr, and to all
505 instructions that have IsString.
506 * i386-tbl.h: Regenerate.
508 2012-06-11 Andreas Schwab <schwab@linux-m68k.org>
510 * ppc-opc.c (lvsl, lvebx, isellt, icbt, ldepx, lwepx, lvsr, lvehx)
511 (iselgt, lvewx, iseleq, isel, dcbst, dcbstep, dcbfl, dcbf, lbepx)
512 (lvx, dcbfep, dcbtstls, stvebx, dcbtstlse, stdepx, stwepx, dcbtls)
513 (stvehx, dcbtlse, stvewx, stbepx, icblc, stvx, dcbtstt, dcbtst)
514 (dcbtst, dcbtstep, dcbtt, dcbt, dcbt, lhepx, eciwx, dcbtep)
515 (dcread, lxvdsx, lvxl, dcblc, sthepx, ecowx, dcbi, dcread, icbtls)
516 (stvxl, lxsdx, lfdepx, stxsdx, stfdepx, dcba, dcbal, lxvw4x)
517 (tlbivax, lfdpx, lxvd2x, tlbsrx., stxvw4x, tlbsx, tlbsx., stfdpx)
518 (stfqx, stxvd2x, icbi, icbiep, icread, dcbzep): Change RA to RA0.
520 2012-05-19 Alan Modra <amodra@gmail.com>
522 * ppc-dis.c: Don't include elf32-ppc.h, do include elf/ppc.h.
523 (get_powerpc_dialect): Detect VLE sections from ELF sh_flags.
525 2012-05-18 Alan Modra <amodra@gmail.com>
527 * ia64-opc.c: Remove #include "ansidecl.h".
528 * z8kgen.c: Include sysdep.h first.
530 * arc-dis.c: Include sysdep.h first, remove some redundant includes.
531 * bfin-dis.c: Likewise.
532 * i860-dis.c: Likewise.
533 * ia64-dis.c: Likewise.
534 * ia64-gen.c: Likewise.
535 * m68hc11-dis.c: Likewise.
536 * mmix-dis.c: Likewise.
537 * msp430-dis.c: Likewise.
538 * or32-dis.c: Likewise.
539 * rl78-dis.c: Likewise.
540 * rx-dis.c: Likewise.
541 * tic4x-dis.c: Likewise.
542 * tilegx-opc.c: Likewise.
543 * tilepro-opc.c: Likewise.
544 * rx-decode.c: Regenerate.
546 2012-05-17 James Lemke <jwlemke@codesourcery.com>
548 * ppc-opc.c (powerpc_macros): Add entries for e_extlwi to e_clrlslwi.
550 2012-05-17 James Lemke <jwlemke@codesourcery.com>
552 * ppc-opc.c (extract_sprg): Use ALLOW8_SPRG to include VLE.
554 2012-05-17 Daniel Richard G. <skunk@iskunk.org>
555 Nick Clifton <nickc@redhat.com>
558 * configure.in: Add check that sysdep.h has been included before
559 any system header files.
560 * configure: Regenerate.
561 * config.in: Regenerate.
562 * sysdep.h: Generate an error if included before config.h.
563 * alpha-opc.c: Include sysdep.h before any other header file.
564 * alpha-dis.c: Likewise.
565 * avr-dis.c: Likewise.
566 * cgen-opc.c: Likewise.
567 * cr16-dis.c: Likewise.
568 * cris-dis.c: Likewise.
569 * crx-dis.c: Likewise.
570 * d10v-dis.c: Likewise.
571 * d10v-opc.c: Likewise.
572 * d30v-dis.c: Likewise.
573 * d30v-opc.c: Likewise.
574 * h8500-dis.c: Likewise.
575 * i370-dis.c: Likewise.
576 * i370-opc.c: Likewise.
577 * m10200-dis.c: Likewise.
578 * m10300-dis.c: Likewise.
579 * micromips-opc.c: Likewise.
580 * mips-opc.c: Likewise.
581 * mips61-opc.c: Likewise.
582 * moxie-dis.c: Likewise.
583 * or32-opc.c: Likewise.
584 * pj-dis.c: Likewise.
585 * ppc-dis.c: Likewise.
586 * ppc-opc.c: Likewise.
587 * s390-dis.c: Likewise.
588 * sh-dis.c: Likewise.
589 * sh64-dis.c: Likewise.
590 * sparc-dis.c: Likewise.
591 * sparc-opc.c: Likewise.
592 * spu-dis.c: Likewise.
593 * tic30-dis.c: Likewise.
594 * tic54x-dis.c: Likewise.
595 * tic80-dis.c: Likewise.
596 * tic80-opc.c: Likewise.
597 * tilegx-dis.c: Likewise.
598 * tilepro-dis.c: Likewise.
599 * v850-dis.c: Likewise.
600 * v850-opc.c: Likewise.
601 * vax-dis.c: Likewise.
602 * w65-dis.c: Likewise.
603 * xgate-dis.c: Likewise.
604 * xtensa-dis.c: Likewise.
605 * rl78-decode.opc: Likewise.
606 * rl78-decode.c: Regenerate.
607 * rx-decode.opc: Likewise.
608 * rx-decode.c: Regenerate.
610 2012-05-17 Alan Modra <amodra@gmail.com>
612 * ppc_dis.c: Don't include elf/ppc.h.
614 2012-05-16 Meador Inge <meadori@codesourcery.com>
616 * arm-dis.c (arm_opcodes): Don't disassemble STMFD/LDMIA sp!, {reg}
619 2012-05-15 James Murray <jsm@jsm-net.demon.co.uk>
620 Stephane Carrez <stcarrez@nerim.fr>
622 * configure.in: Add S12X and XGATE co-processor support to m68hc11
624 * disassemble.c: Likewise.
625 * configure: Regenerate.
626 * m68hc11-dis.c: Make objdump output more consistent, use hex
627 instead of decimal and use 0x prefix for hex.
628 * m68hc11-opc.c: Add S12X and XGATE opcodes.
630 2012-05-14 James Lemke <jwlemke@codesourcery.com>
632 * ppc-dis.c (get_powerpc_dialect): Use is_ppc_vle.
633 (PPC_OPCD_SEGS, VLE_OPCD_SEGS): New defines.
634 (vle_opcd_indices): New array.
635 (lookup_vle): New function.
636 (disassemble_init_powerpc): Revise for second (VLE) opcode table.
637 (print_insn_powerpc): Likewise.
638 * ppc-opc.c: Likewise.
640 2012-05-14 Catherine Moore <clm@codesourcery.com>
641 Maciej W. Rozycki <macro@codesourcery.com>
642 Rhonda Wittels <rhonda@codesourcery.com>
643 Nathan Froyd <froydnj@codesourcery.com>
645 * ppc-opc.c (insert_arx, extract_arx): New functions.
646 (insert_ary, extract_ary): New functions.
647 (insert_li20, extract_li20): New functions.
648 (insert_rx, extract_rx): New functions.
649 (insert_ry, extract_ry): New functions.
650 (insert_sci8, extract_sci8): New functions.
651 (insert_sci8n, extract_sci8n): New functions.
652 (insert_sd4h, extract_sd4h): New functions.
653 (insert_sd4w, extract_sd4w): New functions.
654 (insert_vlesi, extract_vlesi): New functions.
655 (insert_vlensi, extract_vlensi): New functions.
656 (insert_vleui, extract_vleui): New functions.
657 (insert_vleil, extract_vleil): New functions.
658 (BI_MASK, BB_MASK, BT): Use PPC_OPERAND_CR_BIT.
659 (BI16, BI32, BO32, B8): New.
660 (B15, B24, CRD32, CRS): New.
661 (CRD, OBF, BFA, CR, CRFS): Use PPC_OPERAND_CR_REG.
662 (DB, IMM20, RD, Rx, ARX, RY, RZ): New.
663 (ARY, SCLSCI8, SCLSCI8N, SE_SD, SE_SDH): New.
664 (SH6_MASK): Use PPC_OPSHIFT_INV.
665 (SI8, UI5, OIMM5, UI7, BO16): New.
666 (VLESIMM, VLENSIMM, VLEUIMM, VLEUIMML): New.
667 (XT6, XA6, XB6, XB6S, XC6): Use PPC_OPSHIFT_INV.
669 (insert_sprg, extract_sprg): Check ALLOW8_SPRG.
670 (OPVUP, OPVUP_MASK OPVUP): New
671 (BD8, BD8_MASK, BD8IO, BD8IO_MASK): New.
672 (EBD8IO, EBD8IO1_MASK, EBD8IO2_MASK, EBD8IO3_MASK): New.
673 (BD15, BD15_MASK, EBD15, EBD15_MASK, EBD15BI, EBD15BI_MASK): New.
674 (BD24,BD24_MASK, C_LK, C_LK_MASK, C, C_MASK): New.
675 (IA16, IA16_MASK, I16A, I16A_MASK, I16L, I16L_MASK): New.
676 (IM7, IM7_MASK, LI20, LI20_MASK, SCI8, SCI8_MASK): New.
677 (SCI8BF, SCI8BF_MASK, SD4, SD4_MASK): New.
678 (SE_IM5, SE_IM5_MASK): New.
679 (SE_R, SE_R_MASK, SE_RR, SE_RR_MASK): New.
680 (EX, EX_MASK, BO16F, BO16T, BO32F, BO32T): New.
681 (BO32DNZ, BO32DZ): New.
682 (NO371, PPCSPE, PPCISEL, PPCEFS, MULHW): Include PPC_OPCODE_VLE.
684 (powerpc_opcodes): Add new VLE instructions. Update existing
685 instruction to include PPCVLE if supported.
686 * ppc-dis.c (ppc_opts): Add vle entry.
687 (get_powerpc_dialect): New function.
688 (powerpc_init_dialect): VLE support.
689 (print_insn_big_powerpc): Call get_powerpc_dialect.
690 (print_insn_little_powerpc): Likewise.
691 (operand_value_powerpc): Handle negative shift counts.
692 (print_insn_powerpc): Handle 2-byte instruction lengths.
694 2012-05-11 Daniel Richard G. <skunk@iskunk.org>
697 * configure.in: Invoke ACX_HEADER_STRING.
698 * configure: Regenerate.
699 * config.in: Regenerate.
700 * sysdep.h: If STRINGS_WITH_STRING is defined then include both
701 string.h and strings.h.
703 2012-05-11 Nick Clifton <nickc@redhat.com>
706 * arm-dis.c (print_insn): Fix detection of instruction mode in
707 files containing multiple executable sections.
709 2012-05-03 Sean Keys <skeys@ipdatasys.com>
711 * Makefile.in, configure: regenerate
712 * disassemble.c (disassembler): Recognize ARCH_XGATE.
713 * xgate-dis.c (read_memory, print_insn, print_insn_xgate):
715 * configure.in: Recognize xgate.
716 * xgate-dis.c, xgate-opc.c: New files for support of xgate
717 * Makefile.am (CFILES, ALL_MACHINES): New files for disassembly
718 and opcode generation for xgate.
720 2012-04-30 DJ Delorie <dj@redhat.com>
722 * rx-decode.opc (MOV): Do not sign-extend immediates which are
723 already the maximum bit size.
724 * rx-decode.c: Regenerate.
726 2012-04-27 David S. Miller <davem@davemloft.net>
728 * sparc-dis.c (v9a_asr_reg_names): Add 'cfr'.
729 * sparc-opc.c (sparc_opcodes): Add rd/wr cases for %cfr.
731 * sparc-opc.c (sparc_opcodes): Add 'wr X, %pause' and 'pause'.
732 * sparc-dis.c (v9a_asr_reg_names): Add 'pause'.
734 * sparc-opc.c (CBCOND): New define.
735 (CBCOND_XCC): Likewise.
736 (cbcond): New helper macro.
737 (sparc_opcodes): Add compare-and-branch instructions.
739 * sparc-dis.c (print_insn_sparc): Handle ')'.
740 * sparc-opc.c (sparc_opcodes): Add crypto instructions.
742 * sparc-opc.c (sparc_opcodes): Rework table to put HWCAP values
743 into new struct sparc_opcode 'hwcaps' field instead of 'flags'.
745 2012-04-12 David S. Miller <davem@davemloft.net>
747 * sparc-dis.c (X_DISP10): Define.
748 (print_insn_sparc): Handle '='.
750 2012-04-01 Mike Frysinger <vapier@gentoo.org>
752 * bfin-dis.c (fmtconst): Replace decimal handling with a single
753 sprintf call and the '*' field width.
755 2012-03-23 Maxim Kuvyrkov <maxim@codesourcery.com>
757 * mips-dis.c (mips_arch_choices): Add entry for Broadcom XLP.
759 2012-03-16 Alan Modra <amodra@gmail.com>
761 * ppc-dis.c (PPC_OPC_SEGS, PPC_OP_TO_SEG): Delete.
762 (powerpc_opcd_indices): Bump array size.
763 (disassemble_init_powerpc): Set powerpc_opcd_indices entries
764 corresponding to unused opcodes to following entry.
765 (lookup_powerpc): New function, extracted and optimised from..
766 (print_insn_powerpc): ..here.
768 2012-03-15 Alan Modra <amodra@gmail.com>
769 James Lemke <jwlemke@codesourcery.com>
771 * disassemble.c (disassemble_init_for_target): Handle ppc init.
772 * ppc-dis.c (private): New var.
773 (powerpc_init_dialect): Don't return calloc failure, instead use
775 (PPC_OPCD_SEGS, PPC_OP_TO_SEG): Define.
776 (powerpc_opcd_indices): New array.
777 (disassemble_init_powerpc): New function.
778 (print_insn_big_powerpc): Don't init dialect here.
779 (print_insn_little_powerpc): Likewise.
780 (print_insn_powerpc): Start search using powerpc_opcd_indices.
782 2012-03-10 Edmar Wienskoski <edmar@freescale.com>
784 * ppc-dis.c (ppc_opts): Add entries for "e5500" and "e6500".
785 * ppc-opc.c (insert_ls, TMR, ESYNC, XSYNCLE_MASK): New.
786 (PPCVEC2, PPCTMR, E6500): New short names.
787 (powerpc_opcodes): Add vabsdub, vabsduh, vabsduw, dni, mvidsplt,
788 mviwsplt, icblq., mftmr, mttmr, dcblq., miso, lvexbx, lvexhx,
789 lvexwx, stvexbx, stvexhx, stvexwx, lvepx, lvepxl, stvepx, stvepxl,
790 lvtrx, lvtrxl, lvtlx, lvtlxl, stvfrx, stvfrxl, stvflx, stvflxl,
791 lvswx, lvswxl, stvswx, stvswxl, lvsm mnemonics. Accept LS, ESYNC
792 optional operands on sync instruction for E6500 target.
794 2012-03-08 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
796 * s390-opc.txt: Set instruction type of pku to SS_L2RDRD.
798 2012-02-27 Alan Modra <amodra@gmail.com>
800 * mt-dis.c: Regenerate.
802 2012-02-27 Alan Modra <amodra@gmail.com>
804 * v850-opc.c (extract_v8): Rearrange to make it obvious this
805 is the inverse of corresponding insert function.
806 (extract_d22, extract_u9, extract_r4): Likewise.
807 (extract_d9): Correct sign extension.
808 (extract_d16_15): Don't assume "long" is 32 bits, and don't
809 rely on implementation defined behaviour for shift right of
811 (extract_d16_16, extract_d17_16, extract_i9): Likewise.
812 (extract_d23): Likewise, and correct mask.
814 2012-02-27 Alan Modra <amodra@gmail.com>
816 * crx-dis.c (print_arg): Mask constant to 32 bits.
817 * crx-opc.c (cst4_map): Use int array.
819 2012-02-27 Alan Modra <amodra@gmail.com>
821 * arc-dis.c (BITS): Don't use shifts to mask off bits.
822 (FIELDD): Sign extend with xor,sub.
824 2012-02-25 Walter Lee <walt@tilera.com>
826 * tilegx-opc.c: Handle TILEGX_OPC_LD4S_TLS and TILEGX_OPC_LD_TLS.
827 * tilepro-opc.c: Handle TILEPRO_OPC_LW_TLS and
828 TILEPRO_OPC_LW_TLS_SN.
830 2012-02-21 H.J. Lu <hongjiu.lu@intel.com>
832 * i386-opc.h (HLEPrefixNone): New.
833 (HLEPrefixLock): Likewise.
834 (HLEPrefixAny): Likewise.
835 (HLEPrefixRelease): Likewise.
837 2012-02-08 H.J. Lu <hongjiu.lu@intel.com>
839 * i386-dis.c (HLE_Fixup1): New.
840 (HLE_Fixup2): Likewise.
841 (HLE_Fixup3): Likewise.
848 (MOD_C6_REG_7): Likewise.
849 (MOD_C7_REG_7): Likewise.
850 (RM_C6_REG_7): Likewise.
851 (RM_C7_REG_7): Likewise.
852 (XACQUIRE_PREFIX): Likewise.
853 (XRELEASE_PREFIX): Likewise.
854 (dis386): Use Ebh1/Evh1 on add, adc, and, btc, btr, bts,
855 cmpxchg, dec, inc, neg, not, or, sbb, sub, xor and xadd. Use
856 Ebh2/Evh2 on xchg. Use Ebh3/Evh3 on mov.
857 (reg_table): Use Ebh1/Evh1 on add, adc, and, dec, inc, neg,
858 not, or, sbb, sub and xor. Use Ebh3/Evh3 on mov. Use
859 MOD_C6_REG_7 and MOD_C7_REG_7.
860 (mod_table): Add MOD_C6_REG_7 and MOD_C7_REG_7.
861 (rm_table): Add RM_C6_REG_7 and RM_C7_REG_7. Add xend and
863 (prefix_name): Handle XACQUIRE_PREFIX and XRELEASE_PREFIX.
864 (CMPXCHG8B_Fixup): Handle HLE prefix on cmpxchg8b.
866 * i386-gen.c (cpu_flag_init): Add CPU_HLE_FLAGS and
868 (cpu_flags): Add CpuHLE and CpuRTM.
869 (opcode_modifiers): Add HLEPrefixOk.
871 * i386-opc.h (CpuHLE): New.
873 (HLEPrefixOk): Likewise.
874 (i386_cpu_flags): Add cpuhle and cpurtm.
875 (i386_opcode_modifier): Add hleprefixok.
877 * i386-opc.tbl: Add HLEPrefixOk=3 to mov. Add HLEPrefixOk to
878 add, adc, and, btc, btr, bts, cmpxchg, dec, inc, neg, not, or,
879 sbb, sub, xor and xadd. Add HLEPrefixOk=2 to xchg with memory
880 operand. Add xacquire, xrelease, xabort, xbegin, xend and
882 * i386-init.h: Regenerated.
883 * i386-tbl.h: Likewise.
885 2012-01-24 DJ Delorie <dj@redhat.com>
887 * rl78-decode.opc (rl78_decode_opcode): Add NOT1.
888 * rl78-decode.c: Regenerate.
890 2012-01-17 James Murray <jsm@jsm-net.demon.co.uk>
893 * cr16-dis.c (print_arg): Test symtab_size not num_symbols.
895 2012-01-17 Andreas Schwab <schwab@linux-m68k.org>
897 * m68k-opc.c (m68k_opcodes): Fix entries for pmove with BADx/BACx
898 register and move them after pmove with PSR/PCSR register.
900 2012-01-13 H.J. Lu <hongjiu.lu@intel.com>
902 * i386-dis.c (mod_table): Add vmfunc.
904 * i386-gen.c (cpu_flag_init): Add CPU_VMFUNC_FLAGS.
905 (cpu_flags): CpuVMFUNC.
907 * i386-opc.h (CpuVMFUNC): New.
908 (i386_cpu_flags): Add cpuvmfunc.
910 * i386-opc.tbl: Add vmfunc.
911 * i386-init.h: Regenerated.
912 * i386-tbl.h: Likewise.
914 For older changes see ChangeLog-2011
920 version-control: never