1 2008-05-21 M R Swami Reddy <MR.Swami.Reddy@nsc.com>
3 * cr16-dis.c (build_mask): Adjust the mask for 32-bit bcond.
5 2008-05-14 Alan Modra <amodra@bigpond.net.au>
7 * Makefile.am: Run "make dep-am".
8 * Makefile.in: Regenerate.
10 2008-05-02 H.J. Lu <hongjiu.lu@intel.com>
12 * i386-dis.c (MOVBE_Fixup): New.
14 (PREFIX_0F3880): Likewise.
15 (PREFIX_0F3881): Likewise.
16 (PREFIX_0F38F0): Updated.
17 (prefix_table): Add PREFIX_0F3880 and PREFIX_0F3881. Update
18 PREFIX_0F38F0 and PREFIX_0F38F1 for movbe.
19 (three_byte_table): Use PREFIX_0F3880 and PREFIX_0F3881.
21 * i386-gen.c (cpu_flag_init): Add CPU_MOVBE_FLAGS and
23 (cpu_flags): Add CpuMovbe and CpuEPT.
25 * i386-opc.h (CpuMovbe): New.
28 (i386_cpu_flags): Add cpumovbe and cpuept.
30 * i386-opc.tbl: Add entries for movbe and EPT instructions.
31 * i386-init.h: Regenerated.
32 * i386-tbl.h: Likewise.
34 2008-04-29 Adam Nemet <anemet@caviumnetworks.com>
36 * mips-opc.c (mips_builtin_opcodes): Set field `match' to 0 for
37 the two drem and the two dremu macros.
39 2008-04-28 Adam Nemet <anemet@caviumnetworks.com>
41 * mips-opc.c (mips_builtin_opcodes): Mark prefx and c1
42 instructions FP_S. Mark l.s, li.s, lwc1, swc1, s.s, trunc.w.s and
43 cop1 macros INSN2_M_FP_S. Mark l.d, li.d, ldc1 and sdc1 macros
44 INSN2_M_FP_D. Mark trunc.w.d macro INSN2_M_FP_S and INSN2_M_FP_D.
46 2008-04-25 David S. Miller <davem@davemloft.net>
48 * sparc-dis.c: Emit %stick instead of %sys_tick, and %stick_cmpr
49 instead of %sys_tick_cmpr, as suggested in architecture manuals.
51 2008-04-23 Paolo Bonzini <bonzini@gnu.org>
53 * aclocal.m4: Regenerate.
54 * configure: Regenerate.
56 2008-04-23 David S. Miller <davem@davemloft.net>
58 * sparc-opc.c (asi_table): Add UltraSPARC and Niagara
60 (prefetch_table): Add missing values.
62 2008-04-22 H.J. Lu <hongjiu.lu@intel.com>
64 * i386-gen.c (opcode_modifiers): Add NoAVX.
66 * i386-opc.h (NoAVX): New.
68 (i386_opcode_modifier): Add noavx.
70 * i386-opc.tbl: Add NoAVX to SSE, SSE2, SSE3 and SSSE3
71 instructions which don't have AVX equivalent.
72 * i386-tbl.h: Regenerated.
74 2008-04-18 H.J. Lu <hongjiu.lu@intel.com>
76 * i386-dis.c (OP_VEX_FMA): New.
77 (OP_EX_VexImmW): Likewise.
79 (Vex128FMA): Likewise.
80 (EXVexImmW): Likewise.
81 (get_vex_imm8): Likewise.
82 (OP_EX_VexReg): Likewise.
83 (vex_i4_done): Renamed to ...
85 (prefix_table): Replace EXVexW with EXVexImmW on vpermil2ps
86 and vpermil2pd. Replace Vex/Vex128 with VexFMA/Vex128FMA on
88 (print_insn): Updated.
89 (OP_EX_VexW): Rewrite to swap register in VEX with EX.
90 (OP_REG_VexI4): Check invalid high registers.
92 2008-04-16 Dwarakanath Rajagopal <dwarak.rajagopal@amd.com>
93 Michael Meissner <michael.meissner@amd.com>
95 * i386-opc.tbl: Fix protX to allow memory in the middle operand.
96 * i386-tbl.h: Regenerate from i386-opc.tbl.
98 2008-04-14 Edmar Wienskoski <edmar@freescale.com>
100 * ppc-dis.c (powerpc_dialect): Handle "e500mc". Extend "e500" to
101 accept Power E500MC instructions.
102 (print_ppc_disassembler_options): Document -Me500mc.
103 * ppc-opc.c (DUIS, DUI, T): New.
104 (XRT, XRTRA): Likewise.
106 (powerpc_opcodes): Add new Power E500MC instructions.
108 2008-04-10 Andreas Krebbel <krebbel1@de.ibm.com>
110 * s390-dis.c (init_disasm): Evaluate disassembler_options.
111 (print_s390_disassembler_options): New function.
112 * disassemble.c (disassembler_usage): Invoke
113 print_s390_disassembler_options.
115 2008-04-10 Andreas Krebbel <krebbel1@de.ibm.com>
117 * s390-mkopc.c (insertExpandedMnemonic): Expand string sizes
118 of local variables used for mnemonic parsing: prefix, suffix and
121 2008-04-10 Andreas Krebbel <krebbel1@de.ibm.com>
123 * s390-mkopc.c (s390_cond_ext_format): Add back the mnemonic
124 extensions for conditional jumps (o, p, m, nz, z, nm, np, no).
125 (s390_crb_extensions): New extensions table.
126 (insertExpandedMnemonic): Handle '$' tag.
127 * s390-opc.txt: Remove conditional jump variants which can now
128 be expanded automatically.
129 Replace '*' tag with '$' in the compare and branch instructions.
131 2008-04-07 H.J. Lu <hongjiu.lu@intel.com>
133 * i386-dis.c (PREFIX_VEX_38XX): Add a tab.
134 (PREFIX_VEX_3AXX): Likewis.
136 2008-04-07 H.J. Lu <hongjiu.lu@intel.com>
138 * i386-opc.tbl: Remove 4 extra blank lines.
140 2008-04-04 H.J. Lu <hongjiu.lu@intel.com>
142 * i386-gen.c (cpu_flag_init): Replace CPU_CLMUL_FLAGS/CpuCLMUL
143 with CPU_PCLMUL_FLAGS/CpuPCLMUL.
144 (cpu_flags): Replace CpuCLMUL with CpuPCLMUL.
145 * i386-opc.tbl: Likewise.
147 * i386-opc.h (CpuCLMUL): Renamed to ...
150 (i386_cpu_flags): Replace cpuclmul with cpupclmul.
152 * i386-init.h: Regenerated.
154 2008-04-03 H.J. Lu <hongjiu.lu@intel.com>
156 * i386-dis.c (OP_E_register): New.
157 (OP_E_memory): Likewise.
159 (OP_EX_Vex): Likewise.
160 (OP_EX_VexW): Likewise.
161 (OP_XMM_Vex): Likewise.
162 (OP_XMM_VexW): Likewise.
163 (OP_REG_VexI4): Likewise.
164 (PCLMUL_Fixup): Likewise.
165 (VEXI4_Fixup): Likewise.
166 (VZERO_Fixup): Likewise.
167 (VCMP_Fixup): Likewise.
168 (VPERMIL2_Fixup): Likewise.
169 (rex_original): Likewise.
170 (rex_ignored): Likewise.
191 (VPERMIL2): Likewise.
192 (xmm_mode): Likewise.
193 (xmmq_mode): Likewise.
194 (ymmq_mode): Likewise.
195 (vex_mode): Likewise.
196 (vex128_mode): Likewise.
197 (vex256_mode): Likewise.
198 (USE_VEX_C4_TABLE): Likewise.
199 (USE_VEX_C5_TABLE): Likewise.
200 (USE_VEX_LEN_TABLE): Likewise.
201 (VEX_C4_TABLE): Likewise.
202 (VEX_C5_TABLE): Likewise.
203 (VEX_LEN_TABLE): Likewise.
204 (REG_VEX_XX): Likewise.
205 (MOD_VEX_XXX): Likewise.
206 (PREFIX_0F38DB..PREFIX_0F38DF): Likewise.
207 (PREFIX_0F3A44): Likewise.
208 (PREFIX_0F3ADF): Likewise.
209 (PREFIX_VEX_XXX): Likewise.
211 (VEX_OF38): Likewise.
212 (VEX_OF3A): Likewise.
213 (VEX_LEN_XXX): Likewise.
215 (need_vex): Likewise.
216 (need_vex_reg): Likewise.
217 (vex_i4_done): Likewise.
218 (vex_table): Likewise.
219 (vex_len_table): Likewise.
220 (OP_REG_VexI4): Likewise.
221 (vex_cmp_op): Likewise.
222 (pclmul_op): Likewise.
223 (vpermil2_op): Likewise.
226 (PREFIX_0F38F0): Likewise.
227 (PREFIX_0F3A60): Likewise.
228 (reg_table): Add REG_VEX_71...REG_VEX_73 and REG_VEX_AE.
229 (prefix_table): Add PREFIX_0F38DB..PREFIX_0F38DF, PREFIX_0F3ADF
230 and PREFIX_VEX_XXX entries.
231 (x86_64_table): Use VEX_C4_TABLE and VEX_C5_TABLE.
232 (three_byte_table): Use PREFIX_0F38DB..PREFIX_0F38DF and
234 (mod_table): Use VEX_C4_TABLE, VEX_C5_TABLE and VEX_LEN_TABLE.
235 Add MOD_VEX_XXX entries.
236 (ckprefix): Initialize rex_original and rex_ignored. Store the
237 REX byte in rex_original.
238 (get_valid_dis386): Handle the implicit prefix in VEX prefix
239 bytes and USE_VEX_LEN_TABLE/USE_VEX_C4_TABLE/USE_VEX_C5_TABLE.
240 (print_insn): Set need_vex/need_vex_reg/vex_i4_done to 0 before
241 calling get_valid_dis386. Use rex_original and rex_ignored when
243 (putop): Handle "XY".
244 (intel_operand_size): Handle VEX, xmm_mode, xmmq_mode and
246 (OP_E_extended): Updated to use OP_E_register and
248 (OP_XMM): Handle VEX.
250 (XMM_Fixup): Likewise.
251 (CMP_Fixup): Use ARRAY_SIZE.
253 * i386-gen.c (cpu_flag_init): Add CpuAES, CPU_CLMUL_FLAGS,
254 CPU_FMA_FLAGS and CPU_AVX_FLAGS.
255 (operand_type_init): Add OPERAND_TYPE_REGYMM and
256 OPERAND_TYPE_VEX_IMM4.
257 (cpu_flags): Add CpuAVX, CpuAES, CpuCLMUL and CpuFMA.
258 (opcode_modifiers): Add Implicit1stXmm0, Vex, Vex256, VexNDD,
259 VexNDS, VexW0, VexW1, Vex0F, Vex0F38, Vex0F3A, Vex3Sources,
260 VexImmExt and SSE2AVX.
261 (operand_types): Add RegYMM, Ymmword and Vex_Imm4.
263 * i386-opc.h (CpuAVX): New.
265 (CpuCLMUL): Likewise.
276 (Vex3Sources): Likewise.
277 (VexImmExt): Likewise.
281 (Vex_Imm4): Likewise.
282 (Implicit1stXmm0): Likewise.
285 (ByteOkIntel): Likewise.
288 (Unspecified): Likewise.
290 (i386_cpu_flags): Add cpuavx, cpuaes, cpuclmul and cpufma.
291 (i386_opcode_modifier): Add implicit1stxmm0, vex, vex256,
292 vexnds, vexndd, vexw0, vexw1, vex0f, vex0f38, vex0f3a,
293 vex3sources, veximmext and sse2avx.
294 (i386_operand_type): Add regymm, ymmword and vex_imm4.
296 * i386-opc.tbl: Add AES, CLMUL, AVX and FMA new instructions.
298 * i386-reg.tbl: Add AVX registers, ymm0..ymm15.
300 * i386-init.h: Regenerated.
301 * i386-tbl.h: Likewise.
303 2008-03-26 Bernd Schmidt <bernd.schmidt@analog.com>
305 From Robin Getz <robin.getz@analog.com>
306 * bfin-dis.c (bu32): Typedef.
307 (enum const_forms_t): Add c_uimm32 and c_huimm32.
308 (constant_formats[]): Add uimm32 and huimm16.
313 (luimm16_val): Define.
314 (struct saved_state): Define.
315 (GREG, DPREG, DREG, PREG, SPREG, FPREG, IREG, MREG, BREG, LREG,
316 A0XREG, A0WREG, A1XREG, A1WREG,CCREG, LC0REG, LT0REG, LB0REG,
317 LC1REG, LT1REG, LB1REG, RETSREG, PCREG): Define.
319 (decode_LDIMMhalf_0): Print out the whole register value.
321 From Jie Zhang <jie.zhang@analog.com>
322 * bfin-dis.c (decode_dsp32mac_0): Decode (IU) option for
323 multiply and multiply-accumulate to data register instruction.
325 * bfin-dis.c: (c_uimm4s4d, c_imm5d, c_imm7d, c_imm16d, c_uimm16s4d,
326 c_imm32, c_huimm32e): Define.
327 (constant_formats): Add flags for printing decimal, leading spaces, and
329 (comment, parallel): Add global flags in all disassembly.
330 (fmtconst): Take advantage of new flags, and print default in hex.
331 (fmtconst_val): Likewise.
332 (decode_macfunc): Be consistant with spaces, tabs, comments,
333 capitalization in disassembly, fix minor coding style issues.
334 (reg_names, amod0, amod1, amod0amod2, aligndir, get_allreg): Likewise.
335 (decode_ProgCtrl_0, decode_PushPopMultiple_0, decode_CCflag_0,
336 decode_CC2dreg_0, decode_CC2stat_0, decode_BRCC_0, decode_UJUMP_0,
337 decode_REGMV_0, decode_ALU2op_0, decode_PTR2op_0, decode_LOGI2op_0,
338 decode_COMP3op_0, decode_COMPI2opD_0, decode_COMPI2opP_0,
339 decode_LDSTpmod_0, decode_dagMODim_0, decode_dagMODik_0,
340 decode_dspLDST_0, decode_LDST_0, decode_LDSTiiFP_0, decode_LDSTii_0,
341 decode_LoopSetup_0, decode_LDIMMhalf_0, decode_CALLa_0,
342 decode_LDSTidxI_0, decode_linkage_0, decode_dsp32alu_0,
343 decode_dsp32shift_0, decode_dsp32shiftimm_0, decode_pseudodbg_assert_0,
344 _print_insn_bfin, print_insn_bfin): Likewise.
346 2008-03-17 Ralf Wildenhues <Ralf.Wildenhues@gmx.de>
348 * aclocal.m4: Regenerate.
349 * configure: Likewise.
350 * Makefile.in: Likewise.
352 2008-03-13 Alan Modra <amodra@bigpond.net.au>
354 * Makefile.am: Run "make dep-am".
355 * Makefile.in: Regenerate.
356 * configure: Regenerate.
358 2008-03-07 Alan Modra <amodra@bigpond.net.au>
360 * ppc-opc.c (powerpc_opcodes): Order and format.
362 2008-03-01 H.J. Lu <hongjiu.lu@intel.com>
364 * i386-opc.tbl: Allow 16-bit near indirect branches for x86-64.
365 * i386-tbl.h: Regenerated.
367 2008-02-23 H.J. Lu <hongjiu.lu@intel.com>
369 * i386-opc.tbl: Disallow 16-bit near indirect branches for
371 * i386-tbl.h: Regenerated.
373 2008-02-21 Jan Beulich <jbeulich@novell.com>
375 * i386-opc.tbl: Allow Dword for far indirect call. Allow Dword
376 and Fword for far indirect jmp. Allow Reg16 and Word for near
377 indirect jmp on x86-64. Disallow Fword for lcall.
378 * i386-tbl.h: Re-generate.
380 2008-02-18 M R Swami Reddy <MR.Swami.Reddy@nsc.com>
382 * cr16-opc.c (cr16_num_optab): Defined
384 2008-02-16 H.J. Lu <hongjiu.lu@intel.com>
386 * i386-gen.c (operand_type_init): Add OPERAND_TYPE_INOUTPORTREG.
387 * i386-init.h: Regenerated.
389 2008-02-14 Nick Clifton <nickc@redhat.com>
392 * configure.in (SHARED_LIBADD): Select the correct host specific
393 file extension for shared libraries.
394 * configure: Regenerate.
396 2008-02-13 Jan Beulich <jbeulich@novell.com>
398 * i386-opc.h (RegFlat): New.
399 * i386-reg.tbl (flat): Add.
400 * i386-tbl.h: Re-generate.
402 2008-02-13 Jan Beulich <jbeulich@novell.com>
404 * i386-dis.c (a_mode): New.
405 (cond_jump_mode): Adjust.
406 (Ma): Change to a_mode.
407 (intel_operand_size): Handle a_mode.
408 * i386-opc.tbl: Allow Dword and Qword for bound.
409 * i386-tbl.h: Re-generate.
411 2008-02-13 Jan Beulich <jbeulich@novell.com>
413 * i386-gen.c (process_i386_registers): Process new fields.
414 * i386-opc.h (reg_entry): Shrink reg_flags and reg_num to
415 unsigned char. Add dw2_regnum and Dw2Inval.
416 * i386-reg.tbl: Provide initializers for dw2_regnum. Add pseudo
418 * i386-tbl.h: Re-generate.
420 2008-02-11 H.J. Lu <hongjiu.lu@intel.com>
422 * i386-gen.c (cpu_flag_init): Add CPU_XSAVE_FLAGS.
423 * i386-init.h: Updated.
425 2008-02-11 H.J. Lu <hongjiu.lu@intel.com>
427 * i386-gen.c (cpu_flags): Add CpuXsave.
429 * i386-opc.h (CpuXsave): New.
431 (i386_cpu_flags): Add cpuxsave.
433 * i386-dis.c (MOD_0FAE_REG_4): New.
434 (RM_0F01_REG_2): Likewise.
435 (MOD_0FAE_REG_5): Updated.
436 (RM_0F01_REG_3): Likewise.
437 (reg_table): Use MOD_0FAE_REG_4.
438 (mod_table): Use RM_0F01_REG_2. Add MOD_0FAE_REG_4. Updated
440 (rm_table): Add RM_0F01_REG_2.
442 * i386-opc.tbl: Add xsave, xrstor, xgetbv and xsetbv.
443 * i386-init.h: Regenerated.
444 * i386-tbl.h: Likewise.
446 2008-02-11 Jan Beulich <jbeulich@novell.com>
448 * i386-opc.tbl: Remove Disp32S from CpuNo64 opcodes. Remove
449 Disp16 from Cpu64 non-jump opcodes (including loop and j?cxz).
450 * i386-tbl.h: Re-generate.
452 2008-02-04 H.J. Lu <hongjiu.lu@intel.com>
455 * configure: Regenerated.
457 2008-02-04 Adam Nemet <anemet@caviumnetworks.com>
459 * mips-dis.c: Update copyright.
460 (mips_arch_choices): Add Octeon.
461 * mips-opc.c: Update copyright.
463 (mips_builtin_opcodes): Add Octeon instruction synciobdma.
465 2008-01-29 Alan Modra <amodra@bigpond.net.au>
467 * ppc-opc.c: Support optional L form mtmsr.
469 2008-01-24 H.J. Lu <hongjiu.lu@intel.com>
471 * i386-dis.c (OP_E_extended): Handle r12 like rsp.
473 2008-01-23 H.J. Lu <hongjiu.lu@intel.com>
475 * i386-gen.c (cpu_flag_init): Add CpuLM to CPU_GENERIC64_FLAGS.
476 * i386-init.h: Regenerated.
478 2008-01-23 Tristan Gingold <gingold@adacore.com>
480 * ia64-dis.c (print_insn_ia64): Display symbolic name of ar.fcr,
481 ar.eflag, ar.csd, ar.ssd, ar.cflg, ar.fsr, ar.fir and ar.fdr.
483 2008-01-22 H.J. Lu <hongjiu.lu@intel.com>
485 * i386-gen.c (cpu_flag_init): Remove CpuMMX2.
486 (cpu_flags): Likewise.
488 * i386-opc.h (CpuMMX2): Removed.
491 * i386-opc.tbl: Replace CpuMMX2 with CpuSSE|Cpu3dnowA.
492 * i386-init.h: Regenerated.
493 * i386-tbl.h: Likewise.
495 2008-01-22 H.J. Lu <hongjiu.lu@intel.com>
497 * i386-gen.c (cpu_flag_init): Add CPU_VMX_FLAGS and
499 * i386-init.h: Regenerated.
501 2008-01-15 H.J. Lu <hongjiu.lu@intel.com>
503 * i386-opc.tbl: Use Qword on movddup.
504 * i386-tbl.h: Regenerated.
506 2008-01-15 H.J. Lu <hongjiu.lu@intel.com>
508 * i386-opc.tbl: Put back 16bit movsx/movzx for AT&T syntax.
509 * i386-tbl.h: Regenerated.
511 2008-01-15 H.J. Lu <hongjiu.lu@intel.com>
513 * i386-dis.c (Mx): New.
514 (PREFIX_0FC3): Likewise.
515 (PREFIX_0FC7_REG_6): Updated.
516 (dis386_twobyte): Use PREFIX_0FC3.
517 (prefix_table): Add PREFIX_0FC3. Use Mq on movntq and movntsd.
518 Use Mx on movntps, movntpd, movntdq and movntdqa. Use Md on
521 2008-01-14 H.J. Lu <hongjiu.lu@intel.com>
523 * i386-gen.c (opcode_modifiers): Add IntelSyntax.
524 (operand_types): Add Mem.
526 * i386-opc.h (IntelSyntax): New.
527 * i386-opc.h (Mem): New.
529 (Opcode_Modifier_Max): Updated.
530 (i386_opcode_modifier): Add intelsyntax.
531 (i386_operand_type): Add mem.
533 * i386-opc.tbl: Remove Reg16 from movnti. Add sizes to more
536 * i386-reg.tbl: Add size for accumulator.
538 * i386-init.h: Regenerated.
539 * i386-tbl.h: Likewise.
541 2008-01-13 H.J. Lu <hongjiu.lu@intel.com>
543 * i386-opc.h (Byte): Fix a typo.
545 2008-01-12 H.J. Lu <hongjiu.lu@intel.com>
548 * i386-gen.c (operand_type_init): Add Dword to
549 OPERAND_TYPE_ACC32. Add Qword to OPERAND_TYPE_ACC64.
550 (opcode_modifiers): Remove CheckSize, Byte, Word, Dword,
552 (operand_types): Add Byte, Word, Dword, Fword, Qword, Tbyte,
553 Xmmword, Unspecified and Anysize.
554 (set_bitfield): Make Mmword an alias of Qword. Make Oword
557 * i386-opc.h (CheckSize): Removed.
565 (i386_opcode_modifier): Remove checksize, byte, word, dword,
569 (Unspecified): Likewise.
571 (i386_operand_type): Add byte, word, dword, fword, qword,
572 tbyte xmmword, unspecified and anysize.
574 * i386-opc.tbl: Updated to use Byte, Word, Dword, Fword, Qword,
575 Tbyte, Xmmword, Unspecified and Anysize.
577 * i386-reg.tbl: Add size for accumulator.
579 * i386-init.h: Regenerated.
580 * i386-tbl.h: Likewise.
582 2008-01-10 H.J. Lu <hongjiu.lu@intel.com>
584 * i386-dis.c (REG_0F0E): Renamed to REG_0F0D.
586 (reg_table): Updated.
587 (dis386_twobyte): Updated. Use "nopQ" on 0x19 to 0x1e.
588 (twobyte_has_modrm): Set 1 for 0x19 to 0x1e.
590 2008-01-08 H.J. Lu <hongjiu.lu@intel.com>
592 * i386-gen.c (set_bitfield): Use fail () on error.
594 2008-01-08 H.J. Lu <hongjiu.lu@intel.com>
596 * i386-gen.c (lineno): New.
597 (filename): Likewise.
598 (set_bitfield): Report filename and line numer on error.
599 (process_i386_opcodes): Set filename and update lineno.
600 (process_i386_registers): Likewise.
602 2008-01-05 H.J. Lu <hongjiu.lu@intel.com>
604 * i386-gen.c (opcode_modifiers): Rename IntelMnemonic to
607 * i386-opc.h (IntelMnemonic): Renamed to ..
609 (Opcode_Modifier_Max): Updated.
610 (i386_opcode_modifier): Remove intelmnemonic. Add attsyntax
613 * i386-opc.tbl: Remove IntelMnemonic and update with ATTSyntax
614 on fsub, fubp, fsubr, fsubrp, div, fdivp, fdivr and fdivrp.
615 * i386-tbl.h: Regenerated.
617 2008-01-04 H.J. Lu <hongjiu.lu@intel.com>
619 * i386-gen.c: Update copyright to 2008.
620 * i386-opc.h: Likewise.
621 * i386-opc.tbl: Likewise.
623 * i386-init.h: Regenerated.
624 * i386-tbl.h: Likewise.
626 2008-01-04 H.J. Lu <hongjiu.lu@intel.com>
628 * i386-opc.tbl: Add NoRex64 to extractps, movmskpd, movmskps,
629 pextrb, pextrw, pinsrb, pinsrw and pmovmskb.
630 * i386-tbl.h: Regenerated.
632 2008-01-03 H.J. Lu <hongjiu.lu@intel.com>
634 * i386-gen.c (cpu_flag_init): Remove CpuSSE4_1_Or_5 and
636 (cpu_flags): Likewise.
638 * i386-opc.h (CpuSSE4_1_Or_5): Removed.
639 (CpuSSE4_2_Or_ABM): Likewise.
641 (i386_cpu_flags): Remove cpusse4_1_or_5 and cpusse4_2_or_abm.
643 * i386-opc.tbl: Replace CpuSSE4_1_Or_5, CpuSSE4_2_Or_ABM and
644 Cpu686|CpuPadLock with CpuSSE4_1|CpuSSE5, CpuABM|CpuSSE4_2
645 and CpuPadLock, respectively.
646 * i386-init.h: Regenerated.
647 * i386-tbl.h: Likewise.
649 2008-01-03 H.J. Lu <hongjiu.lu@intel.com>
651 * i386-gen.c (opcode_modifiers): Remove No_xSuf.
653 * i386-opc.h (No_xSuf): Removed.
654 (CheckSize): Updated.
656 * i386-tbl.h: Regenerated.
658 2008-01-02 H.J. Lu <hongjiu.lu@intel.com>
660 * i386-gen.c (cpu_flag_init): Add CpuSSE4_2_Or_ABM to
661 CPU_AMDFAM10_FLAGS, CPU_SSE4_2_FLAGS, CpuABM and
663 (cpu_flags): Add CpuSSE4_2_Or_ABM.
665 * i386-opc.h (CpuSSE4_2_Or_ABM): New.
667 (i386_cpu_flags): Add cpusse4_2_or_abm.
669 * i386-opc.tbl: Use CpuSSE4_2_Or_ABM instead of
670 CpuABM|CpuSSE4_2 on popcnt.
671 * i386-init.h: Regenerated.
672 * i386-tbl.h: Likewise.
674 2008-01-02 H.J. Lu <hongjiu.lu@intel.com>
676 * i386-opc.h: Update comments.
678 2008-01-02 H.J. Lu <hongjiu.lu@intel.com>
680 * i386-gen.c (opcode_modifiers): Use Qword instead of QWord.
681 * i386-opc.h: Likewise.
682 * i386-opc.tbl: Likewise.
684 2008-01-02 H.J. Lu <hongjiu.lu@intel.com>
687 * i386-gen.c (opcode_modifiers): Add No_xSuf, CheckSize,
688 Byte, Word, Dword, QWord and Xmmword.
690 * i386-opc.h (No_xSuf): New.
691 (CheckSize): Likewise.
698 (i386_opcode_modifier): Add No_xSuf, CheckSize, Byte, Word,
699 Dword, QWord and Xmmword.
701 * i386-opc.tbl: Add CheckSize|QWord to movq if IgnoreSize is
703 * i386-tbl.h: Regenerated.
705 2008-01-02 Mark Kettenis <kettenis@gnu.org>
707 * m88k-dis.c (instructions): Fix fcvt.* instructions.
710 For older changes see ChangeLog-2007
716 version-control: never