1 2012-09-27 Anthony Green <green@moxielogic.com>
3 * moxie-dis.c (print_insn_moxie): Print 'bad' instructions.
4 * moxie-opc.c: All 'bad' instructions have the itype MOXIE_BAD.
6 2012-09-25 Saravanan Ekanathan <saravanan.ekanathan@amd.com>
8 * i386-gen.c (cpu_flag_init): Add missing Cpu flags in
9 CPU_BDVER1_FLAGS, CPU_BDVER2_FLAGS, CPU_BTVER1_FLAGS
11 * i386-init.h: Regenerated.
13 2012-09-20 Michael Zolotukhin <michael.v.zolotukhin@intel.com>
15 * i386-gen.c (cpu_flag_init): Add CpuCX16 to CPU_NOCONA_FLAGS,
16 CPU_CORE_FLAGS, CPU_CORE2_FLAGS, CPU_COREI7_FLAGS,
17 CPU_BDVER1_FLAGS, CPU_BDVER2_FLAGS, CPU_BTVER1_FLAGS,
18 CPU_BTVER2_FLAGS. Add CPU_CX16_FLAGS.
19 (cpu_flags): Add CpuCX16.
20 * i386-opc.h (CpuCX16): New.
21 (i386_cpu_flags): Add cpucx16.
22 * i386-opc.tbl: Replace CpuSSE3 with CpuCX16 for cmpxchg16b.
23 * i386-tbl.h: Regenerate.
24 * i386-init.h: Likewise.
26 2012-09-18 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
28 * arm-dis.c: Changed ldra and strl-form mnemonics
31 2012-09-18 Chao-ying Fu <fu@mips.com>
33 * micromips-opc.c (micromips_opcodes): Correct the encoding of
34 the "swxc1" instruction.
36 2012-09-17 Yufeng Zhang <yufeng.zhang@arm.com>
38 * aarch64-asm.c (aarch64_ins_imm_half): Remove ATTRIBUTE_UNUSED from
40 (aarch64_ins_addr_simm): Add ATTRIBUTE_UNUSED to the parameter 'inst'.
41 (convert_mov_to_movewide): Change to assert (0) when
42 aarch64_wide_constant_p returns FALSE.
44 2012-09-14 David Edelsohn <dje.gcc@gmail.com>
46 * configure: Regenerate.
48 2012-09-14 Anthony Green <green@moxielogic.com>
50 * moxie-dis.c (print_insn_moxie): Branch targets are relative to
51 the address after the branch instruction.
53 2012-09-13 Anthony Green <green@moxielogic.com>
55 * moxie-dis.c (print_insn_moxie): Handle bi-endian encodings.
57 2012-09-10 Matthias Klose <doko@ubuntu.com>
59 * config.in: Disable sanity check for kfreebsd.
61 2012-09-10 H.J. Lu <hongjiu.lu@intel.com>
63 * configure: Regenerated.
65 2012-09-04 Sergey A. Guriev <sergey.a.guriev@intel.com>
67 * ia64-asmtab.h (completer_index): Extend bitfield to full uint.
68 * ia64-gen.c: Promote completer index type to longlong.
69 (irf_operand): Add new register recognition.
70 (in_iclass_mov_x): Add an entry for the new mov_* instruction type.
71 (lookup_specifier): Add new resource recognition.
72 (insert_bit_table_ent): Relax abort condition according to the
73 changed completer index type.
74 (print_dis_table): Fix printf format for completer index.
75 * ia64-ic.tbl: Add a new instruction class.
76 * ia64-opc-i.c (ia64_opcodes_i): Define new I-instructions.
77 * ia64-opc-m.c (ia64_opcodes_m): Define new M-instructions.
78 * ia64-opc.h: Define short names for new operand types.
79 * ia64-raw.tbl: Add new RAW resource for DAHR register.
80 * ia64-waw.tbl: Add new WAW resource for DAHR register.
81 * ia64-asmtab.c: Regenerate.
83 2012-08-29 Peter Bergner <bergner@vnet.ibm.com>
85 * ppc-opc.c (VXASHB_MASK): New define.
86 (powerpc_opcodes) <vsldoi>: Use VXASHB_MASK.
88 2012-08-28 Peter Bergner <bergner@vnet.ibm.com>
90 * ppc-opc.c (UIMM4, UIMM3, UIMM2, VXVA_MASK, VXVB_MASK, VXVAVB_MASK,
91 VXVDVA_MASK, VXUIMM4_MASK, VXUIMM3_MASK, VXUIMM2_MASK): New defines.
92 (powerpc_opcodes) <vexptefp, vlogefp, vrefp, vrfim, vrfin, vrfip,
93 vrfiz, vrsqrtefp, vupkhpx, vupkhsb, vupkhsh, vupklpx, vupklsb,
94 vupklsh>: Use VXVA_MASK.
95 <vspltisb, vspltish, vspltisw>: Use VXVB_MASK.
96 <mfvscr>: Use VXVAVB_MASK.
97 <mtvscr>: Use VXVDVA_MASK.
98 <vspltb>: Use VXUIMM4_MASK.
99 <vsplth>: Use VXUIMM3_MASK.
100 <vspltw>: Use VXUIMM2_MASK.
102 2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
104 * arm-dis.c (neon_opcodes): Add 2 operand sha instructions.
106 2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
108 * arm-dis.c (neon_opcodes): Add SHA 3-operand instructions.
110 2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
112 * arm-dis.c (neon_opcodes): Handle VMULL.P64.
114 2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
116 * arm-dis.c (neon_opcodes): Add support for AES instructions.
118 2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
120 * arm-dis.c (coprocessor_opcodes): Add support for HP/DP
123 2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
125 * arm-dis.c (coprocessor_opcodes): Add VRINT.
126 (neon_opcodes): Likewise.
128 2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
130 * arm-dis.c (coprocessor_opcodes): Add support for new VCVT
132 (neon_opcodes): Likewise.
134 2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
136 * arm-dis.c (coprocessor_opcodes): Add VMAXNM/VMINNM.
137 (neon_opcodes): Likewise.
139 2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
141 * arm-dis.c (coprocessor_opcodes): Add VSEL.
142 (print_insn_coprocessor): Add new %<>c bitfield format
145 2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
147 * arm-dis.c (arm_opcodes): Add LDRA/STRL instructions.
148 (thumb32_opcodes): Likewise.
149 (print_arm_insn): Add support for %<>T formatter.
151 2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
153 * arm-dis.c (arm_opcodes): Add HLT.
154 (thumb_opcodes): Likewise.
156 2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
158 * arm-dis.c (thumb32_opcodes): Add DCPS instruction.
160 2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
162 * arm-dis.c (arm_opcodes): Add SEVL.
163 (thumb_opcodes): Likewise.
164 (thumb32_opcodes): Likewise.
166 2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
168 * arm-dis.c (data_barrier_option): New function.
169 (print_insn_arm): Use data_barrier_option.
170 (print_insn_thumb32): Use data_barrier_option.
172 2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com
174 * arm-dis.c (COND_UNCOND): New constant.
175 (print_insn_coprocessor): Add support for %u format specifier.
176 (print_insn_neon): Likewise.
178 2012-08-21 David S. Miller <davem@davemloft.net>
180 * sparc-opc.c (4-argument crypto instructions): Fix encoding using
183 2012-08-20 Edmar Wienskoski <edmar@freescale.com>
185 * ppc-opc.c (powerpc_opcodes): Changed opcode for vabsdub,
186 vabsduh, vabsduw, mviwsplt.
188 2012-08-17 Nagajyothi Eggone <nagajyothi.eggone@amd.com>
190 * i386-gen.c (cpu_flag_init): Add CPU_BTVER1_FLAGS and
193 * i386-opc.h: Update CpuPRFCHW comment.
195 * i386-opc.tbl: Enable prefetch instruction for CpuPRFCHW.
196 * i386-init.h: Regenerated.
197 * i386-tbl.h: Likewise.
199 2012-08-17 Nick Clifton <nickc@redhat.com>
201 * po/uk.po: New Ukranian translation.
202 * configure.in (ALL_LINGUAS): Add uk.
203 * configure: Regenerate.
205 2012-08-16 Peter Bergner <bergner@vnet.ibm.com>
207 * ppc-opc.c (powerpc_opcodes) <"lswx">: Use RAX for the second and
208 RBX for the third operand.
209 <"lswi">: Use RAX for second and NBI for the third operand.
211 2012-08-15 DJ Delorie <dj@redhat.com>
213 * rl78-decode.opc (rl78_decode_opcode): Merge %e and %[01]
214 operands, so that data addresses can be corrected when not
216 * rl78-decode.c: Regenerate.
217 * rl78-dis.c (print_insn_rl78): Make order of modifiers
218 irrelevent. When the 'e' specifier is used on an operand and no
219 ES prefix is provided, adjust address to make it absolute.
221 2012-08-15 Peter Bergner <bergner@vnet.ibm.com>
223 * ppc-opc.c <RSQ, RTQ>: Use PPC_OPERAND_GPR.
225 2012-08-15 Peter Bergner <bergner@vnet.ibm.com>
227 * ppc-opc.c <xnop, yield, mdoio, mdoom>: New extended mnemonics.
229 2012-08-14 Maciej W. Rozycki <macro@codesourcery.com>
231 * mips-dis.c (print_insn_args): Add GET_OP and GET_OP_S local
232 macros, use local variables for info struct member accesses,
233 update the type of the variable used to hold the instruction
235 (print_insn_mips, print_mips16_insn_arg): Likewise.
236 (print_insn_mips16): Add GET_OP and GET_OP_S local macros, use
237 local variables for info struct member accesses.
238 (print_insn_micromips): Add GET_OP_S local macro.
239 (_print_insn_mips): Update the type of the variable used to hold
240 the instruction word.
242 2012-08-13 Ian Bolton <ian.bolton@arm.com>
243 Laurent Desnogues <laurent.desnogues@arm.com>
244 Jim MacArthur <jim.macarthur@arm.com>
245 Marcus Shawcroft <marcus.shawcroft@arm.com>
246 Nigel Stephens <nigel.stephens@arm.com>
247 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
248 Richard Earnshaw <rearnsha@arm.com>
249 Sofiane Naci <sofiane.naci@arm.com>
250 Tejas Belagod <tejas.belagod@arm.com>
251 Yufeng Zhang <yufeng.zhang@arm.com>
253 * Makefile.am: Add AArch64.
254 * Makefile.in: Regenerate.
255 * aarch64-asm.c: New file.
256 * aarch64-asm.h: New file.
257 * aarch64-dis.c: New file.
258 * aarch64-dis.h: New file.
259 * aarch64-gen.c: New file.
260 * aarch64-opc.c: New file.
261 * aarch64-opc.h: New file.
262 * aarch64-tbl.h: New file.
263 * configure.in: Add AArch64.
264 * configure: Regenerate.
265 * disassemble.c: Add AArch64.
266 * aarch64-asm-2.c: New file (automatically generated).
267 * aarch64-dis-2.c: New file (automatically generated).
268 * aarch64-opc-2.c: New file (automatically generated).
269 * po/POTFILES.in: Regenerate.
271 2012-08-13 Maciej W. Rozycki <macro@codesourcery.com>
273 * micromips-opc.c (micromips_opcodes): Update comment.
274 * mips-opc.c (mips_builtin_opcodes): Likewise. Mark coprocessor
275 instructions for IOCT as appropriate.
276 * mips-dis.c (print_insn_mips): Replace OPCODE_IS_MEMBER with
278 * configure.in: Substitute NO_WMISSING_FIELD_INITIALIZERS with
279 the result of a check for the -Wno-missing-field-initializers
281 * Makefile.am (NO_WMISSING_FIELD_INITIALIZERS): New variable.
282 (mips-opc.lo): Pass $(NO_WMISSING_FIELD_INITIALIZERS) to
284 (mips16-opc.lo): Likewise.
285 (micromips-opc.lo): Likewise.
286 * aclocal.m4: Regenerate.
287 * configure: Regenerate.
288 * Makefile.in: Regenerate.
290 2012-08-11 Saravanan Ekanathan <saravanan.ekanathan@amd.com>
293 * i386-gen.c (cpu_flag_init): Add CpuFMA in CPU_BDVER2_FLAGS.
294 * i386-init.h: Regenerated.
296 2012-08-09 Nick Clifton <nickc@redhat.com>
298 * po/vi.po: Updated Vietnamese translation.
300 2012-08-07 Roland McGrath <mcgrathr@google.com>
302 * i386-dis.c (reg_table): Fill out REG_0F0D table with
303 AMD-reserved cases as "prefetch".
304 (MOD_0F18_REG_4, MOD_0F18_REG_5): New enum constants.
305 (MOD_0F18_REG_6, MOD_0F18_REG_7): Likewise.
306 (reg_table): Use those under REG_0F18.
307 (mod_table): Add those cases as "nop/reserved".
309 2012-08-07 Jan Beulich <jbeulich@suse.com>
311 * i386-opc.tbl: Remove "FIXME" comments from SVME instructions.
313 2012-08-06 Roland McGrath <mcgrathr@google.com>
315 * i386-dis.c (print_insn): Print spaces between multiple excess
316 prefixes. Return actual number of excess prefixes consumed,
319 * i386-dis.c (OP_REG): Ignore REX_B for segment register cases.
321 2012-08-06 Roland McGrath <mcgrathr@google.com>
322 Victor Khimenko <khim@google.com>
323 H.J. Lu <hongjiu.lu@intel.com>
325 * i386-dis.c (OP_sI): In b_T_mode and v_mode, REX_W trumps DFLAG.
326 (putop): For 'T', 'U', and 'V', treat REX_W like DFLAG.
327 (intel_operand_size): For stack_v_mode, treat REX_W like DFLAG.
328 (OP_E_register): Likewise.
329 (OP_REG): For low 8 whole registers, treat REX_W like DFLAG.
331 2012-08-02 Jan-Benedict Glaw <jbglaw@lug-owl.de>
333 * configure.in: Formatting.
334 * configure: Regenerate.
336 2012-08-01 Alan Modra <amodra@gmail.com>
338 * h8300-dis.c: Fix printf arg warnings.
339 * i960-dis.c: Likewise.
340 * mips-dis.c: Likewise.
341 * pdp11-dis.c: Likewise.
342 * sh-dis.c: Likewise.
343 * v850-dis.c: Likewise.
344 * configure.in: Formatting.
345 * configure: Regenerate.
346 * rl78-decode.c: Regenerate.
347 * po/POTFILES.in: Regenerate.
349 2012-07-31 Chao-Ying Fu <fu@mips.com>
350 Catherine Moore <clm@codesourcery.com>
351 Maciej W. Rozycki <macro@codesourcery.com>
353 * micromips-opc.c (WR_a, RD_a, MOD_a): New macros.
354 (DSP_VOLA): Likewise.
355 (D32, D33): Likewise.
356 (micromips_opcodes): Add DSP ASE instructions.
357 * mips-dis.c (print_insn_micromips) <'2', '3'>: New cases.
358 <'4', '5', '6', '7', '8', '0', '^', '@'>: Likewise.
360 2012-07-31 Jan Beulich <jbeulich@suse.com>
362 * i386-opc.tbl (vmovntdqa): Move up into 256-bit integer AVX2
363 instruction group. Mark as requiring AVX2.
364 * i386-tbl.h: Re-generate.
366 2012-07-30 Nick Clifton <nickc@redhat.com>
368 * po/opcodes.pot: Updated template.
369 * po/es.po: Updated Spanish translation.
370 * po/fi.po: Updated Finnish translation.
372 2012-07-27 Mike Frysinger <vapier@gentoo.org>
374 * configure.in (BFD_VERSION): Run bfd/configure --version and
375 parse the output of that.
376 * configure: Regenerate.
378 2012-07-25 James Lemke <jwlemke@codesourcery.com>
380 * ppc-opc.c (powerpc_opcodes): Add/remove PPCVLE for some 32-bit insns.
382 2012-07-24 Stephan McCamant <smcc@cs.berkeley.edu>
383 Dr David Alan Gilbert <dave@treblig.org>
386 * arm-dis.c: Add necessary casts for printing integer values.
387 Use %s when printing string values.
388 * hppa-dis.c: Likewise.
389 * m68k-dis.c: Likewise.
390 * microblaze-dis.c: Likewise.
391 * mips-dis.c: Likewise.
392 * sparc-dis.c: Likewise.
394 2012-07-19 Michael Zolotukhin <michael.v.zolotukhin@intel.com>
397 * i386-dis.c (VEX_LEN_0FXOP_08_CC): New.
398 (VEX_LEN_0FXOP_08_CD): Likewise.
399 (VEX_LEN_0FXOP_08_CE): Likewise.
400 (VEX_LEN_0FXOP_08_CF): Likewise.
401 (VEX_LEN_0FXOP_08_EC): Likewise.
402 (VEX_LEN_0FXOP_08_ED): Likewise.
403 (VEX_LEN_0FXOP_08_EE): Likewise.
404 (VEX_LEN_0FXOP_08_EF): Likewise.
405 (xop_table): Fix entries for vpcomb, vpcomw, vpcomd, vpcomq,
406 vpcomub, vpcomuw, vpcomud, vpcomuq.
407 (vex_len_table): Add entries for VEX_LEN_0FXOP_08_CC,
408 VEX_LEN_0FXOP_08_CD, VEX_LEN_0FXOP_08_CE, VEX_LEN_0FXOP_08_CF,
409 VEX_LEN_0FXOP_08_EC, VEX_LEN_0FXOP_08_ED, VEX_LEN_0FXOP_08_EE,
412 2012-07-16 Michael Zolotukhin <michael.v.zolotukhin@intel.com>
414 * i386-dis.c (PREFIX_0F38F6): New.
415 (prefix_table): Add adcx, adox instructions.
416 (three_byte_table): Use PREFIX_0F38F6.
417 (mod_table): Add rdseed instruction.
418 * i386-gen.c (cpu_flag_init): Add CpuADX, CpuRDSEED, CpuPRFCHW.
419 (cpu_flags): Likewise.
420 * i386-opc.h: Add CpuADX, CpuRDSEED, CpuPRFCHW.
421 (i386_cpu_flags): Add fields cpurdseed, cpuadx, cpuprfchw.
422 * i386-opc.tbl: Add instrcutions adcx, adox, rdseed. Extend
424 * i386-tbl.h: Regenerate.
425 * i386-init.h: Likewise.
427 2012-07-05 Thomas Schwinge <thomas@codesourcery.com>
429 * mips-dis.c: Remove gratuitous newline.
431 2012-07-05 Sean Keys <skeys@ipdatasys.com>
433 * xgate-dis.c: Removed an IF statement that will
434 always be false due to overlapping operand masks.
435 * xgate-opc.c: Corrected 'com' opcode entry and
438 2012-07-02 Roland McGrath <mcgrathr@google.com>
440 * i386-opc.tbl: Add RepPrefixOk to nop.
441 * i386-tbl.h: Regenerate.
443 2012-06-28 Nick Clifton <nickc@redhat.com>
445 * po/vi.po: Updated Vietnamese translation.
447 2012-06-22 Roland McGrath <mcgrathr@google.com>
449 * i386-opc.tbl: Add RepPrefixOk to ret.
450 * i386-tbl.h: Regenerate.
452 * i386-opc.h (RepPrefixOk): New enum constant.
453 (i386_opcode_modifier): New bitfield 'repprefixok'.
454 * i386-gen.c (opcode_modifiers): Add RepPrefixOk.
455 * i386-opc.tbl: Add RepPrefixOk to bsf, bsr, and to all
456 instructions that have IsString.
457 * i386-tbl.h: Regenerate.
459 2012-06-11 Andreas Schwab <schwab@linux-m68k.org>
461 * ppc-opc.c (lvsl, lvebx, isellt, icbt, ldepx, lwepx, lvsr, lvehx)
462 (iselgt, lvewx, iseleq, isel, dcbst, dcbstep, dcbfl, dcbf, lbepx)
463 (lvx, dcbfep, dcbtstls, stvebx, dcbtstlse, stdepx, stwepx, dcbtls)
464 (stvehx, dcbtlse, stvewx, stbepx, icblc, stvx, dcbtstt, dcbtst)
465 (dcbtst, dcbtstep, dcbtt, dcbt, dcbt, lhepx, eciwx, dcbtep)
466 (dcread, lxvdsx, lvxl, dcblc, sthepx, ecowx, dcbi, dcread, icbtls)
467 (stvxl, lxsdx, lfdepx, stxsdx, stfdepx, dcba, dcbal, lxvw4x)
468 (tlbivax, lfdpx, lxvd2x, tlbsrx., stxvw4x, tlbsx, tlbsx., stfdpx)
469 (stfqx, stxvd2x, icbi, icbiep, icread, dcbzep): Change RA to RA0.
471 2012-05-19 Alan Modra <amodra@gmail.com>
473 * ppc-dis.c: Don't include elf32-ppc.h, do include elf/ppc.h.
474 (get_powerpc_dialect): Detect VLE sections from ELF sh_flags.
476 2012-05-18 Alan Modra <amodra@gmail.com>
478 * ia64-opc.c: Remove #include "ansidecl.h".
479 * z8kgen.c: Include sysdep.h first.
481 * arc-dis.c: Include sysdep.h first, remove some redundant includes.
482 * bfin-dis.c: Likewise.
483 * i860-dis.c: Likewise.
484 * ia64-dis.c: Likewise.
485 * ia64-gen.c: Likewise.
486 * m68hc11-dis.c: Likewise.
487 * mmix-dis.c: Likewise.
488 * msp430-dis.c: Likewise.
489 * or32-dis.c: Likewise.
490 * rl78-dis.c: Likewise.
491 * rx-dis.c: Likewise.
492 * tic4x-dis.c: Likewise.
493 * tilegx-opc.c: Likewise.
494 * tilepro-opc.c: Likewise.
495 * rx-decode.c: Regenerate.
497 2012-05-17 James Lemke <jwlemke@codesourcery.com>
499 * ppc-opc.c (powerpc_macros): Add entries for e_extlwi to e_clrlslwi.
501 2012-05-17 James Lemke <jwlemke@codesourcery.com>
503 * ppc-opc.c (extract_sprg): Use ALLOW8_SPRG to include VLE.
505 2012-05-17 Daniel Richard G. <skunk@iskunk.org>
506 Nick Clifton <nickc@redhat.com>
509 * configure.in: Add check that sysdep.h has been included before
510 any system header files.
511 * configure: Regenerate.
512 * config.in: Regenerate.
513 * sysdep.h: Generate an error if included before config.h.
514 * alpha-opc.c: Include sysdep.h before any other header file.
515 * alpha-dis.c: Likewise.
516 * avr-dis.c: Likewise.
517 * cgen-opc.c: Likewise.
518 * cr16-dis.c: Likewise.
519 * cris-dis.c: Likewise.
520 * crx-dis.c: Likewise.
521 * d10v-dis.c: Likewise.
522 * d10v-opc.c: Likewise.
523 * d30v-dis.c: Likewise.
524 * d30v-opc.c: Likewise.
525 * h8500-dis.c: Likewise.
526 * i370-dis.c: Likewise.
527 * i370-opc.c: Likewise.
528 * m10200-dis.c: Likewise.
529 * m10300-dis.c: Likewise.
530 * micromips-opc.c: Likewise.
531 * mips-opc.c: Likewise.
532 * mips61-opc.c: Likewise.
533 * moxie-dis.c: Likewise.
534 * or32-opc.c: Likewise.
535 * pj-dis.c: Likewise.
536 * ppc-dis.c: Likewise.
537 * ppc-opc.c: Likewise.
538 * s390-dis.c: Likewise.
539 * sh-dis.c: Likewise.
540 * sh64-dis.c: Likewise.
541 * sparc-dis.c: Likewise.
542 * sparc-opc.c: Likewise.
543 * spu-dis.c: Likewise.
544 * tic30-dis.c: Likewise.
545 * tic54x-dis.c: Likewise.
546 * tic80-dis.c: Likewise.
547 * tic80-opc.c: Likewise.
548 * tilegx-dis.c: Likewise.
549 * tilepro-dis.c: Likewise.
550 * v850-dis.c: Likewise.
551 * v850-opc.c: Likewise.
552 * vax-dis.c: Likewise.
553 * w65-dis.c: Likewise.
554 * xgate-dis.c: Likewise.
555 * xtensa-dis.c: Likewise.
556 * rl78-decode.opc: Likewise.
557 * rl78-decode.c: Regenerate.
558 * rx-decode.opc: Likewise.
559 * rx-decode.c: Regenerate.
561 2012-05-17 Alan Modra <amodra@gmail.com>
563 * ppc_dis.c: Don't include elf/ppc.h.
565 2012-05-16 Meador Inge <meadori@codesourcery.com>
567 * arm-dis.c (arm_opcodes): Don't disassemble STMFD/LDMIA sp!, {reg}
570 2012-05-15 James Murray <jsm@jsm-net.demon.co.uk>
571 Stephane Carrez <stcarrez@nerim.fr>
573 * configure.in: Add S12X and XGATE co-processor support to m68hc11
575 * disassemble.c: Likewise.
576 * configure: Regenerate.
577 * m68hc11-dis.c: Make objdump output more consistent, use hex
578 instead of decimal and use 0x prefix for hex.
579 * m68hc11-opc.c: Add S12X and XGATE opcodes.
581 2012-05-14 James Lemke <jwlemke@codesourcery.com>
583 * ppc-dis.c (get_powerpc_dialect): Use is_ppc_vle.
584 (PPC_OPCD_SEGS, VLE_OPCD_SEGS): New defines.
585 (vle_opcd_indices): New array.
586 (lookup_vle): New function.
587 (disassemble_init_powerpc): Revise for second (VLE) opcode table.
588 (print_insn_powerpc): Likewise.
589 * ppc-opc.c: Likewise.
591 2012-05-14 Catherine Moore <clm@codesourcery.com>
592 Maciej W. Rozycki <macro@codesourcery.com>
593 Rhonda Wittels <rhonda@codesourcery.com>
594 Nathan Froyd <froydnj@codesourcery.com>
596 * ppc-opc.c (insert_arx, extract_arx): New functions.
597 (insert_ary, extract_ary): New functions.
598 (insert_li20, extract_li20): New functions.
599 (insert_rx, extract_rx): New functions.
600 (insert_ry, extract_ry): New functions.
601 (insert_sci8, extract_sci8): New functions.
602 (insert_sci8n, extract_sci8n): New functions.
603 (insert_sd4h, extract_sd4h): New functions.
604 (insert_sd4w, extract_sd4w): New functions.
605 (insert_vlesi, extract_vlesi): New functions.
606 (insert_vlensi, extract_vlensi): New functions.
607 (insert_vleui, extract_vleui): New functions.
608 (insert_vleil, extract_vleil): New functions.
609 (BI_MASK, BB_MASK, BT): Use PPC_OPERAND_CR_BIT.
610 (BI16, BI32, BO32, B8): New.
611 (B15, B24, CRD32, CRS): New.
612 (CRD, OBF, BFA, CR, CRFS): Use PPC_OPERAND_CR_REG.
613 (DB, IMM20, RD, Rx, ARX, RY, RZ): New.
614 (ARY, SCLSCI8, SCLSCI8N, SE_SD, SE_SDH): New.
615 (SH6_MASK): Use PPC_OPSHIFT_INV.
616 (SI8, UI5, OIMM5, UI7, BO16): New.
617 (VLESIMM, VLENSIMM, VLEUIMM, VLEUIMML): New.
618 (XT6, XA6, XB6, XB6S, XC6): Use PPC_OPSHIFT_INV.
620 (insert_sprg, extract_sprg): Check ALLOW8_SPRG.
621 (OPVUP, OPVUP_MASK OPVUP): New
622 (BD8, BD8_MASK, BD8IO, BD8IO_MASK): New.
623 (EBD8IO, EBD8IO1_MASK, EBD8IO2_MASK, EBD8IO3_MASK): New.
624 (BD15, BD15_MASK, EBD15, EBD15_MASK, EBD15BI, EBD15BI_MASK): New.
625 (BD24,BD24_MASK, C_LK, C_LK_MASK, C, C_MASK): New.
626 (IA16, IA16_MASK, I16A, I16A_MASK, I16L, I16L_MASK): New.
627 (IM7, IM7_MASK, LI20, LI20_MASK, SCI8, SCI8_MASK): New.
628 (SCI8BF, SCI8BF_MASK, SD4, SD4_MASK): New.
629 (SE_IM5, SE_IM5_MASK): New.
630 (SE_R, SE_R_MASK, SE_RR, SE_RR_MASK): New.
631 (EX, EX_MASK, BO16F, BO16T, BO32F, BO32T): New.
632 (BO32DNZ, BO32DZ): New.
633 (NO371, PPCSPE, PPCISEL, PPCEFS, MULHW): Include PPC_OPCODE_VLE.
635 (powerpc_opcodes): Add new VLE instructions. Update existing
636 instruction to include PPCVLE if supported.
637 * ppc-dis.c (ppc_opts): Add vle entry.
638 (get_powerpc_dialect): New function.
639 (powerpc_init_dialect): VLE support.
640 (print_insn_big_powerpc): Call get_powerpc_dialect.
641 (print_insn_little_powerpc): Likewise.
642 (operand_value_powerpc): Handle negative shift counts.
643 (print_insn_powerpc): Handle 2-byte instruction lengths.
645 2012-05-11 Daniel Richard G. <skunk@iskunk.org>
648 * configure.in: Invoke ACX_HEADER_STRING.
649 * configure: Regenerate.
650 * config.in: Regenerate.
651 * sysdep.h: If STRINGS_WITH_STRING is defined then include both
652 string.h and strings.h.
654 2012-05-11 Nick Clifton <nickc@redhat.com>
657 * arm-dis.c (print_insn): Fix detection of instruction mode in
658 files containing multiple executable sections.
660 2012-05-03 Sean Keys <skeys@ipdatasys.com>
662 * Makefile.in, configure: regenerate
663 * disassemble.c (disassembler): Recognize ARCH_XGATE.
664 * xgate-dis.c (read_memory, print_insn, print_insn_xgate):
666 * configure.in: Recognize xgate.
667 * xgate-dis.c, xgate-opc.c: New files for support of xgate
668 * Makefile.am (CFILES, ALL_MACHINES): New files for disassembly
669 and opcode generation for xgate.
671 2012-04-30 DJ Delorie <dj@redhat.com>
673 * rx-decode.opc (MOV): Do not sign-extend immediates which are
674 already the maximum bit size.
675 * rx-decode.c: Regenerate.
677 2012-04-27 David S. Miller <davem@davemloft.net>
679 * sparc-dis.c (v9a_asr_reg_names): Add 'cfr'.
680 * sparc-opc.c (sparc_opcodes): Add rd/wr cases for %cfr.
682 * sparc-opc.c (sparc_opcodes): Add 'wr X, %pause' and 'pause'.
683 * sparc-dis.c (v9a_asr_reg_names): Add 'pause'.
685 * sparc-opc.c (CBCOND): New define.
686 (CBCOND_XCC): Likewise.
687 (cbcond): New helper macro.
688 (sparc_opcodes): Add compare-and-branch instructions.
690 * sparc-dis.c (print_insn_sparc): Handle ')'.
691 * sparc-opc.c (sparc_opcodes): Add crypto instructions.
693 * sparc-opc.c (sparc_opcodes): Rework table to put HWCAP values
694 into new struct sparc_opcode 'hwcaps' field instead of 'flags'.
696 2012-04-12 David S. Miller <davem@davemloft.net>
698 * sparc-dis.c (X_DISP10): Define.
699 (print_insn_sparc): Handle '='.
701 2012-04-01 Mike Frysinger <vapier@gentoo.org>
703 * bfin-dis.c (fmtconst): Replace decimal handling with a single
704 sprintf call and the '*' field width.
706 2012-03-23 Maxim Kuvyrkov <maxim@codesourcery.com>
708 * mips-dis.c (mips_arch_choices): Add entry for Broadcom XLP.
710 2012-03-16 Alan Modra <amodra@gmail.com>
712 * ppc-dis.c (PPC_OPC_SEGS, PPC_OP_TO_SEG): Delete.
713 (powerpc_opcd_indices): Bump array size.
714 (disassemble_init_powerpc): Set powerpc_opcd_indices entries
715 corresponding to unused opcodes to following entry.
716 (lookup_powerpc): New function, extracted and optimised from..
717 (print_insn_powerpc): ..here.
719 2012-03-15 Alan Modra <amodra@gmail.com>
720 James Lemke <jwlemke@codesourcery.com>
722 * disassemble.c (disassemble_init_for_target): Handle ppc init.
723 * ppc-dis.c (private): New var.
724 (powerpc_init_dialect): Don't return calloc failure, instead use
726 (PPC_OPCD_SEGS, PPC_OP_TO_SEG): Define.
727 (powerpc_opcd_indices): New array.
728 (disassemble_init_powerpc): New function.
729 (print_insn_big_powerpc): Don't init dialect here.
730 (print_insn_little_powerpc): Likewise.
731 (print_insn_powerpc): Start search using powerpc_opcd_indices.
733 2012-03-10 Edmar Wienskoski <edmar@freescale.com>
735 * ppc-dis.c (ppc_opts): Add entries for "e5500" and "e6500".
736 * ppc-opc.c (insert_ls, TMR, ESYNC, XSYNCLE_MASK): New.
737 (PPCVEC2, PPCTMR, E6500): New short names.
738 (powerpc_opcodes): Add vabsdub, vabsduh, vabsduw, dni, mvidsplt,
739 mviwsplt, icblq., mftmr, mttmr, dcblq., miso, lvexbx, lvexhx,
740 lvexwx, stvexbx, stvexhx, stvexwx, lvepx, lvepxl, stvepx, stvepxl,
741 lvtrx, lvtrxl, lvtlx, lvtlxl, stvfrx, stvfrxl, stvflx, stvflxl,
742 lvswx, lvswxl, stvswx, stvswxl, lvsm mnemonics. Accept LS, ESYNC
743 optional operands on sync instruction for E6500 target.
745 2012-03-08 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
747 * s390-opc.txt: Set instruction type of pku to SS_L2RDRD.
749 2012-02-27 Alan Modra <amodra@gmail.com>
751 * mt-dis.c: Regenerate.
753 2012-02-27 Alan Modra <amodra@gmail.com>
755 * v850-opc.c (extract_v8): Rearrange to make it obvious this
756 is the inverse of corresponding insert function.
757 (extract_d22, extract_u9, extract_r4): Likewise.
758 (extract_d9): Correct sign extension.
759 (extract_d16_15): Don't assume "long" is 32 bits, and don't
760 rely on implementation defined behaviour for shift right of
762 (extract_d16_16, extract_d17_16, extract_i9): Likewise.
763 (extract_d23): Likewise, and correct mask.
765 2012-02-27 Alan Modra <amodra@gmail.com>
767 * crx-dis.c (print_arg): Mask constant to 32 bits.
768 * crx-opc.c (cst4_map): Use int array.
770 2012-02-27 Alan Modra <amodra@gmail.com>
772 * arc-dis.c (BITS): Don't use shifts to mask off bits.
773 (FIELDD): Sign extend with xor,sub.
775 2012-02-25 Walter Lee <walt@tilera.com>
777 * tilegx-opc.c: Handle TILEGX_OPC_LD4S_TLS and TILEGX_OPC_LD_TLS.
778 * tilepro-opc.c: Handle TILEPRO_OPC_LW_TLS and
779 TILEPRO_OPC_LW_TLS_SN.
781 2012-02-21 H.J. Lu <hongjiu.lu@intel.com>
783 * i386-opc.h (HLEPrefixNone): New.
784 (HLEPrefixLock): Likewise.
785 (HLEPrefixAny): Likewise.
786 (HLEPrefixRelease): Likewise.
788 2012-02-08 H.J. Lu <hongjiu.lu@intel.com>
790 * i386-dis.c (HLE_Fixup1): New.
791 (HLE_Fixup2): Likewise.
792 (HLE_Fixup3): Likewise.
799 (MOD_C6_REG_7): Likewise.
800 (MOD_C7_REG_7): Likewise.
801 (RM_C6_REG_7): Likewise.
802 (RM_C7_REG_7): Likewise.
803 (XACQUIRE_PREFIX): Likewise.
804 (XRELEASE_PREFIX): Likewise.
805 (dis386): Use Ebh1/Evh1 on add, adc, and, btc, btr, bts,
806 cmpxchg, dec, inc, neg, not, or, sbb, sub, xor and xadd. Use
807 Ebh2/Evh2 on xchg. Use Ebh3/Evh3 on mov.
808 (reg_table): Use Ebh1/Evh1 on add, adc, and, dec, inc, neg,
809 not, or, sbb, sub and xor. Use Ebh3/Evh3 on mov. Use
810 MOD_C6_REG_7 and MOD_C7_REG_7.
811 (mod_table): Add MOD_C6_REG_7 and MOD_C7_REG_7.
812 (rm_table): Add RM_C6_REG_7 and RM_C7_REG_7. Add xend and
814 (prefix_name): Handle XACQUIRE_PREFIX and XRELEASE_PREFIX.
815 (CMPXCHG8B_Fixup): Handle HLE prefix on cmpxchg8b.
817 * i386-gen.c (cpu_flag_init): Add CPU_HLE_FLAGS and
819 (cpu_flags): Add CpuHLE and CpuRTM.
820 (opcode_modifiers): Add HLEPrefixOk.
822 * i386-opc.h (CpuHLE): New.
824 (HLEPrefixOk): Likewise.
825 (i386_cpu_flags): Add cpuhle and cpurtm.
826 (i386_opcode_modifier): Add hleprefixok.
828 * i386-opc.tbl: Add HLEPrefixOk=3 to mov. Add HLEPrefixOk to
829 add, adc, and, btc, btr, bts, cmpxchg, dec, inc, neg, not, or,
830 sbb, sub, xor and xadd. Add HLEPrefixOk=2 to xchg with memory
831 operand. Add xacquire, xrelease, xabort, xbegin, xend and
833 * i386-init.h: Regenerated.
834 * i386-tbl.h: Likewise.
836 2012-01-24 DJ Delorie <dj@redhat.com>
838 * rl78-decode.opc (rl78_decode_opcode): Add NOT1.
839 * rl78-decode.c: Regenerate.
841 2012-01-17 James Murray <jsm@jsm-net.demon.co.uk>
844 * cr16-dis.c (print_arg): Test symtab_size not num_symbols.
846 2012-01-17 Andreas Schwab <schwab@linux-m68k.org>
848 * m68k-opc.c (m68k_opcodes): Fix entries for pmove with BADx/BACx
849 register and move them after pmove with PSR/PCSR register.
851 2012-01-13 H.J. Lu <hongjiu.lu@intel.com>
853 * i386-dis.c (mod_table): Add vmfunc.
855 * i386-gen.c (cpu_flag_init): Add CPU_VMFUNC_FLAGS.
856 (cpu_flags): CpuVMFUNC.
858 * i386-opc.h (CpuVMFUNC): New.
859 (i386_cpu_flags): Add cpuvmfunc.
861 * i386-opc.tbl: Add vmfunc.
862 * i386-init.h: Regenerated.
863 * i386-tbl.h: Likewise.
865 For older changes see ChangeLog-2011
871 version-control: never