1 2018-05-09 H.J. Lu <hongjiu.lu@intel.com>
3 * i386-opc.tbl: Remove Disp<N> from movidir{i,64b}.
5 2018-05-09 Sebastian Rasmussen <sebras@gmail.com>
7 * cr16-opc.c (cr16_instruction): Comment typo fix.
8 * hppa-dis.c (print_insn_hppa): Likewise.
10 2018-05-08 Jim Wilson <jimw@sifive.com>
12 * riscv-opc.c (match_c_slli, match_slli_as_c_slli): New.
13 (match_c_slli64, match_srxi_as_c_srxi): New.
14 (riscv_opcodes) <slli, sll>: Use match_slli_as_c_slli.
15 <srli, srl, srai, sra>: Use match_srxi_as_c_srxi.
16 <c.slli, c.srli, c.srai>: Use match_s_slli.
17 <c.slli64, c.srli64, c.srai64>: New.
19 2018-05-08 Alan Modra <amodra@gmail.com>
21 * ppc-dis.c (PPC_OPCD_SEGS): Define using PPC_OP.
22 (VLE_OPCD_SEGS, SPE2_OPCD_SEGS): Similarly, using macros used to
23 partition opcode space for index lookup.
25 2018-05-07 Peter Bergner <bergner@vnet.ibm.com.com>
27 * ppc-dis.c (print_insn_powerpc) <insn_is_short>: Replace this...
28 <insn_length>: ...with this. Update usage.
29 Remove duplicate call to *info->memory_error_func.
31 2018-05-07 Igor Tsimbalist <igor.v.tsimbalist@intel.com>
32 H.J. Lu <hongjiu.lu@intel.com>
34 * i386-dis.c (Gva): New.
35 (enum): Add PREFIX_0F38F8, PREFIX_0F38F9,
36 MOD_0F38F8_PREFIX_2, MOD_0F38F9_PREFIX_0.
37 (prefix_table): New instructions (see prefix above).
38 (mod_table): New instructions (see prefix above).
39 (OP_G): Handle va_mode.
40 * i386-gen.c (cpu_flag_init): Add CPU_MOVDIRI_FLAGS,
42 (cpu_flags): Add CpuMOVDIRI and CpuMOVDIR64B.
43 * i386-opc.h (enum): Add CpuMOVDIRI, CpuMOVDIR64B.
44 (i386_cpu_flags): Add cpumovdiri and cpumovdir64b.
45 * i386-opc.tbl: Add movidir{i,64b}.
46 * i386-init.h: Regenerated.
47 * i386-tbl.h: Likewise.
49 2018-05-07 H.J. Lu <hongjiu.lu@intel.com>
51 * i386-gen.c (opcode_modifiers): Replace AddrPrefixOp0 with
53 * i386-opc.h (AddrPrefixOp0): Renamed to ...
54 (AddrPrefixOpReg): This.
55 (i386_opcode_modifier): Rename addrprefixop0 to addrprefixopreg.
56 * i386-opc.tbl: Replace AddrPrefixOp0 with AddrPrefixOpReg.
58 2018-05-07 Peter Bergner <bergner@vnet.ibm.com.com>
60 * ppc-opc.c (powerpc_num_opcodes): Change type to unsigned.
61 (vle_num_opcodes): Likewise.
62 (spe2_num_opcodes): Likewise.
63 * ppc-dis.c (disassemble_init_powerpc) <powerpc_opcd_indices>: Rewrite
65 (disassemble_init_powerpc) <vle_opcd_indices>: Likewise.
66 (disassemble_init_powerpc) <spe2_opcd_indices>: Likewise. Initialize
69 2018-05-01 Tamar Christina <tamar.christina@arm.com>
71 * aarch64-dis.c (aarch64_opcode_decode): Moved memory clear code.
73 2018-04-30 Francois H. Theron <francois.theron@netronome.com>
75 Makefile.am: Added nfp-dis.c.
76 configure.ac: Added bfd_nfp_arch.
77 disassemble.h: Added print_insn_nfp prototype.
78 disassemble.c: Added ARCH_nfp and call to print_insn_nfp
79 nfp-dis.c: New, for NFP support.
80 po/POTFILES.in: Added nfp-dis.c to the list.
81 Makefile.in: Regenerate.
82 configure: Regenerate.
84 2018-04-26 Jan Beulich <jbeulich@suse.com>
86 * i386-opc.tbl: Fold various non-memory operand AVX512VL
87 templates into their base ones.
88 * i386-tlb.h: Re-generate.
90 2018-04-26 Jan Beulich <jbeulich@suse.com>
92 * i386-gen.c (cpu_flag_init): Use CPU_XOP_FLAGS for
93 CPU_BDVER1_FLAGS. Use CPU_AVX2_FLAGS for CPU_ZNVER1_FLAGS. Use
94 CPU_AVX_FLAGS for CPU_BTVER1_FLAGS. Add CPU_XSAVE_FLAGS to
95 CPU_LWP_FLAGS, CPU_AVX_FLAGS, CPU_MPX_FLAGS, and CPU_OSPKE_FLAGS.
96 * i386-init.h: Re-generate.
98 2018-04-26 Jan Beulich <jbeulich@suse.com>
100 * i386-gen.c (cpu_flag_init): Drop all uses of CpuRegMMX,
101 CpuRegXMM, CpuRegYMM, CpuRegZMM, and CpuRegMask. Use
102 CPU_AVX2_FLAGS for CPU_AVX512F_FLAGS and drop bogus comment.
103 Don't use CPU_AVX2_FLAGS for CPU_AVX512VL_FLAGS and drop bogus
105 (cpu_flags): Drop CpuRegMMX, CpuRegXMM, CpuRegYMM, CpuRegZMM,
107 * i386-opc.h: CpuRegMMX, CpuRegXMM, CpuRegYMM, CpuRegZMM,
109 (union i386_cpu_flags): Remove cpuregmmx, cpuregxmm, cpuregymm,
110 cpuregzmm, and cpuregmask.
111 * i386-init.h: Re-generate.
112 * i386-tbl.h: Re-generate.
114 2018-04-26 Jan Beulich <jbeulich@suse.com>
116 * i386-gen.c (cpu_flag_init): CPU_I586_FLAGS inherits Cpu387 only.
117 CPU_287_FLAGS is Cpu287 only. CPU_387_FLAGS is Cpu387 only.
118 * i386-init.h: Re-generate.
120 2018-04-26 Jan Beulich <jbeulich@suse.com>
122 * i386-gen.c (VexImmExt): Delete.
123 * i386-opc.h (VexImmExt, veximmext): Delete.
124 * i386-opc.tbl: Drop all VexImmExt uses.
125 * i386-tlb.h: Re-generate.
127 2018-04-25 Jan Beulich <jbeulich@suse.com>
129 * i386-opc.tbl (vpslld, vpsrad, vpsrld): Drop AVX512VL
131 * i386-tlb.h: Re-generate.
133 2018-04-25 Tamar Christina <tamar.christina@arm.com>
135 * aarch64-tbl.h (sqrdmlah, sqrdmlsh): Fix masks.
137 2018-04-17 Igor Tsimbalist <igor.v.tsimbalist@intel.com>
139 * i386-dis.c: Add REG_0F1C_MOD_0, MOD_0F1C_PREFIX_0,
141 * i386-gen.c (cpu_flag_init): Add CPU_CLDEMOTE_FLAGS,
142 (cpu_flags): Add CpuCLDEMOTE.
143 * i386-init.h: Regenerate.
144 * i386-opc.h (enum): Add CpuCLDEMOTE,
145 (i386_cpu_flags): Add cpucldemote.
146 * i386-opc.tbl: Add cldemote.
147 * i386-tbl.h: Regenerate.
149 2018-04-16 Alan Modra <amodra@gmail.com>
151 * Makefile.am: Remove sh5 and sh64 support.
152 * configure.ac: Likewise.
153 * disassemble.c: Likewise.
154 * disassemble.h: Likewise.
155 * sh-dis.c: Likewise.
156 * sh64-dis.c: Delete.
157 * sh64-opc.c: Delete.
158 * sh64-opc.h: Delete.
159 * Makefile.in: Regenerate.
160 * configure: Regenerate.
161 * po/POTFILES.in: Regenerate.
163 2018-04-16 Alan Modra <amodra@gmail.com>
165 * Makefile.am: Remove w65 support.
166 * configure.ac: Likewise.
167 * disassemble.c: Likewise.
168 * disassemble.h: Likewise.
171 * Makefile.in: Regenerate.
172 * configure: Regenerate.
173 * po/POTFILES.in: Regenerate.
175 2018-04-16 Alan Modra <amodra@gmail.com>
177 * configure.ac: Remove we32k support.
178 * configure: Regenerate.
180 2018-04-16 Alan Modra <amodra@gmail.com>
182 * Makefile.am: Remove m88k support.
183 * configure.ac: Likewise.
184 * disassemble.c: Likewise.
185 * disassemble.h: Likewise.
186 * m88k-dis.c: Delete.
187 * Makefile.in: Regenerate.
188 * configure: Regenerate.
189 * po/POTFILES.in: Regenerate.
191 2018-04-16 Alan Modra <amodra@gmail.com>
193 * Makefile.am: Remove i370 support.
194 * configure.ac: Likewise.
195 * disassemble.c: Likewise.
196 * disassemble.h: Likewise.
197 * i370-dis.c: Delete.
198 * i370-opc.c: Delete.
199 * Makefile.in: Regenerate.
200 * configure: Regenerate.
201 * po/POTFILES.in: Regenerate.
203 2018-04-16 Alan Modra <amodra@gmail.com>
205 * Makefile.am: Remove h8500 support.
206 * configure.ac: Likewise.
207 * disassemble.c: Likewise.
208 * disassemble.h: Likewise.
209 * h8500-dis.c: Delete.
210 * h8500-opc.h: Delete.
211 * Makefile.in: Regenerate.
212 * configure: Regenerate.
213 * po/POTFILES.in: Regenerate.
215 2018-04-16 Alan Modra <amodra@gmail.com>
217 * configure.ac: Remove tahoe support.
218 * configure: Regenerate.
220 2018-04-15 H.J. Lu <hongjiu.lu@intel.com>
222 * i386-dis.c (prefix_table): Replace Em with Edq on tpause and
224 * i386-opc.tbl: Allow 32-bit registers for tpause and umwait in
226 * i386-tbl.h: Regenerated.
228 2018-04-11 Igor Tsimbalist <igor.v.tsimbalist@intel.com>
230 * i386-dis.c (enum): Add PREFIX_MOD_0_0FAE_REG_6,
231 PREFIX_MOD_1_0FAE_REG_6.
233 (OP_E_register): Use va_mode.
234 * i386-dis-evex.h (prefix_table):
235 New instructions (see prefixes above).
236 * i386-gen.c (cpu_flag_init): Add WAITPKG.
237 (cpu_flags): Likewise.
238 * i386-opc.h (enum): Likewise.
239 (i386_cpu_flags): Likewise.
240 * i386-opc.tbl: Add umonitor, umwait, tpause.
241 * i386-init.h: Regenerate.
242 * i386-tbl.h: Likewise.
244 2018-04-11 Alan Modra <amodra@gmail.com>
246 * opcodes/i860-dis.c: Delete.
247 * opcodes/i960-dis.c: Delete.
248 * Makefile.am: Remove i860 and i960 support.
249 * configure.ac: Likewise.
250 * disassemble.c: Likewise.
251 * disassemble.h: Likewise.
252 * Makefile.in: Regenerate.
253 * configure: Regenerate.
254 * po/POTFILES.in: Regenerate.
256 2018-04-04 H.J. Lu <hongjiu.lu@intel.com>
259 * i386-dis.c (get_valid_dis386): Don't set vex.prefix nor vex.w
261 (print_insn): Clear vex instead of vex.evex.
263 2018-04-04 Nick Clifton <nickc@redhat.com>
265 * po/es.po: Updated Spanish translation.
267 2018-03-28 Jan Beulich <jbeulich@suse.com>
269 * i386-gen.c (opcode_modifiers): Delete VecESize.
270 * i386-opc.h (VecESize): Delete.
271 (struct i386_opcode_modifier): Delete vecesize.
272 * i386-opc.tbl: Drop VecESize.
273 * i386-tlb.h: Re-generate.
275 2018-03-28 Jan Beulich <jbeulich@suse.com>
277 * i386-opc.h (NO_BROADCAST, BROADCAST_1TO16, BROADCAST_1TO8,
278 BROADCAST_1TO4, BROADCAST_1TO2): Delete.
279 (struct i386_opcode_modifier): Shrink broadcast field to 1 bit.
280 * i386-opc.tbl: Replace Broadcast=<N> by Broadcast.
281 * i386-tlb.h: Re-generate.
283 2018-03-28 Jan Beulich <jbeulich@suse.com>
285 * i386-opc.tbl (vcvt*d2si, vcvt*d2usi, vcvt*s2si, vcvt*s2usi):
287 * i386-tlb.h: Re-generate.
289 2018-03-28 Jan Beulich <jbeulich@suse.com>
291 * i386-dis.c (prefix_table): Drop Y for cvt*2si.
292 (vex_len_table): Drop Y for vcvt*2si.
293 (putop): Replace plain 'Y' handling by abort().
295 2018-03-28 Nick Clifton <nickc@redhat.com>
298 * aarch64-tbl.h (aarch64_opcode_table): Add entries for LDFF1xx
299 instructions with only a base address register.
300 * aarch64-opc.c (operand_general_constraint_met_p): Add code to
301 handle AARHC64_OPND_SVE_ADDR_R.
302 (aarch64_print_operand): Likewise.
303 * aarch64-asm-2.c: Regenerate.
304 * aarch64_dis-2.c: Regenerate.
305 * aarch64-opc-2.c: Regenerate.
307 2018-03-22 Jan Beulich <jbeulich@suse.com>
309 * i386-opc.tbl: Drop VecESize from register only insn forms and
310 memory forms not allowing broadcast.
311 * i386-tlb.h: Re-generate.
313 2018-03-22 Jan Beulich <jbeulich@suse.com>
315 * i386-opc.tbl (vfrczs*, vphadd*, vphsub*, vpmacs*, vpmadcs*,
316 vprot*, vpsha*, vpshl*, bextr, blc*, bls*, t1mskc, tzmsk, sha1*,
317 sha256*): Drop Disp<N>.
319 2018-03-22 Jan Beulich <jbeulich@suse.com>
321 * i386-dis.c (EbndS, bnd_swap_mode): New.
322 (prefix_table): Use EbndS.
323 (OP_E_register, OP_E_memory): Also handle bnd_swap_mode.
324 * i386-opc.tbl (bndmov): Move misplaced Load.
325 * i386-tlb.h: Re-generate.
327 2018-03-22 Jan Beulich <jbeulich@suse.com>
329 * i386-opc.tbl (vcvtdq2pd, vcvtps2pd, vcvtudq2pd): Use separate
330 templates allowing memory operands and folded ones for register
332 * i386-tlb.h: Re-generate.
334 2018-03-22 Jan Beulich <jbeulich@suse.com>
336 * i386-opc.tbl (vfrczp*, vpcmov, vpermil2p*): Fold 128- and
337 256-bit templates. Drop redundant leftover Disp<N>.
338 * i386-tlb.h: Re-generate.
340 2018-03-14 Kito Cheng <kito.cheng@gmail.com>
342 * riscv-opc.c (riscv_insn_types): New.
344 2018-03-13 Nick Clifton <nickc@redhat.com>
346 * po/pt_BR.po: Updated Brazilian Portuguese translation.
348 2018-03-08 H.J. Lu <hongjiu.lu@intel.com>
350 * i386-opc.tbl: Add Optimize to clr.
351 * i386-tbl.h: Regenerated.
353 2018-03-08 H.J. Lu <hongjiu.lu@intel.com>
355 * i386-gen.c (opcode_modifiers): Remove OldGcc.
356 * i386-opc.h (OldGcc): Removed.
357 (i386_opcode_modifier): Remove oldgcc.
358 * i386-opc.tbl: Remove fsubp, fsubrp, fdivp and fdivrp
359 instructions for old (<= 2.8.1) versions of gcc.
360 * i386-tbl.h: Regenerated.
362 2018-03-08 Jan Beulich <jbeulich@suse.com>
364 * i386-opc.h (EVEXDYN): New.
365 * i386-opc.tbl: Fold various AVX512VL templates.
366 * i386-tlb.h: Re-generate.
368 2018-03-08 Jan Beulich <jbeulich@suse.com>
370 * i386-opc.tbl (vexpandpd, vexpandps, vmovapd, vmovaps,
371 vmovdqa32, vmovdqa64, vmovdqu32, vmovdqu64, vmovupd, vmovups,
372 vpexpandd, vpexpandq): Fold AFX512VF templates.
373 * i386-tlb.h: Re-generate.
375 2018-03-08 Jan Beulich <jbeulich@suse.com>
377 * i386-opc.tbl (vgf2p8affineinvqb, vgf2p8affineqb, vgf2p8mulb):
378 Fold 128- and 256-bit VEX-encoded templates.
379 * i386-tlb.h: Re-generate.
381 2018-03-08 Jan Beulich <jbeulich@suse.com>
383 * i386-opc.tbl (vexpandpd, vexpandps, vmovapd, vmovaps,
384 vmovdqa32, vmovdqa64, vmovdqu32, vmovdqu64, vmovupd, vmovups,
385 vpexpandd, vpexpandq): Fold AVX512F templates.
386 * i386-tlb.h: Re-generate.
388 2018-03-08 Jan Beulich <jbeulich@suse.com>
390 * i386-opc.tbl (llwpcb, slwpcb, lwpval, lwpins): Fold 32- and
391 64-bit templates. Drop Disp<N>.
392 * i386-tlb.h: Re-generate.
394 2018-03-08 Jan Beulich <jbeulich@suse.com>
396 * i386-opc.tbl (vfmadd*, vfmsub*, vfnmadd*, vfnmsub*): Fold 128-
397 and 256-bit templates.
398 * i386-tlb.h: Re-generate.
400 2018-03-08 Jan Beulich <jbeulich@suse.com>
402 * i386-opc.tbl (cmpxchg8b): Add NoRex64.
403 * i386-tlb.h: Re-generate.
405 2018-03-08 Jan Beulich <jbeulich@suse.com>
407 * i386-opc.tbl (cmpxchg16b, fisttp, fisttpll, bndmov, mwaitx):
409 * i386-tlb.h: Re-generate.
411 2018-03-08 Jan Beulich <jbeulich@suse.com>
413 * i386-opc.tbl (ldmxcsr, stmxcsr): Add NoAVX.
414 * i386-tlb.h: Re-generate.
416 2018-03-08 Jan Beulich <jbeulich@suse.com>
418 * i386-gen.c (opcode_modifiers): Delete FloatD.
419 * i386-opc.h (FloatD): Delete.
420 (struct i386_opcode_modifier): Delete floatd.
421 * i386-opc.tbl (fadd, fsub, fsubr, fmul, fdiv, fdivr): Replace
423 * i386-tlb.h: Re-generate.
425 2018-03-08 Jan Beulich <jbeulich@suse.com>
427 * i386-dis.c (float_reg): Adjust DC and DE fsub*/fdiv* patterns.
429 2018-03-08 Jan Beulich <jbeulich@suse.com>
431 * i386-opc.tbl (vmovd): Disallow Qword memory operands.
432 * i386-tlb.h: Re-generate.
434 2018-03-08 Jan Beulich <jbeulich@suse.com>
436 * i386-opc.tbl (vcvtpd2ps): Fold AVX 128- and 256-bit memory
438 * i386-tlb.h: Re-generate.
440 2018-03-07 Alan Modra <amodra@gmail.com>
442 * disassemble.c (disassembler): Use bfd_arch_powerpc entry for
444 * disassemble.h (print_insn_rs6000): Delete.
445 * ppc-dis.c (powerpc_init_dialect): Handle rs6000.
446 (disassemble_init_powerpc): Call powerpc_init_dialect for rs6000.
447 (print_insn_rs6000): Delete.
449 2018-03-03 Alan Modra <amodra@gmail.com>
451 * sysdep.h (opcodes_error_handler): Define.
452 (_bfd_error_handler): Declare.
453 * Makefile.am: Remove stray #.
454 * opc2c.c (main): Remove bogus -l arg handling. Print "DO NOT
456 * aarch64-dis.c, * arc-dis.c, * arm-dis.c, * avr-dis.c,
457 * d30v-dis.c, * h8300-dis.c, * mmix-dis.c, * ppc-dis.c,
458 * riscv-dis.c, * s390-dis.c, * sparc-dis.c, * v850-dis.c: Use
459 opcodes_error_handler to print errors. Standardize error messages.
460 * msp430-decode.opc, * nios2-dis.c, * rl78-decode.opc: Likewise,
461 and include opintl.h.
462 * nds32-asm.c: Likewise, and include sysdep.h and opintl.h.
463 * i386-gen.c: Standardize error messages.
464 * msp430-decode.c, * rl78-decode.c, rx-decode.c: Regenerate.
465 * Makefile.in: Regenerate.
466 * epiphany-asm.c, * epiphany-desc.c, * epiphany-dis.c,
467 * epiphany-ibld.c, * fr30-asm.c, * fr30-desc.c, * fr30-dis.c,
468 * fr30-ibld.c, * frv-asm.c, * frv-desc.c, * frv-dis.c, * frv-ibld.c,
469 * frv-opc.c, * ip2k-asm.c, * ip2k-desc.c, * ip2k-dis.c, * ip2k-ibld.c,
470 * iq2000-asm.c, * iq2000-desc.c, * iq2000-dis.c, * iq2000-ibld.c,
471 * lm32-asm.c, * lm32-desc.c, * lm32-dis.c, * lm32-ibld.c,
472 * m32c-asm.c, * m32c-desc.c, * m32c-dis.c, * m32c-ibld.c,
473 * m32r-asm.c, * m32r-desc.c, * m32r-dis.c, * m32r-ibld.c,
474 * mep-asm.c, * mep-desc.c, * mep-dis.c, * mep-ibld.c, * mt-asm.c,
475 * mt-desc.c, * mt-dis.c, * mt-ibld.c, * or1k-asm.c, * or1k-desc.c,
476 * or1k-dis.c, * or1k-ibld.c, * xc16x-asm.c, * xc16x-desc.c,
477 * xc16x-dis.c, * xc16x-ibld.c, * xstormy16-asm.c, * xstormy16-desc.c,
478 * xstormy16-dis.c, * xstormy16-ibld.c: Regenerate.
480 2018-03-01 H.J. Lu <hongjiu.lu@intel.com>
482 * * i386-opc.tbl: Add "Optimize" to AVX256 and AVX512
483 vpsub[bwdq] instructions.
484 * i386-tbl.h: Regenerated.
486 2018-03-01 Alan Modra <amodra@gmail.com>
488 * configure.ac (ALL_LINGUAS): Sort.
489 * configure: Regenerate.
491 2018-02-27 Thomas Preud'homme <thomas.preudhomme@arm.com>
493 * arm-dis.c (print_insn_coprocessor): Replace uses of ARM_FEATURE_COPY
494 macro by assignements.
496 2018-02-27 H.J. Lu <hongjiu.lu@intel.com>
499 * i386-gen.c (opcode_modifiers): Add Optimize.
500 * i386-opc.h (Optimize): New enum.
501 (i386_opcode_modifier): Add optimize.
502 * i386-opc.tbl: Add "Optimize" to "mov $imm, reg",
503 "sub reg, reg/mem", "test $imm, acc", "test $imm, reg/mem",
504 "and $imm, acc", "and $imm, reg/mem", "xor reg, reg/mem",
505 "movq $imm, reg" and AVX256 and AVX512 versions of vandnps,
506 vandnpd, vpandn, vpandnd, vpandnq, vxorps, vxorpd, vpxor,
508 * i386-tbl.h: Regenerated.
510 2018-02-26 Alan Modra <amodra@gmail.com>
512 * crx-dis.c (getregliststring): Allocate a large enough buffer
513 to silence false positive gcc8 warning.
515 2018-02-22 Shea Levy <shea@shealevy.com>
517 * disassemble.c (ARCH_riscv): Define if ARCH_all.
519 2018-02-22 H.J. Lu <hongjiu.lu@intel.com>
521 * i386-opc.tbl: Add {rex},
522 * i386-tbl.h: Regenerated.
524 2018-02-20 Maciej W. Rozycki <macro@mips.com>
526 * mips16-opc.c (decode_mips16_operand) <'M'>: Remove case.
527 (mips16_opcodes): Replace `M' with `m' for "restore".
529 2018-02-19 Thomas Preud'homme <thomas.preudhomme@arm.com>
531 * arm-dis.c (thumb_opcodes): Fix BXNS mask.
533 2018-02-13 Maciej W. Rozycki <macro@mips.com>
535 * wasm32-dis.c (print_insn_wasm32): Rename `index' local
536 variable to `function_index'.
538 2018-02-13 Nick Clifton <nickc@redhat.com>
541 * metag-dis.c (print_fmmov): Double buffer size to avoid warning
542 about truncation of printing.
544 2018-02-12 Henry Wong <henry@stuffedcow.net>
546 * mips-opc.c (mips_builtin_opcodes): Correct "sigrie" encoding.
548 2018-02-05 Nick Clifton <nickc@redhat.com>
550 * po/pt_BR.po: Updated Brazilian Portuguese translation.
552 2018-01-23 Igor Tsimbalist <igor.v.tsimbalist@intel.com>
554 * i386-dis.c (enum): Add pconfig.
555 * i386-gen.c (cpu_flag_init): Add CPU_PCONFIG_FLAGS.
556 (cpu_flags): Add CpuPCONFIG.
557 * i386-opc.h (enum): Add CpuPCONFIG.
558 (i386_cpu_flags): Add cpupconfig.
559 * i386-opc.tbl: Add PCONFIG instruction.
560 * i386-init.h: Regenerate.
561 * i386-tbl.h: Likewise.
563 2018-01-23 Igor Tsimbalist <igor.v.tsimbalist@intel.com>
565 * i386-dis.c (enum): Add PREFIX_0F09.
566 * i386-gen.c (cpu_flag_init): Add CPU_WBNOINVD_FLAGS.
567 (cpu_flags): Add CpuWBNOINVD.
568 * i386-opc.h (enum): Add CpuWBNOINVD.
569 (i386_cpu_flags): Add cpuwbnoinvd.
570 * i386-opc.tbl: Add WBNOINVD instruction.
571 * i386-init.h: Regenerate.
572 * i386-tbl.h: Likewise.
574 2018-01-17 Jim Wilson <jimw@sifive.com>
576 * riscv-opc.c (riscv_opcodes) <addi>: Use z instead of 0.
578 2018-01-17 Igor Tsimbalist <igor.v.tsimbalist@intel.com>
580 * i386-gen.c (cpu_flag_init): Delete CPU_CET_FLAGS, CpuCET.
581 Add CPU_IBT_FLAGS, CPU_SHSTK_FLAGS, CPY_ANY_IBT_FLAGS,
582 CPU_ANY_SHSTK_FLAGS, CpuIBT, CpuSHSTK.
583 (cpu_flags): Add CpuIBT, CpuSHSTK.
584 * i386-opc.h (enum): Add CpuIBT, CpuSHSTK.
585 (i386_cpu_flags): Add cpuibt, cpushstk.
586 * i386-opc.tbl: Change CpuCET to CpuSHSTK and CpuIBT.
587 * i386-init.h: Regenerate.
588 * i386-tbl.h: Likewise.
590 2018-01-16 Nick Clifton <nickc@redhat.com>
592 * po/pt_BR.po: Updated Brazilian Portugese translation.
593 * po/de.po: Updated German translation.
595 2018-01-15 Jim Wilson <jimw@sifive.com>
597 * riscv-opc.c (match_c_nop): New.
598 (riscv_opcodes) <addi>: Handle an addi that compresses to c.nop.
600 2018-01-15 Nick Clifton <nickc@redhat.com>
602 * po/uk.po: Updated Ukranian translation.
604 2018-01-13 Nick Clifton <nickc@redhat.com>
606 * po/opcodes.pot: Regenerated.
608 2018-01-13 Nick Clifton <nickc@redhat.com>
610 * configure: Regenerate.
612 2018-01-13 Nick Clifton <nickc@redhat.com>
616 2018-01-11 Igor Tsimbalist <igor.v.tsimbalist@intel.com>
618 * i386-opc.tbl: Remove VL variants for 4FMAPS and 4VNNIW insns.
619 * i386-tbl.h: Regenerate.
621 2018-01-10 Jan Beulich <jbeulich@suse.com>
623 * i386-opc.tbl (v4fmaddss, v4fnmaddss): Adjust Disp8MemShift.
624 * i386-tbl.h: Re-generate.
626 2018-01-10 Jan Beulich <jbeulich@suse.com>
628 * i386-opc.tbl (vpcmpeqb, vpcmpleb, vpcmpltb, vpcmpneqb,
629 vpcmpnleb, vpcmpnltb, vpcmpequb, vpcmpleub, vpcmpltub,
630 vpcmpnequb, vpcmpnleub, vpcmpnltub, vpcmpeqw, vpcmplew,
631 vpcmpltw, vpcmpneqw, vpcmpnlew, vpcmpnltw, vpcmpequw, vpcmpleuw,
632 vpcmpltuw, vpcmpnequw, vpcmpnleuw, vpcmpnltuw): Adjust
633 Disp8MemShift of AVX512VL forms.
634 * i386-tbl.h: Re-generate.
636 2018-01-09 Jim Wilson <jimw@sifive.com>
638 * riscv-dis.c (maybe_print_address): If base_reg is zero,
639 then the hi_addr value is zero.
641 2018-01-09 James Greenhalgh <james.greenhalgh@arm.com>
643 * arm-dis.c (arm_opcodes): Add csdb.
644 (thumb32_opcodes): Add csdb.
646 2018-01-09 James Greenhalgh <james.greenhalgh@arm.com>
648 * aarch64-tbl.h (aarch64_opcode_table): Add "csdb".
649 * aarch64-asm-2.c: Regenerate.
650 * aarch64-dis-2.c: Regenerate.
651 * aarch64-opc-2.c: Regenerate.
653 2018-01-08 H.J. Lu <hongjiu.lu@intel.com>
656 * i386-opc.tbl: Properly encode vmovd with Qword memeory operand.
657 Remove AVX512 vmovd with 64-bit operands.
658 * i386-tbl.h: Regenerated.
660 2018-01-05 Jim Wilson <jimw@sifive.com>
662 * riscv-dis.c (print_insn_args) <'s'>: Call maybe_print_address for a
665 2018-01-03 Alan Modra <amodra@gmail.com>
667 Update year range in copyright notice of all files.
669 2018-01-02 Jan Beulich <jbeulich@suse.com>
671 * i386-gen.c (operand_type_init): Restore OPERAND_TYPE_REGYMM
672 and OPERAND_TYPE_REGZMM entries.
674 For older changes see ChangeLog-2017
676 Copyright (C) 2018 Free Software Foundation, Inc.
678 Copying and distribution of this file, with or without modification,
679 are permitted in any medium without royalty provided the copyright
680 notice and this notice are preserved.
686 version-control: never