1 2005-08-12 Martin Schwidefsky <schwidefsky@de.ibm.com>
3 * s390-dis.c (print_insn_s390): Print unsigned operands with %u.
4 * s390-mkopc.c (s390_opcode_cpu_val): Add support for cpu type z9-109.
6 * s390-opc.c (I32_16, U32_16, M_16): Add defines 32 bit immediates
7 and 4 bit optional masks.
8 (INSTR_RIL_RI, INSTR_RIL_RU, INSTR_RRF_M0RR, INSTR_RSE_CCRD,
9 INSTR_RSY_CCRD, INSTR_SSF_RRDRD): Add new instruction formats.
10 (MASK_RIL_RI, MASK_RIL_RU, MASK_RRF_M0RR, MASK_RSE_CCRD,
11 MASK_RSY_CCRD, MASK_SSF_RRDRD): Likewise.
12 (s390_opformats): Likewise.
13 * s390-opc.txt: Add new instructions for cpu type z9-109.
15 2005-08-05 John David Anglin <dave.anglin@nrc-crnc.gc.ca>
17 * hppa-dis.c (print_insn_hppa): Prefix 21-bit values with "L%".
19 2005-07-29 Paul Brook <paul@codesourcery.com>
21 * arm-dis.c: Fix disassebly of thumb2 writeback addressing modes.
23 2005-07-29 Paul Brook <paul@codesourcery.com>
25 * arm-dis.c (thumb32_opc): Fix addressing mode for tbh.
26 (print_insn_thumb32): Fix decoding of thumb2 'I' operands.
28 2005-07-25 DJ Delorie <dj@redhat.com>
30 * m32c-asm.c Regenerate.
31 * m32c-dis.c Regenerate.
33 2005-07-20 DJ Delorie <dj@redhat.com>
35 * disassemble.c (disassemble_init_for_target): M32C ISAs are
36 enums, so convert them to bit masks, which attributes are.
38 2005-07-18 Nick Clifton <nickc@redhat.com>
40 * configure.in: Restore alpha ordering to list of arches.
41 * configure: Regenerate.
42 * disassemble.c: Restore alpha ordering to list of arches.
44 2005-07-18 Nick Clifton <nickc@redhat.com>
46 * m32c-asm.c: Regenerate.
47 * m32c-desc.c: Regenerate.
48 * m32c-desc.h: Regenerate.
49 * m32c-dis.c: Regenerate.
50 * m32c-ibld.h: Regenerate.
51 * m32c-opc.c: Regenerate.
52 * m32c-opc.h: Regenerate.
54 2005-07-18 H.J. Lu <hongjiu.lu@intel.com>
56 * i386-dis.c (PNI_Fixup): Update comment.
57 (VMX_Fixup): Properly handle the suffix check.
59 2005-07-16 John David Anglin <dave.anglin@nrc-cnrc.gc.ca>
61 * hppa-dis.c (print_insn_hppa): Add space after 'w' in wide-mode
64 2005-07-16 Alan Modra <amodra@bigpond.net.au>
66 * Makefile.am: Run "make dep-am".
67 (stamp-m32c): Fix cpu dependencies.
68 * Makefile.in: Regenerate.
69 * ip2k-dis.c: Regenerate.
71 2007-07-15 H.J. Lu <hongjiu.lu@intel.com>
73 * i386-dis.c (OP_VMX): New. Handle Intel VMX Instructions.
74 (VMX_Fixup): New. Fix up Intel VMX Instructions.
78 (dis386_twobyte): Updated entries 0x78 and 0x79.
79 (twobyte_has_modrm): Likewise.
80 (grps): Use OP_VMX in the "sgdtIQ" entry. Updated GRP9.
81 (OP_G): Handle m_mode.
83 2005-07-14 Jim Blandy <jimb@redhat.com>
85 Add support for the Renesas M32C and M16C.
86 * m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c, m32c-opc.c: New.
87 * m32c-desc.h, m32c-opc.h: New.
88 * Makefile.am (HFILES): List m32c-desc.h and m32c-opc.h.
89 (CFILES): List m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c,
91 (ALL_MACHINES): List m32c-asm.lo, m32c-desc.lo, m32c-dis.lo,
92 m32c-ibld.lo, m32c-opc.lo.
93 (CLEANFILES): List stamp-m32c.
94 (M32C_DEPS): List stamp-m32c, if CGEN_MAINT.
95 (CGEN_CPUS): Add m32c.
96 (m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c, m32c-opc.c)
97 (m32c-desc.h, m32c-opc.h): Depend on M32C_DEPS.
98 (m32c_opc_h): New variable.
99 (stamp-m32c, m32c-asm.lo, m32c-desc.lo, m32c-dis.lo, m32c-ibld.lo)
100 (m32c-opc.lo): New rules.
101 * Makefile.in: Regenerated.
102 * configure.in: Add case for bfd_m32c_arch.
103 * configure: Regenerated.
104 * disassemble.c (ARCH_m32c): New.
105 [ARCH_m32c]: #include "m32c-desc.h".
106 (disassembler) [ARCH_m32c]: Add case for bfd_arch_m32c.
107 (disassemble_init_for_target) [ARCH_m32c]: Same.
109 * cgen-ops.h, cgen-types.h: New files.
110 * Makefile.am (HFILES): List them.
111 * Makefile.in: Regenerated.
113 2005-07-07 Kaveh R. Ghazi <ghazi@caip.rutgers.edu>
115 * arc-dis.c, arm-dis.c, cris-dis.c, crx-dis.c, d10v-dis.c,
116 d30v-dis.c, fr30-dis.c, h8300-dis.c, h8500-dis.c, i860-dis.c,
117 ia64-dis.c, ip2k-dis.c, m10200-dis.c, m10300-dis.c,
118 m88k-dis.c, mcore-dis.c, mips-dis.c, ms1-dis.c, or32-dis.c,
119 ppc-dis.c, sh64-dis.c, sparc-dis.c, tic4x-dis.c, tic80-dis.c,
120 v850-dis.c: Fix format bugs.
121 * ia64-gen.c (fail, warn): Add format attribute.
122 * or32-opc.c (debug): Likewise.
124 2005-07-07 Khem Raj <kraj@mvista.com>
126 * arm-dis.c (opcode32 arm_opcodes): Fix ARM VFP fadds instruction
129 2005-07-06 Alan Modra <amodra@bigpond.net.au>
131 * Makefile.am (stamp-m32r): Fix path to cpu files.
132 (stamp-m32r, stamp-iq2000): Likewise.
133 * Makefile.in: Regenerate.
134 * m32r-asm.c: Regenerate.
135 * po/POTFILES.in: Remove arm-opc.h. Add ms1-asm.c, ms1-desc.c,
136 ms1-desc.h, ms1-dis.c, ms1-ibld.c, ms1-opc.c, ms1-opc.h.
138 2005-07-05 Nick Clifton <nickc@redhat.com>
140 * iq2000-asm.c: Regenerate.
141 * ms1-asm.c: Regenerate.
143 2005-07-05 Jan Beulich <jbeulich@novell.com>
145 * i386-dis.c (SVME_Fixup): New.
146 (grps): Use it for the lidt entry.
147 (PNI_Fixup): Call OP_M rather than OP_E.
148 (INVLPG_Fixup): Likewise.
150 2005-07-04 H.J. Lu <hongjiu.lu@intel.com>
152 * tic30-dis.c (cnvt_tmsfloat_ieee): Use HUGE_VALF if defined.
154 2005-07-01 Nick Clifton <nickc@redhat.com>
156 * a29k-dis.c: Update to ISO C90 style function declarations and
158 * alpha-opc.c: Likewise.
159 * arc-dis.c: Likewise.
160 * arc-opc.c: Likewise.
161 * avr-dis.c: Likewise.
162 * cgen-asm.in: Likewise.
163 * cgen-dis.in: Likewise.
164 * cgen-ibld.in: Likewise.
165 * cgen-opc.c: Likewise.
166 * cris-dis.c: Likewise.
167 * d10v-dis.c: Likewise.
168 * d30v-dis.c: Likewise.
169 * d30v-opc.c: Likewise.
170 * dis-buf.c: Likewise.
171 * dlx-dis.c: Likewise.
172 * h8300-dis.c: Likewise.
173 * h8500-dis.c: Likewise.
174 * hppa-dis.c: Likewise.
175 * i370-dis.c: Likewise.
176 * i370-opc.c: Likewise.
177 * m10200-dis.c: Likewise.
178 * m10300-dis.c: Likewise.
179 * m68k-dis.c: Likewise.
180 * m88k-dis.c: Likewise.
181 * mips-dis.c: Likewise.
182 * mmix-dis.c: Likewise.
183 * msp430-dis.c: Likewise.
184 * ns32k-dis.c: Likewise.
185 * or32-dis.c: Likewise.
186 * or32-opc.c: Likewise.
187 * pdp11-dis.c: Likewise.
188 * pj-dis.c: Likewise.
189 * s390-dis.c: Likewise.
190 * sh-dis.c: Likewise.
191 * sh64-dis.c: Likewise.
192 * sparc-dis.c: Likewise.
193 * sparc-opc.c: Likewise.
194 * sysdep.h: Likewise.
195 * tic30-dis.c: Likewise.
196 * tic4x-dis.c: Likewise.
197 * tic80-dis.c: Likewise.
198 * v850-dis.c: Likewise.
199 * v850-opc.c: Likewise.
200 * vax-dis.c: Likewise.
201 * w65-dis.c: Likewise.
202 * z8kgen.c: Likewise.
204 * fr30-*: Regenerate.
206 * ip2k-*: Regenerate.
207 * iq2000-*: Regenerate.
208 * m32r-*: Regenerate.
210 * openrisc-*: Regenerate.
211 * xstormy16-*: Regenerate.
213 2005-06-23 Ben Elliston <bje@gnu.org>
215 * m68k-dis.c: Use ISC C90.
216 * m68k-opc.c: Formatting fixes.
218 2005-06-16 David Ung <davidu@mips.com>
220 * mips16-opc.c (mips16_opcodes): Add the following MIPS16e
221 instructions to the table; seb/seh/sew/zeb/zeh/zew.
223 2005-06-15 Dave Brolley <brolley@redhat.com>
225 Contribute Morpho ms1 on behalf of Red Hat
226 * ms1-asm.c, ms1-desc.c, ms1-dis.c, ms1-ibld.c, ms1-opc.c,
227 ms1-opc.h: New files, Morpho ms1 target.
229 2004-05-14 Stan Cox <scox@redhat.com>
231 * disassemble.c (ARCH_ms1): Define.
232 (disassembler): Handle bfd_arch_ms1
234 2004-05-13 Michael Snyder <msnyder@redhat.com>
236 * Makefile.am, Makefile.in: Add ms1 target.
237 * configure.in: Ditto.
239 2005-06-08 Zack Weinberg <zack@codesourcery.com>
241 * arm-opc.h: Delete; fold contents into ...
242 * arm-dis.c: ... here. Move includes of internal COFF headers
243 next to includes of internal ELF headers.
244 (streq, WORD_ADDRESS, BDISP, BDISP23): Delete, unused.
245 (struct arm_opcode): Rename struct opcode32. Make 'assembler' const.
246 (struct thumb_opcode): Rename struct opcode16. Make 'assembler' const.
247 (arm_conditional, arm_fp_const, arm_shift, arm_regname, regnames)
248 (iwmmxt_wwnames, iwmmxt_wwssnames):
250 (regnames): Remove iWMMXt coprocessor register sets.
251 (iwmmxt_regnames, iwmmxt_cregnames): New statics.
252 (get_arm_regnames): Adjust fourth argument to match above changes.
253 (set_iwmmxt_regnames): Delete.
254 (print_insn_arm): Constify 'c'. Use ISO syntax for function
255 pointer calls. Expand sole use of BDISP. Use iwmmxt_regnames
256 and iwmmxt_cregnames, not set_iwmmxt_regnames.
257 (print_insn_thumb16, print_insn_thumb32): Constify 'c'. Use
258 ISO syntax for function pointer calls.
260 2005-06-07 Zack Weinberg <zack@codesourcery.com>
262 * arm-dis.c: Split up the comments describing the format codes, so
263 that the ARM and 16-bit Thumb opcode tables each have comments
264 preceding them that describe all the codes, and only the codes,
265 valid in those tables. (32-bit Thumb table is already like this.)
266 Reorder the lists in all three comments to match the order in
267 which the codes are implemented.
268 Remove all forward declarations of static functions. Convert all
269 function definitions to ISO C format.
270 (print_insn_arm, print_insn_thumb16, print_insn_thumb32):
272 (print_insn_thumb16): Remove unused case 'I'.
273 (print_insn): Update for changed calling convention of subroutines.
275 2005-05-25 Jan Beulich <jbeulich@novell.com>
277 * i386-dis.c (OP_E): In Intel mode, display 32-bit displacements in
278 hex (but retain it being displayed as signed). Remove redundant
279 checks. Add handling of displacements for 16-bit addressing in Intel
282 2005-05-25 Jan Beulich <jbeulich@novell.com>
284 * i386-dis.c (prefix_name): Remove pointless mode_64bit check.
285 (OP_E): Remove redundant REX_EXTZ handling. Remove pointless
286 masking of 'rm' in 16-bit memory address handling.
288 2005-05-19 Anton Blanchard <anton@samba.org>
290 * ppc-dis.c (powerpc_dialect): Handle "-Mpower5".
291 (print_ppc_disassembler_options): Document it.
292 * ppc-opc.c (SVC_LEV): Define.
293 (LEV): Allow optional operand.
295 (powerpc_opcodes): Extend "sc". Adjust "svc" and "svcl". Add
296 "hrfid", "popcntb", "fsqrtes", "fsqrtes.", "fre" and "fre.".
298 2005-05-19 Kelley Cook <kcook@gcc.gnu.org>
300 * Makefile.in: Regenerate.
302 2005-05-17 Zack Weinberg <zack@codesourcery.com>
304 * arm-dis.c (thumb_opcodes): Add disassembly for V6T2 16-bit
305 instructions. Adjust disassembly of some opcodes to match
307 (thumb32_opcodes): New table.
308 (print_insn_thumb): Rename print_insn_thumb16; don't handle
309 two-halfword branches here.
310 (print_insn_thumb32): New function.
311 (print_insn): Choose among print_insn_arm, print_insn_thumb16,
312 and print_insn_thumb32. Be consistent about order of
313 halfwords when printing 32-bit instructions.
315 2005-05-07 H.J. Lu <hongjiu.lu@intel.com>
318 * i386-dis.c (branch_v_mode): New.
319 (indirEv): Use branch_v_mode instead of v_mode.
320 (OP_E): Handle branch_v_mode.
322 2005-05-07 H.J. Lu <hongjiu.lu@intel.com>
324 * d10v-dis.c (dis_2_short): Support 64bit host.
326 2005-05-07 Nick Clifton <nickc@redhat.com>
328 * po/nl.po: Updated translation.
330 2005-05-07 Nick Clifton <nickc@redhat.com>
332 * Update the address and phone number of the FSF organization in
333 the GPL notices in the following files:
334 a29k-dis.c, aclocal.m4, alpha-dis.c, alpha-opc.c, arc-dis.c,
335 arc-dis.h, arc-ext.c, arc-ext.h, arc-opc.c, arm-dis.c, arm-opc.h,
336 avr-dis.c, cgen-asm.c, cgen-asm.in, cgen-dis.c, cgen-dis.in,
337 cgen-ibld.in, cgen-opc.c, cgen.sh, cris-dis.c, cris-opc.c,
338 crx-dis.c, crx-opc.c, d10v-dis.c, d10v-opc.c, d30v-dis.c,
339 d30v-opc.c, dis-buf.c, dis-init.c, disassemble.c, dlx-dis.c,
340 fr30-asm.c, fr30-desc.c, fr30-desc.h, fr30-dis.c, fr30-ibld.c,
341 fr30-opc.c, fr30-opc.h, frv-asm.c, frv-desc.c, frv-desc.h,
342 frv-dis.c, frv-ibld.c, frv-opc.c, frv-opc.h, h8300-dis.c,
343 h8500-dis.c, h8500-opc.h, hppa-dis.c, i370-dis.c, i370-opc.c,
344 i386-dis.c, i860-dis.c, i960-dis.c, ia64-asmtab.h, ia64-dis.c,
345 ia64-gen.c, ia64-opc-a.c, ia64-opc-b.c, ia64-opc-d.c,
346 ia64-opc-f.c, ia64-opc-i.c, ia64-opc-m.c, ia64-opc-x.c,
347 ia64-opc.c, ia64-opc.h, ip2k-asm.c, ip2k-desc.c, ip2k-desc.h,
348 ip2k-dis.c, ip2k-ibld.c, ip2k-opc.c, ip2k-opc.h, iq2000-asm.c,
349 iq2000-desc.c, iq2000-desc.h, iq2000-dis.c, iq2000-ibld.c,
350 iq2000-opc.c, iq2000-opc.h, m10200-dis.c, m10200-opc.c,
351 m10300-dis.c, m10300-opc.c, m32r-asm.c, m32r-desc.c, m32r-desc.h,
352 m32r-dis.c, m32r-ibld.c, m32r-opc.c, m32r-opc.h, m32r-opinst.c,
353 m68hc11-dis.c, m68hc11-opc.c, m68k-dis.c, m68k-opc.c, m88k-dis.c,
354 maxq-dis.c, mcore-dis.c, mcore-opc.h, mips-dis.c, mips-opc.c,
355 mips16-opc.c, mmix-dis.c, mmix-opc.c, msp430-dis.c, ns32k-dis.c,
356 openrisc-asm.c, openrisc-desc.c, openrisc-desc.h, openrisc-dis.c,
357 openrisc-ibld.c, openrisc-opc.c, openrisc-opc.h, opintl.h,
358 or32-dis.c, or32-opc.c, pdp11-dis.c, pdp11-opc.c, pj-dis.c,
359 pj-opc.c, ppc-dis.c, ppc-opc.c, s390-dis.c, s390-mkopc.c,
360 s390-opc.c, sh-dis.c, sh-opc.h, sh64-dis.c, sh64-opc.c,
361 sh64-opc.h, sparc-dis.c, sparc-opc.c, sysdep.h, tic30-dis.c,
362 tic4x-dis.c, tic54x-dis.c, tic54x-opc.c, tic80-dis.c, tic80-opc.c,
363 v850-dis.c, v850-opc.c, vax-dis.c, w65-dis.c, w65-opc.h,
364 xstormy16-asm.c, xstormy16-desc.c, xstormy16-desc.h,
365 xstormy16-dis.c, xstormy16-ibld.c, xstormy16-opc.c,
366 xstormy16-opc.h, xtensa-dis.c, z8k-dis.c, z8kgen.c
368 2005-05-05 James E Wilson <wilson@specifixinc.com>
370 * ia64-opc.c: Include sysdep.h before libiberty.h.
372 2005-05-05 Nick Clifton <nickc@redhat.com>
374 * configure.in (ALL_LINGUAS): Add vi.
375 * configure: Regenerate.
378 2005-04-26 Jerome Guitton <guitton@gnat.com>
380 * configure.in: Fix the check for basename declaration.
381 * configure: Regenerate.
383 2005-04-19 Alan Modra <amodra@bigpond.net.au>
385 * ppc-opc.c (RTO): Define.
386 (powerpc_opcodes <tlbsx, tlbsx., tlbre>): Combine PPC403 and BOOKE
387 entries to suit PPC440.
389 2005-04-18 Mark Kettenis <kettenis@gnu.org>
391 * i386-dis.c: Insert hyphens into selected VIA PadLock extensions.
394 2005-04-14 Nick Clifton <nickc@redhat.com>
396 * po/fi.po: New translation: Finnish.
397 * configure.in (ALL_LINGUAS): Add fi.
398 * configure: Regenerate.
400 2005-04-14 Alan Modra <amodra@bigpond.net.au>
402 * Makefile.am (NO_WERROR): Define.
403 * configure.in: Invoke AM_BINUTILS_WARNINGS.
404 * Makefile.in: Regenerate.
405 * aclocal.m4: Regenerate.
406 * configure: Regenerate.
408 2005-04-04 Nick Clifton <nickc@redhat.com>
410 * fr30-asm.c: Regenerate.
411 * frv-asm.c: Regenerate.
412 * iq2000-asm.c: Regenerate.
413 * m32r-asm.c: Regenerate.
414 * openrisc-asm.c: Regenerate.
416 2005-04-01 Jan Beulich <jbeulich@novell.com>
418 * i386-dis.c (PNI_Fixup): Neither mwait nor monitor have any
419 visible operands in Intel mode. The first operand of monitor is
422 2005-04-01 Jan Beulich <jbeulich@novell.com>
424 * i386-dis.c (INVLPG_Fixup): Decode rdtscp; change code to allow for
425 easier future additions.
427 2005-03-31 Jerome Guitton <guitton@gnat.com>
429 * configure.in: Check for basename.
430 * configure: Regenerate.
433 2005-03-29 H.J. Lu <hongjiu.lu@intel.com>
435 * i386-dis.c (SEG_Fixup): New.
437 (dis386): Use "Sv" for 0x8c and 0x8e.
439 2005-03-21 Jan-Benedict Glaw <jbglaw@lug-owl.de>
440 Nick Clifton <nickc@redhat.com>
442 * vax-dis.c: (entry_addr): New varible: An array of user supplied
443 function entry mask addresses.
444 (entry_addr_occupied_slots): New variable: The number of occupied
445 elements in entry_addr.
446 (entry_addr_total_slots): New variable: The total number of
447 elements in entry_addr.
448 (parse_disassembler_options): New function. Fills in the entry_addr
450 (free_entry_array): New function. Release the memory used by the
451 entry addr array. Suppressed because there is no way to call it.
452 (is_function_entry): Check if a given address is a function's
453 start address by looking at supplied entry mask addresses and
454 symbol information, if available.
455 (print_insn_vax): Use parse_disassembler_options and is_function_entry.
457 2005-03-23 H.J. Lu <hongjiu.lu@intel.com>
459 * cris-dis.c (print_with_operands): Use ~31L for long instead
462 2005-03-20 H.J. Lu <hongjiu.lu@intel.com>
464 * mmix-opc.c (O): Revert the last change.
467 2005-03-19 H.J. Lu <hongjiu.lu@intel.com>
469 * mmix-opc.c (O): Use 24UL instead of 24 for unsigned long.
472 2005-03-19 Hans-Peter Nilsson <hp@bitrange.com>
474 * mmix-opc.c (O, Z): Force expression as unsigned long.
476 2005-03-18 Nick Clifton <nickc@redhat.com>
478 * ip2k-asm.c: Regenerate.
479 * op/opcodes.pot: Regenerate.
481 2005-03-16 Nick Clifton <nickc@redhat.com>
482 Ben Elliston <bje@au.ibm.com>
484 * configure.in (werror): New switch: Add -Werror to the
485 compiler command line. Enabled by default. Disable via
487 * configure: Regenerate.
489 2005-03-16 Alan Modra <amodra@bigpond.net.au>
491 * ppc-dis.c (powerpc_dialect): Don't set PPC_OPCODE_ALTIVEC when
494 2005-03-15 Alan Modra <amodra@bigpond.net.au>
496 * po/es.po: Commit new Spanish translation.
498 * po/fr.po: Commit new French translation.
500 2005-03-14 Jan-Benedict Glaw <jbglaw@lug-owl.de>
502 * vax-dis.c: Fix spelling error
503 (print_insn_vax): Use ".word 0x0012 # Entry mask: r1 r2 >" instead
504 of just "Entry mask: < r1 ... >"
506 2005-03-12 Zack Weinberg <zack@codesourcery.com>
508 * arm-dis.c (arm_opcodes): Document %E and %V.
509 Add entries for v6T2 ARM instructions:
510 bfc bfi mls strht ldrht ldrsht ldrsbt movw movt rbit ubfx sbfx.
511 (print_insn_arm): Add support for %E and %V.
512 (thumb_opcodes): Add ARMv6K instructions nop, sev, wfe, wfi, yield.
514 2005-03-10 Jeff Baker <jbaker@qnx.com>
515 Alan Modra <amodra@bigpond.net.au>
517 * ppc-opc.c (insert_sprg, extract_sprg): New Functions.
518 (powerpc_operands <SPRG>): Call the above. Bit field is 5 bits.
520 (XSPRG_MASK): Mask off extra bits now part of sprg field.
521 (powerpc_opcodes): Asjust mfsprg and mtsprg to suit new mask. Move
522 mfsprg4..7 after msprg and consolidate.
524 2005-03-09 Jan-Benedict Glaw <jbglaw@lug-owl.de>
526 * vax-dis.c (entry_mask_bit): New array.
527 (print_insn_vax): Decode function entry mask.
529 2005-03-07 Aldy Hernandez <aldyh@redhat.com>
531 * ppc-opc.c (powerpc_opcodes): Fix encoding of efscfd.
533 2005-03-05 Alan Modra <amodra@bigpond.net.au>
535 * po/opcodes.pot: Regenerate.
537 2005-03-03 Ramana Radhakrishnan <ramana.radhakrishnan@codito.com>
539 * arc-dis.c (a4_decoding_class): New enum.
540 (dsmOneArcInst): Use the enum values for the decoding class.
541 Remove redundant case in the switch for decodingClass value 11.
543 2005-03-02 Jan Beulich <jbeulich@novell.com>
545 * i386-dis.c (print_insn): Suppress lock prefix printing for cr8...15
547 (OP_C): Consider lock prefix in non-64-bit modes.
549 2005-02-24 Alan Modra <amodra@bigpond.net.au>
551 * cris-dis.c (format_hex): Remove ineffective warning fix.
552 * crx-dis.c (make_instruction): Warning fix.
553 * frv-asm.c: Regenerate.
555 2005-02-23 Nick Clifton <nickc@redhat.com>
557 * cgen-dis.in: Use bfd_byte for buffers that are passed to
560 * ia64-opc.c (locate_opcode_ent): Initialise opval array.
562 * crx-dis.c (make_instruction): Move argument structure into inner
563 scope and ensure that all of its fields are initialised before
566 * fr30-asm.c: Regenerate.
567 * fr30-dis.c: Regenerate.
568 * frv-asm.c: Regenerate.
569 * frv-dis.c: Regenerate.
570 * ip2k-asm.c: Regenerate.
571 * ip2k-dis.c: Regenerate.
572 * iq2000-asm.c: Regenerate.
573 * iq2000-dis.c: Regenerate.
574 * m32r-asm.c: Regenerate.
575 * m32r-dis.c: Regenerate.
576 * openrisc-asm.c: Regenerate.
577 * openrisc-dis.c: Regenerate.
578 * xstormy16-asm.c: Regenerate.
579 * xstormy16-dis.c: Regenerate.
581 2005-02-22 Alan Modra <amodra@bigpond.net.au>
583 * arc-ext.c: Warning fixes.
584 * arc-ext.h: Likewise.
585 * cgen-opc.c: Likewise.
586 * ia64-gen.c: Likewise.
587 * maxq-dis.c: Likewise.
588 * ns32k-dis.c: Likewise.
589 * w65-dis.c: Likewise.
590 * ia64-asmtab.c: Regenerate.
592 2005-02-22 Alan Modra <amodra@bigpond.net.au>
594 * fr30-desc.c: Regenerate.
595 * fr30-desc.h: Regenerate.
596 * fr30-opc.c: Regenerate.
597 * fr30-opc.h: Regenerate.
598 * frv-desc.c: Regenerate.
599 * frv-desc.h: Regenerate.
600 * frv-opc.c: Regenerate.
601 * frv-opc.h: Regenerate.
602 * ip2k-desc.c: Regenerate.
603 * ip2k-desc.h: Regenerate.
604 * ip2k-opc.c: Regenerate.
605 * ip2k-opc.h: Regenerate.
606 * iq2000-desc.c: Regenerate.
607 * iq2000-desc.h: Regenerate.
608 * iq2000-opc.c: Regenerate.
609 * iq2000-opc.h: Regenerate.
610 * m32r-desc.c: Regenerate.
611 * m32r-desc.h: Regenerate.
612 * m32r-opc.c: Regenerate.
613 * m32r-opc.h: Regenerate.
614 * m32r-opinst.c: Regenerate.
615 * openrisc-desc.c: Regenerate.
616 * openrisc-desc.h: Regenerate.
617 * openrisc-opc.c: Regenerate.
618 * openrisc-opc.h: Regenerate.
619 * xstormy16-desc.c: Regenerate.
620 * xstormy16-desc.h: Regenerate.
621 * xstormy16-opc.c: Regenerate.
622 * xstormy16-opc.h: Regenerate.
624 2005-02-21 Alan Modra <amodra@bigpond.net.au>
626 * Makefile.am: Run "make dep-am"
627 * Makefile.in: Regenerate.
629 2005-02-15 Nick Clifton <nickc@redhat.com>
631 * cgen-dis.in (print_address): Add an ATTRIBUTE_UNUSED to prevent
632 compile time warnings.
633 (print_keyword): Likewise.
634 (default_print_insn): Likewise.
636 * fr30-desc.c: Regenerated.
637 * fr30-desc.h: Regenerated.
638 * fr30-dis.c: Regenerated.
639 * fr30-opc.c: Regenerated.
640 * fr30-opc.h: Regenerated.
641 * frv-desc.c: Regenerated.
642 * frv-dis.c: Regenerated.
643 * frv-opc.c: Regenerated.
644 * ip2k-asm.c: Regenerated.
645 * ip2k-desc.c: Regenerated.
646 * ip2k-desc.h: Regenerated.
647 * ip2k-dis.c: Regenerated.
648 * ip2k-opc.c: Regenerated.
649 * ip2k-opc.h: Regenerated.
650 * iq2000-desc.c: Regenerated.
651 * iq2000-dis.c: Regenerated.
652 * iq2000-opc.c: Regenerated.
653 * m32r-asm.c: Regenerated.
654 * m32r-desc.c: Regenerated.
655 * m32r-desc.h: Regenerated.
656 * m32r-dis.c: Regenerated.
657 * m32r-opc.c: Regenerated.
658 * m32r-opc.h: Regenerated.
659 * m32r-opinst.c: Regenerated.
660 * openrisc-desc.c: Regenerated.
661 * openrisc-desc.h: Regenerated.
662 * openrisc-dis.c: Regenerated.
663 * openrisc-opc.c: Regenerated.
664 * openrisc-opc.h: Regenerated.
665 * xstormy16-desc.c: Regenerated.
666 * xstormy16-desc.h: Regenerated.
667 * xstormy16-dis.c: Regenerated.
668 * xstormy16-opc.c: Regenerated.
669 * xstormy16-opc.h: Regenerated.
671 2005-02-14 H.J. Lu <hongjiu.lu@intel.com>
673 * dis-buf.c (perror_memory): Use sprintf_vma to print out
676 2005-02-11 Nick Clifton <nickc@redhat.com>
678 * iq2000-asm.c: Regenerate.
680 * frv-dis.c: Regenerate.
682 2005-02-07 Jim Blandy <jimb@redhat.com>
684 * Makefile.am (CGEN): Load guile.scm before calling the main
686 * Makefile.in: Regenerated.
687 * cgen.sh: Be prepared for the 'cgen' argument to contain spaces.
688 Simply pass the cgen-opc.scm path to ${cgen} as its first
689 argument; ${cgen} itself now contains the '-s', or whatever is
690 appropriate for the Scheme being used.
692 2005-01-31 Andrew Cagney <cagney@gnu.org>
694 * configure: Regenerate to track ../gettext.m4.
696 2005-01-31 Jan Beulich <jbeulich@novell.com>
698 * ia64-gen.c (NELEMS): Define.
699 (shrink): Generate alias with missing second predicate register when
700 opcode has two outputs and these are both predicates.
701 * ia64-opc-i.c (FULL17): Define.
702 (ia64_opcodes_i): Add mov-to-pr alias without second input. Use FULL17
703 here to generate output template.
704 (TBITCM, TNATCM): Undefine after use.
705 * ia64-opc-m.c (ia64_opcodes_i): Add alloc alias without ar.pfs as
706 first input. Add ld16 aliases without ar.csd as second output. Add
707 st16 aliases without ar.csd as second input. Add cmpxchg aliases
708 without ar.ccv as third input. Add cmp8xchg16 aliases without ar.csd/
709 ar.ccv as third/fourth inputs. Consolidate through...
710 (CMPXCHG_acq, CMPXCHG_rel, CMPXCHG_1, CMPXCHG_2, CMPXCHG_4, CMPXCHG_8,
711 CMPXCHGn, CMP8XCHG16, CMPXCHG_ALL): Define.
712 * ia64-asmtab.c: Regenerate.
714 2005-01-27 Andrew Cagney <cagney@gnu.org>
716 * configure: Regenerate to track ../gettext.m4 change.
718 2005-01-25 Alexandre Oliva <aoliva@redhat.com>
720 2004-11-10 Alexandre Oliva <aoliva@redhat.com>
721 * frv-asm.c: Rebuilt.
722 * frv-desc.c: Rebuilt.
723 * frv-desc.h: Rebuilt.
724 * frv-dis.c: Rebuilt.
725 * frv-ibld.c: Rebuilt.
726 * frv-opc.c: Rebuilt.
727 * frv-opc.h: Rebuilt.
729 2005-01-24 Andrew Cagney <cagney@gnu.org>
731 * configure: Regenerate, ../gettext.m4 was updated.
733 2005-01-21 Fred Fish <fnf@specifixinc.com>
735 * mips-opc.c: Change INSN_ALIAS to INSN2_ALIAS.
736 Change INSN_WRITE_MDMX_ACC to INSN2_WRITE_MDMX_ACC.
737 Change INSN_READ_MDMX_ACC to INSN2_READ_MDMX_ACC.
740 2005-01-20 Alan Modra <amodra@bigpond.net.au>
742 * ppc-opc.c (powerpc_opcodes): Add optional 'l' arg to tlbiel.
744 2005-01-19 Fred Fish <fnf@specifixinc.com>
746 * mips-dis.c (no_aliases): New disassembly option flag.
747 (set_default_mips_dis_options): Init no_aliases to zero.
748 (parse_mips_dis_option): Handle no-aliases option.
749 (print_insn_mips): Ignore table entries that are aliases
750 if no_aliases is set.
751 (print_insn_mips16): Ditto.
752 * mips-opc.c (mips_builtin_opcodes): Add initializer column for
753 new pinfo2 member and add INSN_ALIAS initializers as needed. Also
754 move WR_MACC and RD_MACC initializers from pinfo to pinfo2.
755 * mips16-opc.c (mips16_opcodes): Ditto.
757 2005-01-17 Andrew Stubbs <andrew.stubbs@st.com>
759 * sh-opc.h (arch_sh2a_or_sh3e,arch_sh2a_or_sh4): Correct definition.
760 (inheritance diagram): Add missing edge.
761 (arch_sh1_up): Rename arch_sh_up to match external name to make life
762 easier for the testsuite.
763 (arch_sh4_nofp_up): Likewise, rename arch_sh4_nofpu_up.
764 (arch_sh4a_nofp_up): Likewise, rename arch_sh4a_nofpu_up.
765 (arch_sh2a_nofpu_or_sh4_nommu_nofpu_up): Add missing
766 arch_sh2a_or_sh4_up child.
767 (sh_table): Do renaming as above.
768 Correct comment for ldc.l for gas testsuite to read.
769 Remove rogue mul.l from sh1 (duplicate of the one for sh2).
770 Correct comments for movy.w and movy.l for gas testsuite to read.
771 Correct comments for fmov.d and fmov.s for gas testsuite to read.
773 2005-01-12 H.J. Lu <hongjiu.lu@intel.com>
775 * i386-dis.c (OP_E): Don't ignore scale in SIB for 64 bit mode.
777 2005-01-12 H.J. Lu <hongjiu.lu@intel.com>
779 * i386-dis.c (OP_E): Ignore scale when index == 0x4 in SIB.
781 2005-01-10 Andreas Schwab <schwab@suse.de>
783 * disassemble.c (disassemble_init_for_target) <case
784 bfd_arch_ia64>: Set skip_zeroes to 16.
785 <case bfd_arch_tic4x>: Set skip_zeroes to 32.
787 2004-12-23 Tomer Levi <Tomer.Levi@nsc.com>
789 * crx-opc.c: Mark 'bcop' instruction as RELAXABLE.
791 2004-12-14 Svein E. Seldal <Svein.Seldal@solidas.com>
793 * avr-dis.c: Prettyprint. Added printing of symbol names in all
794 memory references. Convert avr_operand() to C90 formatting.
796 2004-12-05 Tomer Levi <Tomer.Levi@nsc.com>
798 * crx-dis.c (print_arg): Use 'info->print_address_func' for address printing.
800 2004-11-29 Tomer Levi <Tomer.Levi@nsc.com>
802 * crx-opc.c (crx_optab): Mark all rbase_disps* operands as signed.
803 (no_op_insn): Initialize array with instructions that have no
805 * crx-dis.c (make_instruction): Get rid of COP_BRANCH_INS operand swapping.
807 2004-11-29 Richard Earnshaw <rearnsha@arm.com>
809 * arm-dis.c: Correct top-level comment.
811 2004-11-27 Richard Earnshaw <rearnsha@arm.com>
813 * arm-opc.h (arm_opcode, thumb_opcode): Add extra field for the
814 architecuture defining the insn.
815 (arm_opcodes, thumb_opcodes): Delete. Move to ...
816 * arm-dis.c (arm_opcodes, thumb_opcodes): Here. Add architecutre
818 Also include opcode/arm.h.
819 * Makefile.am (arm-dis.lo): Update dependency list.
820 * Makefile.in: Regenerate.
822 2004-11-22 Ravi Ramaseshan <ravi.ramaseshan@codito.com>
824 * opcode/arc-opc.c (insert_base): Modify ls_operand[LS_OFFSET] to
825 reflect the change to the short immediate syntax.
827 2004-11-19 Alan Modra <amodra@bigpond.net.au>
829 * or32-opc.c (debug): Warning fix.
830 * po/POTFILES.in: Regenerate.
832 * maxq-dis.c: Formatting.
833 (print_insn): Warning fix.
835 2004-11-17 Daniel Jacobowitz <dan@codesourcery.com>
837 * arm-dis.c (WORD_ADDRESS): Define.
838 (print_insn): Use it. Correct big-endian end-of-section handling.
840 2004-11-08 Inderpreet Singh <inderpreetb@nioda.hcltech.com>
841 Vineet Sharma <vineets@noida.hcltech.com>
843 * maxq-dis.c: New file.
844 * disassemble.c (ARCH_maxq): Define.
845 (disassembler): Add 'print_insn_maxq_little' for handling maxq
847 * configure.in: Add case for bfd_maxq_arch.
848 * configure: Regenerate.
849 * Makefile.am: Add support for maxq-dis.c
850 * Makefile.in: Regenerate.
851 * aclocal.m4: Regenerate.
853 2004-11-05 Tomer Levi <Tomer.Levi@nsc.com>
855 * crx-opc.c (crx_optab): Rename 'arg_icr' to 'arg_idxr' for Index register
857 * crx-dis.c: Likewise.
859 2004-11-04 Hans-Peter Nilsson <hp@axis.com>
861 Generally, handle CRISv32.
862 * cris-dis.c (TRACE_CASE): Define as (disdata->trace_case).
863 (struct cris_disasm_data): New type.
864 (format_reg, format_hex, cris_constraint, print_flags)
865 (get_opcode_entry): Add struct cris_disasm_data * parameter. All
867 (format_sup_reg, print_insn_crisv32_with_register_prefix)
868 (print_insn_crisv32_without_register_prefix)
869 (print_insn_crisv10_v32_with_register_prefix)
870 (print_insn_crisv10_v32_without_register_prefix)
871 (cris_parse_disassembler_options): New functions.
872 (bytes_to_skip, cris_spec_reg): Add enum cris_disass_family
873 parameter. All callers changed.
874 (get_opcode_entry): Call malloc, not xmalloc. Return NULL on
876 (cris_constraint) <case 'Y', 'U'>: New cases.
877 (bytes_to_skip): Handle 'Y' and 'N' as 's'. Skip size is 4 bytes
879 (print_with_operands) <case 'Y'>: New case.
880 (print_with_operands) <case 'T', 'A', '[', ']', 'd', 'n', 'u'>
881 <case 'N', 'Y', 'Q'>: New cases.
882 (print_insn_cris_generic): Emit "bcc ." for zero and CRISv32.
883 (print_insn_cris_with_register_prefix)
884 (print_insn_cris_without_register_prefix): Call
885 cris_parse_disassembler_options.
886 * cris-opc.c (cris_spec_regs): Mention that this table isn't used
887 for CRISv32 and the size of immediate operands. New v32-only
888 entries for bz, pid, srs, wz, exs, eda, dz, ebp, erp, nrp, ccs and
889 spc. Add v32-only 4-byte entries for p2, p3, p5 and p6. Change
890 ccr, ibr, irp to be v0..v10. Change bar, dccr to be v8..v10.
891 Change brp to be v3..v10.
892 (cris_support_regs): New vector.
893 (cris_opcodes): Update head comment. New format characters '[',
894 ']', space, 'A', 'd', 'N', 'n', 'Q', 'T', 'u', 'U', 'Y'.
895 Add new opcodes for v32 and adjust existing opcodes to accommodate
896 differences to earlier variants.
897 (cris_cond15s): New vector.
899 2004-11-04 Jan Beulich <jbeulich@novell.com>
901 * i386-dis.c (Eq, Edqw, indirEp, Gdq, I1): Define.
903 (Mp): Use f_mode rather than none at all.
904 (t_mode, dq_mode, dqw_mode, f_mode, const_1_mode): Define. t_mode
905 replaces what previously was x_mode; x_mode now means 128-bit SSE
907 (dis386): Make far jumps and calls have an 'l' prefix only in AT&T
908 mode. movmskpX's, pextrw's, and pmovmskb's first operands are Gdq.
909 pinsrw's second operand is Edqw.
910 (grps): 1-bit shifts' and rotates' second operands are I1. cmpxchg8b's
911 operand is Eq. movntq's and movntdq's first operands are EM. s[gi]dt,
912 fldenv, frstor, fsave, fstenv all should also have suffixes in Intel
913 mode when an operand size override is present or always suffixing.
914 More instructions will need to be added to this group.
915 (putop): Handle new macro chars 'C' (short/long suffix selector),
916 'I' (Intel mode override for following macro char), and 'J' (for
917 adding the 'l' prefix to far branches in AT&T mode). When an
918 alternative was specified in the template, honor macro character when
919 specified for Intel mode.
920 (OP_E): Handle new *_mode values. Correct pointer specifications for
921 memory operands. Consolidate output of index register.
922 (OP_G): Handle new *_mode values.
923 (OP_I): Handle const_1_mode.
924 (OP_ESreg, OP_DSreg): Generate pointer specifications. Indicate
925 respective opcode prefix bits have been consumed.
926 (OP_EM, OP_EX): Provide some default handling for generating pointer
929 2004-10-28 Tomer Levi <Tomer.Levi@nsc.com>
931 * crx-opc.c (REV_COP_INST): New macro, reverse operand order of
934 2004-10-27 Tomer Levi <Tomer.Levi@nsc.com>
936 * crx-dis.c (enum REG_ARG_TYPE): New, replacing COP_ARG_TYPE.
937 (getregliststring): Support HI/LO and user registers.
938 * crx-opc.c (crx_instruction): Update data structure according to the
939 rearrangement done in CRX opcode header file.
940 (crx_regtab): Likewise.
941 (crx_optab): Likewise.
942 (crx_instruction): Reorder load/stor instructions, remove unsupported
944 support new Co-Processor instruction 'cpi'.
946 2004-10-27 Nick Clifton <nickc@redhat.com>
948 * opcodes/iq2000-asm.c: Regenerate.
949 * opcodes/iq2000-desc.c: Regenerate.
950 * opcodes/iq2000-desc.h: Regenerate.
951 * opcodes/iq2000-dis.c: Regenerate.
952 * opcodes/iq2000-ibld.c: Regenerate.
953 * opcodes/iq2000-opc.c: Regenerate.
954 * opcodes/iq2000-opc.h: Regenerate.
956 2004-10-21 Tomer Levi <Tomer.Levi@nsc.com>
958 * crx-opc.c (crx_instruction): Replace i3, i4, i5 with us3,
959 us4, us5 (respectively).
960 Remove unsupported 'popa' instruction.
961 Reverse operands order in store co-processor instructions.
963 2004-10-15 Alan Modra <amodra@bigpond.net.au>
965 * Makefile.am: Run "make dep-am"
966 * Makefile.in: Regenerate.
968 2004-10-12 Bob Wilson <bob.wilson@acm.org>
970 * xtensa-dis.c: Use ISO C90 formatting.
972 2004-10-09 Alan Modra <amodra@bigpond.net.au>
974 * ppc-opc.c: Revert 2004-09-09 change.
976 2004-10-07 Bob Wilson <bob.wilson@acm.org>
978 * xtensa-dis.c (state_names): Delete.
979 (fetch_data): Use xtensa_isa_maxlength.
980 (print_xtensa_operand): Replace operand parameter with opcode/operand
981 pair. Remove print_sr_name parameter. Use new xtensa-isa.h functions.
982 (print_insn_xtensa): Use new xtensa-isa.h functions. Handle multislot
983 instruction bundles. Use xmalloc instead of malloc.
985 2004-10-07 David Gibson <david@gibson.dropbear.id.au>
987 * ppc-opc.c: Replace literal "0"s with NULLs in pointer
990 2004-10-07 Tomer Levi <Tomer.Levi@nsc.com>
992 * crx-opc.c (crx_instruction): Support Co-processor insns.
993 * crx-dis.c (COP_ARG_TYPE): New enum for CO-Processor arguments.
994 (getregliststring): Change function to use the above enum.
995 (print_arg): Handle CO-Processor insns.
996 (crx_cinvs): Add 'b' option to invalidate the branch-target
999 2004-10-06 Aldy Hernandez <aldyh@redhat.com>
1001 * ppc-opc.c (powerpc_opcodes): Add efscfd, efdabs, efdnabs,
1002 efdneg, efdadd, efdsub, efdmul, efddiv, efdcmpgt, efdcmplt,
1003 efdcmpeq, efdtstgt, efdtstlt, efdtsteq, efdcfsi, efdcfsid,
1004 efdcfui, efdcfuid, efdcfsf, efdcfuf, efdctsi, efdctsidz, efdctsiz,
1005 efdctui, efdctuidz, efdctuiz, efdctsf, efdctuf, efdctuf, efdcfs.
1007 2004-10-01 Bill Farmer <Bill@the-farmers.freeserve.co.uk>
1009 * pdp11-dis.c (print_insn_pdp11): Subtract the SOB's displacement
1012 2004-09-30 Paul Brook <paul@codesourcery.com>
1014 * arm-dis.c (print_insn_arm): Handle 'e' for SMI instruction.
1015 * arm-opc.h: Document %e. Add ARMv6ZK instructions.
1017 2004-09-17 H.J. Lu <hongjiu.lu@intel.com>
1019 * Makefile.am (AUTOMAKE_OPTIONS): Require 1.9.
1020 (CONFIG_STATUS_DEPENDENCIES): New.
1021 (Makefile): Removed.
1022 (config.status): Likewise.
1023 * Makefile.in: Regenerated.
1025 2004-09-17 Alan Modra <amodra@bigpond.net.au>
1027 * Makefile.am: Run "make dep-am".
1028 * Makefile.in: Regenerate.
1029 * aclocal.m4: Regenerate.
1030 * configure: Regenerate.
1031 * po/POTFILES.in: Regenerate.
1032 * po/opcodes.pot: Regenerate.
1034 2004-09-11 Andreas Schwab <schwab@suse.de>
1036 * configure: Rebuild.
1038 2004-09-09 Segher Boessenkool <segher@kernel.crashing.org>
1040 * ppc-opc.c (L): Make this field not optional.
1042 2004-09-03 Tomer Levi <Tomer.Levi@nsc.com>
1044 * opc-crx.c: Rename 'popma' to 'popa', remove 'pushma'.
1045 Fix parameter to 'm[t|f]csr' insns.
1047 2004-08-30 Nathanael Nerode <neroden@gcc.gnu.org>
1049 * configure.in: Autoupdate to autoconf 2.59.
1050 * aclocal.m4: Rebuild with aclocal 1.4p6.
1051 * configure: Rebuild with autoconf 2.59.
1052 * Makefile.in: Rebuild with automake 1.4p6 (picking up
1053 bfd changes for autoconf 2.59 on the way).
1054 * config.in: Rebuild with autoheader 2.59.
1056 2004-08-27 Richard Sandiford <rsandifo@redhat.com>
1058 * frv-desc.[ch], frv-opc.[ch]: Regenerated.
1060 2004-07-30 Michal Ludvig <mludvig@suse.cz>
1062 * i386-dis.c (GRPPADLCK): Renamed to GRPPADLCK1
1063 (GRPPADLCK2): New define.
1064 (twobyte_has_modrm): True for 0xA6.
1065 (grps): GRPPADLCK2 for opcode 0xA6.
1067 2004-07-29 Alexandre Oliva <aoliva@redhat.com>
1069 Introduce SH2a support.
1070 * sh-opc.h (arch_sh2a_base): Renumber.
1071 (arch_sh2a_nofpu_base): Remove.
1072 (arch_sh_base_mask): Adjust.
1073 (arch_opann_mask): New.
1074 (arch_sh2a, arch_sh2a_nofpu): Adjust.
1075 (arch_sh2a_up, arch_sh2a_nofpu_up): Likewise.
1076 (sh_table): Adjust whitespace.
1077 2004-02-24 Corinna Vinschen <vinschen@redhat.com>
1078 * sh-opc.h (arch_sh2a_nofpu_up): New. Use instead of arch_sh2a_up in
1079 instruction list throughout.
1080 (arch_sh2a_up): Redefine to include fpu instruction set. Use instead
1081 of arch_sh2a in instruction list throughout.
1082 (arch_sh2e_up): Accomodate above changes.
1083 (arch_sh2_up): Ditto.
1084 2004-02-20 Corinna Vinschen <vinschen@redhat.com>
1085 * sh-opc.h: Add arch_sh2a_nofpu to arch_sh2_up.
1086 2004-02-18 Corinna Vinschen <vinschen@redhat.com>
1087 * sh-dis.c (print_insn_sh): Add bfd_mach_sh2a_nofpu handling.
1088 * sh-opc.h (arch_sh2a_nofpu): New.
1089 (arch_sh2a_up): New, defines sh2a and sh2a_nofpu.
1090 (sh_table): Change all arch_sh2a to arch_sh2a_up unless FPU
1092 2004-01-20 DJ Delorie <dj@redhat.com>
1093 * sh-dis.c (print_insn_sh): SH2A does not have 'X' fp regs.
1094 2003-12-29 DJ Delorie <dj@redhat.com>
1095 * sh-opc.c (sh_nibble_type, sh_arg_type, arch_2a, arch_2e_up,
1096 sh_opcode_info, sh_table): Add sh2a support.
1097 (arch_op32): New, to tag 32-bit opcodes.
1098 * sh-dis.c (print_insn_sh): Support sh2a opcodes.
1099 2003-12-02 Michael Snyder <msnyder@redhat.com>
1100 * sh-opc.h (arch_sh2a): Add.
1101 * sh-dis.c (arch_sh2a): Handle.
1102 * sh-opc.h (arch_sh2_up): Fix up to include arch_sh2a.
1104 2004-07-27 Tomer Levi <Tomer.Levi@nsc.com>
1106 * crx-opc.c: Add popx,pushx insns. Indent code, fix comments.
1108 2004-07-22 Nick Clifton <nickc@redhat.com>
1111 * h8300-dis.c (bfd_h8_disassemble): Do not dump raw bytes for the
1112 insns - this is done by objdump itself.
1113 * h8500-dis.c (print_insn_h8500): Likewise.
1115 2004-07-21 Jan Beulich <jbeulich@novell.com>
1117 * i386-dis.c (OP_E): Show rip-relative addressing in 64-bit mode
1118 regardless of address size prefix in effect.
1119 (ptr_reg): Size or address registers does not depend on rex64, but
1120 on the presence of an address size override.
1121 (OP_MMX): Use rex.x only for xmm registers.
1122 (OP_EM): Use rex.z only for xmm registers.
1124 2004-07-20 Maciej W. Rozycki <macro@linux-mips.org>
1126 * mips-opc.c (mips_builtin_opcodes): Move coprocessor 2
1127 move/branch operations to the bottom so that VR5400 multimedia
1128 instructions take precedence in disassembly.
1130 2004-07-20 Maciej W. Rozycki <macro@linux-mips.org>
1132 * mips-opc.c (mips_builtin_opcodes): Remove the MIPS32
1133 ISA-specific "break" encoding.
1135 2004-07-13 Elvis Chiang <elvisfb@gmail.com>
1137 * arm-opc.h: Fix typo in comment.
1139 2004-07-11 Andreas Schwab <schwab@suse.de>
1141 * m68k-dis.c (m68k_valid_ea): Fix typos in last change.
1143 2004-07-09 Andreas Schwab <schwab@suse.de>
1145 * m68k-dis.c (m68k_valid_ea): Check validity of all codes.
1147 2004-07-07 Tomer Levi <Tomer.Levi@nsc.com>
1149 * Makefile.am (CFILES): Add crx-dis.c, crx-opc.c.
1150 (ALL_MACHINES): Add crx-dis.lo, crx-opc.lo.
1151 (crx-dis.lo): New target.
1152 (crx-opc.lo): Likewise.
1153 * Makefile.in: Regenerate.
1154 * configure.in: Handle bfd_crx_arch.
1155 * configure: Regenerate.
1156 * crx-dis.c: New file.
1157 * crx-opc.c: New file.
1158 * disassemble.c (ARCH_crx): Define.
1159 (disassembler): Handle ARCH_crx.
1161 2004-06-29 James E Wilson <wilson@specifixinc.com>
1163 * ia64-opc-a.c (ia64_opcodes_a): Delete mov immediate pseudo for adds.
1164 * ia64-asmtab.c: Regnerate.
1166 2004-06-28 Alan Modra <amodra@bigpond.net.au>
1168 * ppc-opc.c (insert_fxm): Handle mfocrf and mtocrf.
1169 (extract_fxm): Don't test dialect.
1170 (XFXFXM_MASK): Include the power4 bit.
1171 (XFXM): Add p4 param.
1172 (powerpc_opcodes): Add mfocrf and mtocrf. Adjust mtcr.
1174 2004-06-27 Alexandre Oliva <aoliva@redhat.com>
1176 2003-07-21 Richard Sandiford <rsandifo@redhat.com>
1177 * disassemble.c (disassembler): Handle bfd_mach_h8300sxn.
1179 2004-06-26 Alan Modra <amodra@bigpond.net.au>
1181 * ppc-opc.c (BH, XLBH_MASK): Define.
1182 (powerpc_opcodes): Allow BH field on bclr, bclrl, bcctr, bcctrl.
1184 2004-06-24 Alan Modra <amodra@bigpond.net.au>
1186 * i386-dis.c (x_mode): Comment.
1187 (two_source_ops): File scope.
1188 (float_mem): Correct fisttpll and fistpll.
1189 (float_mem_mode): New table.
1191 (OP_E): Correct intel mode PTR output.
1192 (ptr_reg): Use open_char and close_char.
1193 (PNI_Fixup): Handle possible suffix on sidt. Use op1out etc. for
1194 operands. Set two_source_ops.
1196 2004-06-15 Alan Modra <amodra@bigpond.net.au>
1198 * arc-ext.c (build_ARC_extmap): Use bfd_get_section_size
1199 instead of _raw_size.
1201 2004-06-08 Jakub Jelinek <jakub@redhat.com>
1203 * ia64-gen.c (in_iclass): Handle more postinc st
1205 * ia64-asmtab.c: Rebuilt.
1207 2004-06-01 Martin Schwidefsky <schwidefsky@de.ibm.com>
1209 * s390-opc.txt: Correct architecture mask for some opcodes.
1210 lrv, lrvh, strv, ml, dl, alc, slb rll and mvclu are available
1211 in the esa mode as well.
1213 2004-05-28 Andrew Stubbs <andrew.stubbs@superh.com>
1215 * sh-dis.c (target_arch): Make unsigned.
1216 (print_insn_sh): Replace (most of) switch with a call to
1217 sh_get_arch_from_bfd_mach(). Also use new architecture flags system.
1218 * sh-opc.h: Redefine architecture flags values.
1219 Add sh3-nommu architecture.
1220 Reorganise <arch>_up macros so they make more visual sense.
1221 (SH_MERGE_ARCH_SET): Define new macro.
1222 (SH_VALID_BASE_ARCH_SET): Likewise.
1223 (SH_VALID_MMU_ARCH_SET): Likewise.
1224 (SH_VALID_CO_ARCH_SET): Likewise.
1225 (SH_VALID_ARCH_SET): Likewise.
1226 (SH_MERGE_ARCH_SET_VALID): Likewise.
1227 (SH_ARCH_SET_HAS_FPU): Likewise.
1228 (SH_ARCH_SET_HAS_DSP): Likewise.
1229 (SH_ARCH_UNKNOWN_ARCH): Likewise.
1230 (sh_get_arch_from_bfd_mach): Add prototype.
1231 (sh_get_arch_up_from_bfd_mach): Likewise.
1232 (sh_get_bfd_mach_from_arch_set): Likewise.
1233 (sh_merge_bfd_arc): Likewise.
1235 2004-05-24 Peter Barada <peter@the-baradas.com>
1237 * m68k-dis.c(print_insn_m68k): Strip body of diassembly out
1238 into new match_insn_m68k function. Loop over canidate
1239 matches and select first that completely matches.
1240 * m68k-dis.c(print_insn_arg): Fix 'g' case to only extract 1 bit.
1241 * m68k-dis.c(print_insn_arg): Call new function m68k_valid_ea
1242 to verify addressing for MAC/EMAC.
1243 * m68k-dis.c(print_insn_arg): Use reg_half_names for MAC/EMAC
1244 reigster halves since 'fpu' and 'spl' look misleading.
1245 * m68k-dis.c(fetch_arg): Fix 'G', 'H', 'I', 'f', 'M', 'N' cases.
1246 * m68k-opc.c: Rearragne mac/emac cases to use longest for
1247 first, tighten up match masks.
1248 * m68k-opc.c: Add 'size' field to struct m68k_opcode. Produce
1249 'size' from special case code in print_insn_m68k to
1250 determine decode size of insns.
1252 2004-05-19 Alan Modra <amodra@bigpond.net.au>
1254 * ppc-opc.c (insert_fxm): Enable two operand mfcr when -many as
1255 well as when -mpower4.
1257 2004-05-13 Nick Clifton <nickc@redhat.com>
1259 * po/fr.po: Updated French translation.
1261 2004-05-05 Peter Barada <peter@the-baradas.com>
1263 * m68k-dis.c(print_insn_m68k): Add new chips, use core
1264 variants in arch_mask. Only set m68881/68851 for 68k chips.
1265 * m68k-op.c: Switch from ColdFire chips to core variants.
1267 2004-05-05 Alan Modra <amodra@bigpond.net.au>
1270 * ppc-opc.c (PPCVEC): Remove PPC_OPCODE_PPC.
1272 2004-04-29 Ben Elliston <bje@au.ibm.com>
1274 * ppc-opc.c (XCMPL): Renmame to XOPL. Update users.
1275 (powerpc_opcodes): Add "dbczl" instruction for PPC970.
1277 2004-04-22 Kaz Kojima <kkojima@rr.iij4u.or.jp>
1279 * sh-dis.c (print_insn_sh): Print the value in constant pool
1280 as a symbol if it looks like a symbol.
1282 2004-04-22 Peter Barada <peter@the-baradas.com>
1284 * m68k-dis.c(print_insn_m68k): Set mfcmac/mcfemac on
1285 appropriate ColdFire architectures.
1286 (print_insn_m68k): Handle EMAC, MAC/EMAC scalefactor, and MAC/EMAC
1288 Add EMAC instructions, fix MAC instructions. Remove
1289 macmw/macml/msacmw/msacml instructions since mask addressing now
1292 2004-04-20 Jakub Jelinek <jakub@redhat.com>
1294 * sparc-opc.c (fmoviccx, fmovfccx, fmovccx): Define.
1295 (fmovicc, fmovfcc, fmovcc): Remove fpsize argument, change opcode to
1296 suffix. Use fmov*x macros, create all 3 fpsize variants in one
1297 macro. Adjust all users.
1299 2004-04-15 Anil Paranjpe <anilp1@kpitcummins.com>
1301 * h8300-dis.c (bfd_h8_disassemble) : Treat "adds" & "subs"
1304 2004-03-30 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
1306 * m32r-asm.c: Regenerate.
1308 2004-03-29 Stan Shebs <shebs@apple.com>
1310 * mpw-config.in, mpw-make.sed: Remove MPW support files, no longer
1313 2004-03-19 Alan Modra <amodra@bigpond.net.au>
1315 * aclocal.m4: Regenerate.
1316 * config.in: Regenerate.
1317 * configure: Regenerate.
1318 * po/POTFILES.in: Regenerate.
1319 * po/opcodes.pot: Regenerate.
1321 2004-03-16 Alan Modra <amodra@bigpond.net.au>
1323 * ppc-dis.c (print_insn_powerpc): Don't print tabs. Handle
1325 * ppc-opc.c (RA0): Define.
1326 (RAQ, RAL, RAM, RAS, RSQ, RTQ, RSO): Use PPC_OPERAND_GPR_0.
1327 (RAOPT): Rename from RAO. Update all uses.
1328 (powerpc_opcodes): Use RA0 as appropriate.
1330 2004-03-15 Aldy Hernandez <aldyh@redhat.com>
1332 * ppc-opc.c (powerpc_opcodes): Add BOOKE versions of mfsprg.
1334 2004-03-15 Alan Modra <amodra@bigpond.net.au>
1336 * sparc-dis.c (print_insn_sparc): Update getword prototype.
1338 2004-03-12 Michal Ludvig <mludvig@suse.cz>
1340 * i386-dis.c (GRPPLOCK): Delete.
1341 (grps): Delete GRPPLOCK entry.
1343 2004-03-12 Alan Modra <amodra@bigpond.net.au>
1345 * i386-dis.c (OP_M, OP_0f0e, OP_0fae, NOP_Fixup): New functions.
1347 (None, PADLOCK_SPECIAL, PADLOCK_0): Delete.
1348 (GRPPADLCK): Define.
1349 (dis386): Use NOP_Fixup on "nop".
1350 (dis386_twobyte): Use GRPPADLCK on opcode 0xa7.
1351 (twobyte_has_modrm): Set for 0xa7.
1352 (padlock_table): Delete. Move to..
1353 (grps): ..here, using OP_0f07. Use OP_Ofae on lfence, mfence
1355 (print_insn): Revert PADLOCK_SPECIAL code.
1356 (OP_E): Delete sfence, lfence, mfence checks.
1358 2004-03-12 Jakub Jelinek <jakub@redhat.com>
1360 * i386-dis.c (grps): Use INVLPG_Fixup instead of OP_E for invlpg.
1361 (INVLPG_Fixup): New function.
1362 (PNI_Fixup): Remove ATTRIBUTE_UNUSED from sizeflag.
1364 2004-03-12 Michal Ludvig <mludvig@suse.cz>
1366 * i386-dis.c (PADLOCK_SPECIAL, PADLOCK_0): New defines.
1367 (dis386_twobyte): Opcode 0xa7 is PADLOCK_0.
1368 (padlock_table): New struct with PadLock instructions.
1369 (print_insn): Handle PADLOCK_SPECIAL.
1371 2004-03-12 Alan Modra <amodra@bigpond.net.au>
1373 * i386-dis.c (grps): Use clflush by default for 0x0fae/7.
1374 (OP_E): Twiddle clflush to sfence here.
1376 2004-03-08 Nick Clifton <nickc@redhat.com>
1378 * po/de.po: Updated German translation.
1380 2003-03-03 Andrew Stubbs <andrew.stubbs@superh.com>
1382 * sh-dis.c (print_insn_sh): Don't disassemble fp instructions in
1383 nofpu mode. Add BFD type bfd_mach_sh4_nommu_nofpu.
1384 * sh-opc.h: Add sh4_nommu_nofpu architecture and adjust instructions
1387 2004-03-01 Richard Sandiford <rsandifo@redhat.com>
1389 * frv-asm.c: Regenerate.
1390 * frv-desc.c: Regenerate.
1391 * frv-desc.h: Regenerate.
1392 * frv-dis.c: Regenerate.
1393 * frv-ibld.c: Regenerate.
1394 * frv-opc.c: Regenerate.
1395 * frv-opc.h: Regenerate.
1397 2004-03-01 Richard Sandiford <rsandifo@redhat.com>
1399 * frv-desc.c, frv-opc.c: Regenerate.
1401 2004-03-01 Richard Sandiford <rsandifo@redhat.com>
1403 * frv-desc.c, frv-opc.c, frv-opc.h: Regenerate.
1405 2004-02-26 Andrew Stubbs <andrew.stubbs@superh.com>
1407 * sh-opc.h: Move fsca and fsrra instructions from sh4a to sh4.
1408 Also correct mistake in the comment.
1410 2004-02-26 Andrew Stubbs <andrew.stubbs@superh.com>
1412 * sh-dis.c (print_insn_sh): Add REG_N_D nibble type to
1413 ensure that double registers have even numbers.
1414 Add REG_N_B01 for nn01 (binary 01) nibble to ensure
1415 that reserved instruction 0xfffd does not decode the same
1417 * sh-opc.h: Add REG_N_D nibble type and use it whereever
1418 REG_N refers to a double register.
1419 Add REG_N_B01 nibble type and use it instead of REG_NM
1421 Adjust the bit patterns in a few comments.
1423 2004-02-25 Aldy Hernandez <aldyh@redhat.com>
1425 * ppc-opc.c (powerpc_opcodes): Change mask for dcbt and dcbtst.
1427 2004-02-20 Aldy Hernandez <aldyh@redhat.com>
1429 * ppc-opc.c (powerpc_opcodes): Move mfmcsrr0 before mfdc_dat.
1431 2004-02-20 Aldy Hernandez <aldyh@redhat.com>
1433 * ppc-opc.c (powerpc_opcodes): Add m*ivor35.
1435 2004-02-20 Aldy Hernandez <aldyh@redhat.com>
1437 * ppc-opc.c (powerpc_opcodes): Add mfivor32, mfivor33, mfivor34,
1438 mtivor32, mtivor33, mtivor34.
1440 2004-02-19 Aldy Hernandez <aldyh@redhat.com>
1442 * ppc-opc.c (powerpc_opcodes): Add mfmcar.
1444 2004-02-10 Petko Manolov <petkan@nucleusys.com>
1446 * arm-opc.h Maverick accumulator register opcode fixes.
1448 2004-02-13 Ben Elliston <bje@wasabisystems.com>
1450 * m32r-dis.c: Regenerate.
1452 2004-01-27 Michael Snyder <msnyder@redhat.com>
1454 * sh-opc.h (sh_table): "fsrra", not "fssra".
1456 2004-01-23 Andrew Over <andrew.over@cs.anu.edu.au>
1458 * sparc-opc.c (fdtox, fstox, fqtox, fxtod, fxtos, fxtoq): Tighten
1461 2004-01-19 Andrew Over <andrew.over@cs.anu.edu.au>
1463 * sparc-opc.c (sparc_opcodes) <f[dsq]tox, fxto[dsq]>: Fix args.
1465 2004-01-19 Alan Modra <amodra@bigpond.net.au>
1467 * i386-dis.c (OP_E): Print scale factor on intel mode sib when not
1468 1. Don't print scale factor on AT&T mode when index missing.
1470 2004-01-16 Alexandre Oliva <aoliva@redhat.com>
1472 * m10300-opc.c (mov): 8- and 24-bit immediates are zero-extended
1473 when loaded into XR registers.
1475 2004-01-14 Richard Sandiford <rsandifo@redhat.com>
1477 * frv-desc.h: Regenerate.
1478 * frv-desc.c: Regenerate.
1479 * frv-opc.c: Regenerate.
1481 2004-01-13 Michael Snyder <msnyder@redhat.com>
1483 * sh-dis.c (print_insn_sh): Allocate 4 bytes for insn.
1485 2004-01-09 Paul Brook <paul@codesourcery.com>
1487 * arm-opc.h (arm_opcodes): Move generic mcrr after known
1490 2004-01-07 Daniel Jacobowitz <drow@mvista.com>
1492 * Makefile.am (libopcodes_la_DEPENDENCIES)
1493 (libopcodes_la_LIBADD): Revert 2003-05-17 change. Add explanatory
1494 comment about the problem.
1495 * Makefile.in: Regenerate.
1497 2004-01-06 Alexandre Oliva <aoliva@redhat.com>
1499 2003-12-19 Alexandre Oliva <aoliva@redhat.com>
1500 * frv-asm.c (parse_ulo16, parse_uhi16, parse_d12): Fix some
1501 cut&paste errors in shifting/truncating numerical operands.
1502 2003-08-04 Alexandre Oliva <aoliva@redhat.com>
1503 * frv-asm.c (parse_ulo16): Parse gotofflo and gotofffuncdesclo.
1504 (parse_uslo16): Likewise.
1505 (parse_uhi16): Parse gotoffhi and gotofffuncdeschi.
1506 (parse_d12): Parse gotoff12 and gotofffuncdesc12.
1507 (parse_s12): Likewise.
1508 2003-08-04 Alexandre Oliva <aoliva@redhat.com>
1509 * frv-asm.c (parse_ulo16): Parse gotlo and gotfuncdesclo.
1510 (parse_uslo16): Likewise.
1511 (parse_uhi16): Parse gothi and gotfuncdeschi.
1512 (parse_d12): Parse got12 and gotfuncdesc12.
1513 (parse_s12): Likewise.
1515 2004-01-02 Albert Bartoszko <albar@nt.kegel.com.pl>
1517 * msp430-dis.c (msp430_doubleoperand): Check for an 'add'
1518 instruction which looks similar to an 'rla' instruction.
1520 For older changes see ChangeLog-0203
1526 version-control: never