1 2008-02-13 Jan Beulich <jbeulich@novell.com>
3 * i386-opc.h (RegFlat): New.
4 * i386-reg.tbl (flat): Add.
5 * i386-tbl.h: Re-generate.
7 2008-02-13 Jan Beulich <jbeulich@novell.com>
9 * i386-dis.c (a_mode): New.
10 (cond_jump_mode): Adjust.
11 (Ma): Change to a_mode.
12 (intel_operand_size): Handle a_mode.
13 * i386-opc.tbl: Allow Dword and Qword for bound.
14 * i386-tbl.h: Re-generate.
16 2008-02-13 Jan Beulich <jbeulich@novell.com>
18 * i386-gen.c (process_i386_registers): Process new fields.
19 * i386-opc.h (reg_entry): Shrink reg_flags and reg_num to
20 unsigned char. Add dw2_regnum and Dw2Inval.
21 * i386-reg.tbl: Provide initializers for dw2_regnum. Add pseudo
23 * i386-tbl.h: Re-generate.
25 2008-02-11 H.J. Lu <hongjiu.lu@intel.com>
27 * i386-gen.c (cpu_flag_init): Add CPU_XSAVE_FLAGS.
28 * i386-init.h: Updated.
30 2008-02-11 H.J. Lu <hongjiu.lu@intel.com>
32 * i386-gen.c (cpu_flags): Add CpuXsave.
34 * i386-opc.h (CpuXsave): New.
36 (i386_cpu_flags): Add cpuxsave.
38 * i386-dis.c (MOD_0FAE_REG_4): New.
39 (RM_0F01_REG_2): Likewise.
40 (MOD_0FAE_REG_5): Updated.
41 (RM_0F01_REG_3): Likewise.
42 (reg_table): Use MOD_0FAE_REG_4.
43 (mod_table): Use RM_0F01_REG_2. Add MOD_0FAE_REG_4. Updated
45 (rm_table): Add RM_0F01_REG_2.
47 * i386-opc.tbl: Add xsave, xrstor, xgetbv and xsetbv.
48 * i386-init.h: Regenerated.
49 * i386-tbl.h: Likewise.
51 2008-02-11 Jan Beulich <jbeulich@novell.com>
53 * i386-opc.tbl: Remove Disp32S from CpuNo64 opcodes. Remove
54 Disp16 from Cpu64 non-jump opcodes (including loop and j?cxz).
55 * i386-tbl.h: Re-generate.
57 2008-02-04 H.J. Lu <hongjiu.lu@intel.com>
60 * configure: Regenerated.
62 2008-02-04 Adam Nemet <anemet@caviumnetworks.com>
64 * mips-dis.c: Update copyright.
65 (mips_arch_choices): Add Octeon.
66 * mips-opc.c: Update copyright.
68 (mips_builtin_opcodes): Add Octeon instruction synciobdma.
70 2008-01-29 Alan Modra <amodra@bigpond.net.au>
72 * ppc-opc.c: Support optional L form mtmsr.
74 2008-01-24 H.J. Lu <hongjiu.lu@intel.com>
76 * i386-dis.c (OP_E_extended): Handle r12 like rsp.
78 2008-01-23 H.J. Lu <hongjiu.lu@intel.com>
80 * i386-gen.c (cpu_flag_init): Add CpuLM to CPU_GENERIC64_FLAGS.
81 * i386-init.h: Regenerated.
83 2008-01-23 Tristan Gingold <gingold@adacore.com>
85 * ia64-dis.c (print_insn_ia64): Display symbolic name of ar.fcr,
86 ar.eflag, ar.csd, ar.ssd, ar.cflg, ar.fsr, ar.fir and ar.fdr.
88 2008-01-22 H.J. Lu <hongjiu.lu@intel.com>
90 * i386-gen.c (cpu_flag_init): Remove CpuMMX2.
91 (cpu_flags): Likewise.
93 * i386-opc.h (CpuMMX2): Removed.
96 * i386-opc.tbl: Replace CpuMMX2 with CpuSSE|Cpu3dnowA.
97 * i386-init.h: Regenerated.
98 * i386-tbl.h: Likewise.
100 2008-01-22 H.J. Lu <hongjiu.lu@intel.com>
102 * i386-gen.c (cpu_flag_init): Add CPU_VMX_FLAGS and
104 * i386-init.h: Regenerated.
106 2008-01-15 H.J. Lu <hongjiu.lu@intel.com>
108 * i386-opc.tbl: Use Qword on movddup.
109 * i386-tbl.h: Regenerated.
111 2008-01-15 H.J. Lu <hongjiu.lu@intel.com>
113 * i386-opc.tbl: Put back 16bit movsx/movzx for AT&T syntax.
114 * i386-tbl.h: Regenerated.
116 2008-01-15 H.J. Lu <hongjiu.lu@intel.com>
118 * i386-dis.c (Mx): New.
119 (PREFIX_0FC3): Likewise.
120 (PREFIX_0FC7_REG_6): Updated.
121 (dis386_twobyte): Use PREFIX_0FC3.
122 (prefix_table): Add PREFIX_0FC3. Use Mq on movntq and movntsd.
123 Use Mx on movntps, movntpd, movntdq and movntdqa. Use Md on
126 2008-01-14 H.J. Lu <hongjiu.lu@intel.com>
128 * i386-gen.c (opcode_modifiers): Add IntelSyntax.
129 (operand_types): Add Mem.
131 * i386-opc.h (IntelSyntax): New.
132 * i386-opc.h (Mem): New.
134 (Opcode_Modifier_Max): Updated.
135 (i386_opcode_modifier): Add intelsyntax.
136 (i386_operand_type): Add mem.
138 * i386-opc.tbl: Remove Reg16 from movnti. Add sizes to more
141 * i386-reg.tbl: Add size for accumulator.
143 * i386-init.h: Regenerated.
144 * i386-tbl.h: Likewise.
146 2008-01-13 H.J. Lu <hongjiu.lu@intel.com>
148 * i386-opc.h (Byte): Fix a typo.
150 2008-01-12 H.J. Lu <hongjiu.lu@intel.com>
153 * i386-gen.c (operand_type_init): Add Dword to
154 OPERAND_TYPE_ACC32. Add Qword to OPERAND_TYPE_ACC64.
155 (opcode_modifiers): Remove CheckSize, Byte, Word, Dword,
157 (operand_types): Add Byte, Word, Dword, Fword, Qword, Tbyte,
158 Xmmword, Unspecified and Anysize.
159 (set_bitfield): Make Mmword an alias of Qword. Make Oword
162 * i386-opc.h (CheckSize): Removed.
170 (i386_opcode_modifier): Remove checksize, byte, word, dword,
174 (Unspecified): Likewise.
176 (i386_operand_type): Add byte, word, dword, fword, qword,
177 tbyte xmmword, unspecified and anysize.
179 * i386-opc.tbl: Updated to use Byte, Word, Dword, Fword, Qword,
180 Tbyte, Xmmword, Unspecified and Anysize.
182 * i386-reg.tbl: Add size for accumulator.
184 * i386-init.h: Regenerated.
185 * i386-tbl.h: Likewise.
187 2008-01-10 H.J. Lu <hongjiu.lu@intel.com>
189 * i386-dis.c (REG_0F0E): Renamed to REG_0F0D.
191 (reg_table): Updated.
192 (dis386_twobyte): Updated. Use "nopQ" on 0x19 to 0x1e.
193 (twobyte_has_modrm): Set 1 for 0x19 to 0x1e.
195 2008-01-08 H.J. Lu <hongjiu.lu@intel.com>
197 * i386-gen.c (set_bitfield): Use fail () on error.
199 2008-01-08 H.J. Lu <hongjiu.lu@intel.com>
201 * i386-gen.c (lineno): New.
202 (filename): Likewise.
203 (set_bitfield): Report filename and line numer on error.
204 (process_i386_opcodes): Set filename and update lineno.
205 (process_i386_registers): Likewise.
207 2008-01-05 H.J. Lu <hongjiu.lu@intel.com>
209 * i386-gen.c (opcode_modifiers): Rename IntelMnemonic to
212 * i386-opc.h (IntelMnemonic): Renamed to ..
214 (Opcode_Modifier_Max): Updated.
215 (i386_opcode_modifier): Remove intelmnemonic. Add attsyntax
218 * i386-opc.tbl: Remove IntelMnemonic and update with ATTSyntax
219 on fsub, fubp, fsubr, fsubrp, div, fdivp, fdivr and fdivrp.
220 * i386-tbl.h: Regenerated.
222 2008-01-04 H.J. Lu <hongjiu.lu@intel.com>
224 * i386-gen.c: Update copyright to 2008.
225 * i386-opc.h: Likewise.
226 * i386-opc.tbl: Likewise.
228 * i386-init.h: Regenerated.
229 * i386-tbl.h: Likewise.
231 2008-01-04 H.J. Lu <hongjiu.lu@intel.com>
233 * i386-opc.tbl: Add NoRex64 to extractps, movmskpd, movmskps,
234 pextrb, pextrw, pinsrb, pinsrw and pmovmskb.
235 * i386-tbl.h: Regenerated.
237 2008-01-03 H.J. Lu <hongjiu.lu@intel.com>
239 * i386-gen.c (cpu_flag_init): Remove CpuSSE4_1_Or_5 and
241 (cpu_flags): Likewise.
243 * i386-opc.h (CpuSSE4_1_Or_5): Removed.
244 (CpuSSE4_2_Or_ABM): Likewise.
246 (i386_cpu_flags): Remove cpusse4_1_or_5 and cpusse4_2_or_abm.
248 * i386-opc.tbl: Replace CpuSSE4_1_Or_5, CpuSSE4_2_Or_ABM and
249 Cpu686|CpuPadLock with CpuSSE4_1|CpuSSE5, CpuABM|CpuSSE4_2
250 and CpuPadLock, respectively.
251 * i386-init.h: Regenerated.
252 * i386-tbl.h: Likewise.
254 2008-01-03 H.J. Lu <hongjiu.lu@intel.com>
256 * i386-gen.c (opcode_modifiers): Remove No_xSuf.
258 * i386-opc.h (No_xSuf): Removed.
259 (CheckSize): Updated.
261 * i386-tbl.h: Regenerated.
263 2008-01-02 H.J. Lu <hongjiu.lu@intel.com>
265 * i386-gen.c (cpu_flag_init): Add CpuSSE4_2_Or_ABM to
266 CPU_AMDFAM10_FLAGS, CPU_SSE4_2_FLAGS, CpuABM and
268 (cpu_flags): Add CpuSSE4_2_Or_ABM.
270 * i386-opc.h (CpuSSE4_2_Or_ABM): New.
272 (i386_cpu_flags): Add cpusse4_2_or_abm.
274 * i386-opc.tbl: Use CpuSSE4_2_Or_ABM instead of
275 CpuABM|CpuSSE4_2 on popcnt.
276 * i386-init.h: Regenerated.
277 * i386-tbl.h: Likewise.
279 2008-01-02 H.J. Lu <hongjiu.lu@intel.com>
281 * i386-opc.h: Update comments.
283 2008-01-02 H.J. Lu <hongjiu.lu@intel.com>
285 * i386-gen.c (opcode_modifiers): Use Qword instead of QWord.
286 * i386-opc.h: Likewise.
287 * i386-opc.tbl: Likewise.
289 2008-01-02 H.J. Lu <hongjiu.lu@intel.com>
292 * i386-gen.c (opcode_modifiers): Add No_xSuf, CheckSize,
293 Byte, Word, Dword, QWord and Xmmword.
295 * i386-opc.h (No_xSuf): New.
296 (CheckSize): Likewise.
303 (i386_opcode_modifier): Add No_xSuf, CheckSize, Byte, Word,
304 Dword, QWord and Xmmword.
306 * i386-opc.tbl: Add CheckSize|QWord to movq if IgnoreSize is
308 * i386-tbl.h: Regenerated.
310 2008-01-02 Mark Kettenis <kettenis@gnu.org>
312 * m88k-dis.c (instructions): Fix fcvt.* instructions.
315 For older changes see ChangeLog-2007
321 version-control: never