1 2016-06-13 Graham Markall <graham.markall@embecosm.com>
3 * arc-nps400-tbl.h: Add ldbit instruction.
4 * arc-opc.c: Add flag classes required for ldbit.
6 2016-06-13 Graham Markall <graham.markall@embecosm.com>
8 * arc-nps400-tbl.h: Add hash, hash.p[0-3], tr, utf8, e4by, and addf
9 * arc-opc.c: Add flag classes, insert/extract functions, and operands to
10 support the above instructions.
12 2016-06-13 Graham Markall <graham.markall@embecosm.com>
14 * arc-nps400-tbl.h: Add calcbsd, calcbxd, calckey, calcxkey, mxb,
15 imxb, addl, subl, andl, orl, xorl, andab, orab, lbdsize, bdlen, csms,
16 csma, cbba, zncv, and hofs.
17 * arc-opc.c: Add flag classes, insert/extract functions, and operands to
18 support the above instructions.
20 2016-06-06 Graham Markall <graham.markall@embecosm.com>
22 * arc-nps400-tbl.h: Add andab and orab instructions.
24 2016-06-06 Graham Markall <graham.markall@embecosm.com>
26 * arc-nps400-tbl.h: Add addl-like instructions.
28 2016-06-06 Graham Markall <graham.markall@embecosm.com>
30 * arc-nps400-tbl.h: Add mxb and imxb instructions.
32 2016-06-06 Graham Markall <graham.markall@embecosm.com>
34 * arc-nps400-tbl.h: Add calcbsd, calcbxd, calckey and calcxkey
37 2016-06-10 Andreas Krebbel <krebbel@linux.vnet.ibm.com>
39 * s390-dis.c (option_use_insn_len_bits_p): New file scope
41 (init_disasm): Handle new command line option "insnlength".
42 (print_s390_disassembler_options): Mention new option in help
44 (print_insn_s390): Use the encoded insn length when dumping
47 2016-06-03 Pitchumani Sivanupandi <pitchumani.s@atmel.com>
49 * avr-dis.c (avr_operand): Add default data address space origin (0x800000)
50 to the address and set as symbol address for LDS/ STS immediate operands.
52 2016-06-07 Alan Modra <amodra@gmail.com>
54 * ppc-dis.c (ppc_opts): Delete extraneous parentheses. Default
55 cpu for "vle" to e500.
56 * ppc-opc.c (ALLOW8_SPRG): Remove PPC_OPCODE_VLE.
57 (NO371, PPCSPE, PPCISEL, PPCEFS, MULHW, DCBT_EO): Likewise.
58 (PPCNONE): Delete, substitute throughout.
59 (powerpc_opcodes): Remove PPCVLE from "flags". Add to "deprecated"
60 except for major opcode 4 and 31.
61 (vle_opcodes <se_rfmci>): Add PPCRFMCI to flags.
63 2016-06-07 Matthew Wahab <matthew.wahab@arm.com>
65 * arm-dis.c (arm_opcodes): Replace ARM_EXT_V8_2A with
66 ARM_EXT_RAS in relevant entries.
68 2016-06-03 Peter Bergner <bergner@vnet.ibm.com>
71 * ppc-opc.c (powerpc_opcodes <lbarx, lharx, stbcx., sthcx.>): Enable
74 2016-06-03 H.J. Lu <hongjiu.lu@intel.com>
77 * i386-dis.c (indirEv): Replace stack_v_mode with indir_v_mode.
80 (reg_table): Replace "{T|}" with "{&|}" on call and jmp.
82 (intel_operand_size): Handle indir_v_mode.
83 (OP_E_register): Likewise.
84 * i386-opc.tbl: Mark 64-bit indirect call/jmp as AMD64. Add
85 64-bit indirect call/jmp for AMD64.
86 * i386-tbl.h: Regenerated
88 2016-06-02 Andrew Burgess <andrew.burgess@embecosm.com>
90 * arc-dis.c (struct arc_operand_iterator): New structure.
91 (find_format_from_table): All the old content from find_format,
92 with some minor adjustments, and parameter renaming.
93 (find_format_long_instructions): New function.
94 (find_format): Rewritten.
95 (arc_insn_length): Add LSB parameter.
96 (extract_operand_value): New function.
97 (operand_iterator_next): New function.
98 (print_insn_arc): Use new functions to find opcode, and iterator
100 * arc-opc.c (insert_nps_3bit_dst_short): New function.
101 (extract_nps_3bit_dst_short): New function.
102 (insert_nps_3bit_src2_short): New function.
103 (extract_nps_3bit_src2_short): New function.
104 (insert_nps_bitop1_size): New function.
105 (extract_nps_bitop1_size): New function.
106 (insert_nps_bitop2_size): New function.
107 (extract_nps_bitop2_size): New function.
108 (insert_nps_bitop_mod4_msb): New function.
109 (extract_nps_bitop_mod4_msb): New function.
110 (insert_nps_bitop_mod4_lsb): New function.
111 (extract_nps_bitop_mod4_lsb): New function.
112 (insert_nps_bitop_dst_pos3_pos4): New function.
113 (extract_nps_bitop_dst_pos3_pos4): New function.
114 (insert_nps_bitop_ins_ext): New function.
115 (extract_nps_bitop_ins_ext): New function.
116 (arc_operands): Add new operands.
117 (arc_long_opcodes): New global array.
118 (arc_num_long_opcodes): New global.
119 * arc-nps400-tbl.h: Add comments referencing arc_long_opcodes.
121 2016-06-01 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
123 * nds32-asm.h: Add extern "C".
124 * sh-opc.h: Likewise.
126 2016-06-01 Graham Markall <graham.markall@embecosm.com>
128 * arc-nps400-tbl.h: Add operands a,b,u6, 0,b,u6, and
129 0,b,limm to the rflt instruction.
131 2016-05-31 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
133 * sh-opc.h (ARCH_SH_HAS_DSP): Make the shifted value an unsigned
136 2016-05-29 H.J. Lu <hongjiu.lu@intel.com>
139 * i386-gen.c (cpu_flag_init): Add CPU_ANY_AVX512F_FLAGS,
140 CPU_ANY_AVX512CD_FLAGS, CPU_ANY_AVX512ER_FLAGS,
141 CPU_ANY_AVX512PF_FLAGS, CPU_ANY_AVX512DQ_FLAGS,
142 CPU_ANY_AVX512BW_FLAGS, CPU_ANY_AVX512VL_FLAGS,
143 CPU_ANY_AVX512IFMA_FLAGS and CPU_ANY_AVX512VBMI_FLAGS.
144 * i386-init.h: Regenerated.
146 2016-05-27 H.J. Lu <hongjiu.lu@intel.com>
149 * i386-gen.c (cpu_flag_init): Update CPU_XXX_FLAGS. Remove
150 CpuMMX from CPU_SSE_FLAGS. Remove AVX and AVX512 bits from
151 CPU_ANY_SSE_FLAGS. Remove AVX512 bits from CPU_ANY_AVX_FLAGS.
152 Add CPU_XSAVE_FLAGS to CPU_XSAVEOPT_FLAGS, CPU_XSAVE_FLAGS and
153 CpuXSAVEC. Add CPU_AVX_FLAGS to CpuF16C. Remove CpuMMX from
154 CPU_AVX512F_FLAGS, CPU_AVX512CD_FLAGS, CPU_AVX512ER_FLAGS,
155 CPU_AVX512PF_FLAGS, CPU_AVX512DQ_FLAGS and CPU_AVX512BW_FLAGS.
156 Add CPU_SSE2_FLAGS to CPU_SHA_FLAGS. Add CPU_ANY_287_FLAGS,
157 CPU_ANY_387_FLAGS, CPU_ANY_687_FLAGS, CPU_ANY_SSE2_FLAGS,
158 CPU_ANY_SSE3_FLAGS, CPU_ANY_SSSE3_FLAGS, CPU_ANY_SSE4_1_FLAGS,
159 CPU_ANY_SSE4_2_FLAGS and CPU_ANY_AVX2_FLAGS. Enable CpuRegMMX
160 for MMX. Enable CpuRegXMM for SSE, AVX and AVX512. Enable
161 CpuRegYMM for AVX and AVX512VL, Enable CpuRegZMM and
162 CpuRegMask for AVX512.
163 (cpu_flags): Add CpuRegMMX, CpuRegXMM, CpuRegYMM, CpuRegZMM
165 (set_bitfield_from_cpu_flag_init): New function.
166 (set_bitfield): Remove const on f. Call
167 set_bitfield_from_cpu_flag_init to handle CPU_XXX_FLAGS.
168 * i386-opc.h (CpuRegMMX): New.
169 (CpuRegXMM): Likewise.
170 (CpuRegYMM): Likewise.
171 (CpuRegZMM): Likewise.
172 (CpuRegMask): Likewise.
173 (i386_cpu_flags): Add cpuregmmx, cpuregxmm, cpuregymm, cpuregzmm
175 * i386-init.h: Regenerated.
176 * i386-tbl.h: Likewise.
178 2016-05-27 H.J. Lu <hongjiu.lu@intel.com>
181 * i386-gen.c (cpu_flags): Remove CpuAMD64 and CpuIntel64.
182 (opcode_modifiers): Add AMD64 and Intel64.
183 (main): Properly verify CpuMax.
184 * i386-opc.h (CpuAMD64): Removed.
185 (CpuIntel64): Likewise.
186 (CpuMax): Set to CpuNo64.
187 (i386_cpu_flags): Remove cpuamd64 and cpuintel64.
190 (i386_opcode_modifier): Add amd64 and intel64.
191 (i386-opc.tbl): Replace CpuAMD64/CpuIntel64 with AMD64/Intel64
193 * i386-init.h: Regenerated.
194 * i386-tbl.h: Likewise.
196 2016-05-27 H.J. Lu <hongjiu.lu@intel.com>
199 * i386-gen.c (main): Fail if CpuMax is incorrect.
200 * i386-opc.h (CpuMax): Set to CpuIntel64.
201 * i386-tbl.h: Regenerated.
203 2016-05-27 Nick Clifton <nickc@redhat.com>
206 * msp430-dis.c (msp430dis_read_two_bytes): New function.
207 (msp430dis_opcode_unsigned): New function.
208 (msp430dis_opcode_signed): New function.
209 (msp430_singleoperand): Use the new opcode reading functions.
210 Only disassenmble bytes if they were successfully read.
211 (msp430_doubleoperand): Likewise.
212 (msp430_branchinstr): Likewise.
213 (msp430x_callx_instr): Likewise.
214 (print_insn_msp430): Check that it is safe to read bytes before
215 attempting disassembly. Use the new opcode reading functions.
217 2016-05-26 Peter Bergner <bergner@vnet.ibm.com>
219 * ppc-opc.c (CY): New define. Document it.
220 (powerpc_opcodes) <addex[.], lwzmx, vmsumudm>: New mnemonics.
222 2016-05-25 H.J. Lu <hongjiu.lu@intel.com>
224 * i386-gen.c (cpu_flag_init): Add CpuVREX to CPU_AVX512DQ_FLAGS,
225 CPU_AVX512BW_FLAGS, CPU_AVX512VL_FLAGS, CPU_AVX512IFMA_FLAGS
226 and CPU_AVX512VBMI_FLAGS. Add CpuAVX512DQ, CpuAVX512BW,
227 CpuAVX512VL, CpuAVX512IFMA and CpuAVX512VBMI to
229 * i386-init.h: Regenerated.
231 2016-05-25 H.J. Lu <hongjiu.lu@intel.com>
234 * i386-gen.c (cpu_flag_init): Add CpuVREX to CPU_AVX512F_FLAGS,
235 CPU_AVX512CD_FLAGS, CPU_AVX512ER_FLAGS and CPU_AVX512PF_FLAGS.
236 * i386-init.h: Regenerated.
238 2016-05-25 H.J. Lu <hongjiu.lu@intel.com>
240 * i386-gen.c (cpu_flag_init): Rename CPU_ANY87_FLAGS to
241 CPU_ANY_X87_FLAGS. Add CPU_ANY_MMX_FLAGS.
242 * i386-init.h: Regenerated.
244 2016-05-23 Claudiu Zissulescu <claziss@synopsys.com>
246 * arc-dis.c (print_flags): Set branch_delay_insns, and insn_type
248 (print_insn_arc): Set insn_type information.
249 * arc-opc.c (C_CC): Add F_CLASS_COND.
250 * arc-tbl.h (bbit0, bbit1): Update subclass to COND.
251 (beq_s, bge_s, bgt_s, bhi_s, bhs_s): Likewise.
252 (ble_s, blo_s, bls_s, blt_s, bne_s): Likewise.
253 (breq, breq_s, brge, brhs, brlo, brlt): Likewise.
254 (brne, brne_s, jeq_s, jne_s): Likewise.
256 2016-05-23 Claudiu Zissulescu <claziss@synopsys.com>
258 * arc-tbl.h (neg): New instruction variant.
260 2016-05-23 Cupertino Miranda <cmiranda@synopsys.com>
262 * arc-dis.c (find_format, find_format, get_auxreg)
263 (print_insn_arc): Changed.
264 * arc-ext.h (INSERT_XOP): Likewise.
266 2016-05-23 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
268 * tic54x-dis.c (sprint_mmr): Adjust.
269 * tic54x-opc.c: Likewise.
271 2016-05-19 Alan Modra <amodra@gmail.com>
273 * ppc-opc.c (NSISIGNOPT): Use insert_nsi and extract_nsi.
275 2016-05-19 Alan Modra <amodra@gmail.com>
277 * ppc-opc.c: Formatting.
278 (NSISIGNOPT): Define.
279 (powerpc_opcodes <subis>): Use NSISIGNOPT.
281 2016-05-18 Maciej W. Rozycki <macro@imgtec.com>
283 * mips-dis.c (is_compressed_mode_p): Add `micromips_p' operand,
284 replacing references to `micromips_ase' throughout.
285 (_print_insn_mips): Don't use file-level microMIPS annotation to
286 determine the disassembly mode with the symbol table.
288 2016-05-13 Peter Bergner <bergner@vnet.ibm.com>
290 * ppc-opc.c (IMM8): Use PPC_OPERAND_SIGNOPT.
292 2016-05-11 Andrew Bennett <andrew.bennett@imgtec.com>
294 * mips-dis.c (mips_arch_choices): Add ASE_DSPR3 to mips32r6 and
296 * mips-opc.c (D34): New macro.
297 (mips_builtin_opcodes): Define bposge32c for DSPr3.
299 2016-05-10 Alexander Fomin <alexander.fomin@intel.com>
301 * i386-dis.c (prefix_table): Add RDPID instruction.
302 * i386-gen.c (cpu_flag_init): Add RDPID flag.
303 (cpu_flags): Add RDPID bitfield.
304 * i386-opc.h (enum): Add RDPID element.
305 (i386_cpu_flags): Add RDPID field.
306 * i386-opc.tbl: Add RDPID instruction.
307 * i386-init.h: Regenerate.
308 * i386-tbl.h: Regenerate.
310 2016-05-10 Thomas Preud'homme <thomas.preudhomme@arm.com>
312 * arm-dis.c (get_sym_code_type): Use ARM_GET_SYM_BRANCH_TYPE to get
313 branch type of a symbol.
314 (print_insn): Likewise.
316 2016-05-10 Thomas Preud'homme <thomas.preudhomme@arm.com>
318 * arm-dis.c (coprocessor_opcodes): Add entries for VFP ARMv8-M
319 Mainline Security Extensions instructions.
320 (thumb_opcodes): Add entries for narrow ARMv8-M Security
321 Extensions instructions.
322 (thumb32_opcodes): Add entries for wide ARMv8-M Security Extensions
324 (psr_name): Add new MSP_NS and PSP_NS ARMv8-M Security Extensions
327 2016-05-09 Jose E. Marchesi <jose.marchesi@oracle.com>
329 * sparc-opc.c (sparc_opcodes): Fix mnemonic of faligndatai.
331 2016-05-03 Claudiu Zissulescu <claziss@synopsys.com>
333 * arc-ext.c (dump_ARC_extmap): Handle SYNATX_NOP and SYNTAX_1OP.
334 (arcExtMap_genOpcode): Likewise.
335 * arc-opc.c (arg_32bit_rc): Define new variable.
336 (arg_32bit_u6): Likewise.
337 (arg_32bit_limm): Likewise.
339 2016-05-03 Szabolcs Nagy <szabolcs.nagy@arm.com>
341 * aarch64-gen.c (VERIFIER): Define.
342 * aarch64-opc.c (VERIFIER): Define.
343 (verify_ldpsw): Use static linkage.
344 * aarch64-opc.h (verify_ldpsw): Remove.
345 * aarch64-tbl.h: Use VERIFIER for verifiers.
347 2016-04-28 Nick Clifton <nickc@redhat.com>
350 * aarch64-dis.c (aarch64_opcode_decode): Run verifier if present.
351 * aarch64-opc.c (verify_ldpsw): New function.
352 * aarch64-opc.h (verify_ldpsw): New prototype.
353 * aarch64-tbl.h: Add initialiser for verifier field.
354 (LDPSW): Set verifier to verify_ldpsw.
356 2016-04-23 H.J. Lu <hongjiu.lu@intel.com>
360 * i386-dis.c (print_insn): Return -1 if size of bfd_vma is
361 smaller than address size.
363 2016-04-20 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
365 * alpha-dis.c: Regenerate.
366 * crx-dis.c: Likewise.
367 * disassemble.c: Likewise.
368 * epiphany-opc.c: Likewise.
369 * fr30-opc.c: Likewise.
370 * frv-opc.c: Likewise.
371 * ip2k-opc.c: Likewise.
372 * iq2000-opc.c: Likewise.
373 * lm32-opc.c: Likewise.
374 * lm32-opinst.c: Likewise.
375 * m32c-opc.c: Likewise.
376 * m32r-opc.c: Likewise.
377 * m32r-opinst.c: Likewise.
378 * mep-opc.c: Likewise.
379 * mt-opc.c: Likewise.
380 * or1k-opc.c: Likewise.
381 * or1k-opinst.c: Likewise.
382 * tic80-opc.c: Likewise.
383 * xc16x-opc.c: Likewise.
384 * xstormy16-opc.c: Likewise.
386 2016-04-19 Andrew Burgess <andrew.burgess@embecosm.com>
388 * arc-nps400-tbl.h: Add addb, subb, adcb, sbcb, andb, xorb, orb,
389 fxorb, wxorb, shlb, shrb, notb, cntbb, div, mod, divm, qcmp,
390 calcsd, and calcxd instructions.
391 * arc-opc.c (insert_nps_bitop_size): Delete.
392 (extract_nps_bitop_size): Delete.
393 (MAKE_SRC_POS_INSERT_EXTRACT_FUNCS): Define, and use.
394 (extract_nps_qcmp_m3): Define.
395 (extract_nps_qcmp_m2): Define.
396 (extract_nps_qcmp_m1): Define.
397 (arc_flag_operands): Add F_NPS_SX, F_NPS_AR, F_NPS_AL.
398 (arc_flag_classes): Add C_NPS_SX, C_NPS_AR_AL
399 (arc_operands): Add NPS_SRC2_POS, NPS_SRC1_POS, NPS_ADDB_SIZE,
400 NPS_ANDB_SIZE, NPS_FXORB_SIZ, NPS_WXORB_SIZ, NPS_R_XLDST,
401 NPS_DIV_UIMM4, NPS_QCMP_SIZE, NPS_QCMP_M1, NPS_QCMP_M2, and
404 2016-04-19 Andrew Burgess <andrew.burgess@embecosm.com>
406 * arc-nps400-tbl.h: Add dctcp, dcip, dcet, and dcacl instructions.
408 2016-04-15 H.J. Lu <hongjiu.lu@intel.com>
410 * Makefile.in: Regenerated with automake 1.11.6.
411 * aclocal.m4: Likewise.
413 2016-04-14 Andrew Burgess <andrew.burgess@embecosm.com>
415 * arc-nps400-tbl.h: Add xldb, xldw, xld, xstb, xstw, and xst
417 * arc-opc.c (insert_nps_cmem_uimm16): New function.
418 (extract_nps_cmem_uimm16): New function.
419 (arc_operands): Add NPS_XLDST_UIMM16 operand.
421 2016-04-14 Andrew Burgess <andrew.burgess@embecosm.com>
423 * arc-dis.c (arc_insn_length): New function.
424 (print_insn_arc): Use arc_insn_length, change insnLen to unsigned.
425 (find_format): Change insnLen parameter to unsigned.
427 2016-04-13 Nick Clifton <nickc@redhat.com>
430 * v850-opc.c (v850_opcodes): Correct masks for long versions of
431 the LD.B and LD.BU instructions.
433 2016-04-12 Claudiu Zissulescu <claziss@synopsys.com>
435 * arc-dis.c (find_format): Check for extension flags.
436 (print_flags): New function.
437 (print_insn_arc): Update for .extCondCode, .extCoreRegister and
439 * arc-ext.c (arcExtMap_coreRegName): Use
440 LAST_EXTENSION_CORE_REGISTER.
441 (arcExtMap_coreReadWrite): Likewise.
442 (dump_ARC_extmap): Update printing.
443 * arc-opc.c (arc_flag_classes): Add F_CLASS_EXTEND flag.
444 (arc_aux_regs): Add cpu field.
445 * arc-regs.h: Add cpu field, lower case name aux registers.
447 2016-04-12 Claudiu Zissulescu <claziss@synopsys.com>
449 * arc-tbl.h: Add rtsc, sleep with no arguments.
451 2016-04-12 Claudiu Zissulescu <claziss@synopsys.com>
453 * arc-opc.c (flags_none, flags_f, flags_cc, flags_ccf):
455 (arg_none, arg_32bit_rarbrc, arg_32bit_zarbrc, arg_32bit_rbrbrc)
456 (arg_32bit_rarbu6, arg_32bit_zarbu6, arg_32bit_rbrbu6)
457 (arg_32bit_rbrbs12, arg_32bit_ralimmrc, arg_32bit_rarblimm)
458 (arg_32bit_zalimmrc, arg_32bit_zarblimm, arg_32bit_rbrblimm)
459 (arg_32bit_ralimmu6, arg_32bit_zalimmu6, arg_32bit_zalimms12)
460 (arg_32bit_ralimmlimm, arg_32bit_zalimmlimm, arg_32bit_rbrc)
461 (arg_32bit_zarc, arg_32bit_rbu6, arg_32bit_zau6, arg_32bit_rblimm)
462 (arg_32bit_zalimm, arg_32bit_limmrc, arg_32bit_limmu6)
463 (arg_32bit_limms12, arg_32bit_limmlimm): Likewise.
464 (arc_opcode arc_opcodes): Null terminate the array.
465 (arc_num_opcodes): Remove.
466 * arc-ext.h (INSERT_XOP): Define.
467 (extInstruction_t): Likewise.
468 (arcExtMap_instName): Delete.
469 (arcExtMap_insn): New function.
470 (arcExtMap_genOpcode): Likewise.
471 * arc-ext.c (ExtInstruction): Remove.
472 (create_map): Zero initialize instruction fields.
473 (arcExtMap_instName): Remove.
474 (arcExtMap_insn): New function.
475 (dump_ARC_extmap): More info while debuging.
476 (arcExtMap_genOpcode): New function.
477 * arc-dis.c (find_format): New function.
478 (print_insn_arc): Use find_format.
479 (arc_get_disassembler): Enable dump_ARC_extmap only when
482 2016-04-11 Maciej W. Rozycki <macro@imgtec.com>
484 * mips-dis.c (print_mips16_insn_arg): Mask unused extended
485 instruction bits out.
487 2016-04-07 Andrew Burgess <andrew.burgess@embecosm.com>
489 * arc-nps400-tbl.h: Add schd, sync, and hwschd instructions.
490 * arc-opc.c (arc_flag_operands): Add new flags.
491 (arc_flag_classes): Add new classes.
493 2016-04-07 Andrew Burgess <andrew.burgess@embecosm.com>
495 * arc-opc.c (arc_opcodes): Extend comment to discus table layout.
497 2016-04-05 Andrew Burgess <andrew.burgess@embecosm.com>
499 * arc-nps400-tbl.h: Add movbi, decode1, fbset, fbclear, encode0,
500 encode1, rflt, crc16, and crc32 instructions.
501 * arc-opc.c (arc_flag_operands): Add F_NPS_R.
502 (arc_flag_classes): Add C_NPS_R.
503 (insert_nps_bitop_size_2b): New function.
504 (extract_nps_bitop_size_2b): Likewise.
505 (insert_nps_bitop_uimm8): Likewise.
506 (extract_nps_bitop_uimm8): Likewise.
507 (arc_operands): Add new operand entries.
509 2016-04-05 Claudiu Zissulescu <claziss@synopsys.com>
511 * arc-regs.h: Add a new subclass field. Add double assist
512 accumulator register values.
513 * arc-tbl.h: Use DPA subclass to mark the double assist
514 instructions. Use DPX/SPX subclas to mark the FPX instructions.
515 * arc-opc.c (RSP): Define instead of SP.
516 (arc_aux_regs): Add the subclass field.
518 2016-04-05 Jiong Wang <jiong.wang@arm.com>
520 * arm-dis.c: Support FP16 vmul, vmla, vmls (by scalar).
522 2016-03-31 Andrew Burgess <andrew.burgess@embecosm.com>
524 * arc-opc.c (arc_operands): Fix operand flags for NPS_R_DST, and
527 2016-03-30 Andrew Burgess <andrew.burgess@embecosm.com>
529 * arc-nps400-tbl.h: Add a header comment, and fix some whitespace
530 issues. No functional changes.
532 2016-03-30 Claudiu Zissulescu <claziss@synopsys.com>
534 * arc-regs.h (IC_RAM_ADDRESS, IC_TAG, IC_WP, IC_DATA, CONTROL0)
535 (AX2, AY2, MX2, MY2, AY0, AY1, DC_RAM_ADDR, DC_TAG, CONTROL1)
536 (RTT): Remove duplicate.
537 (LCDINSTR, LCDDATA, LCDSTAT, CC_*, PCT_COUNT*, PCT_SNAP*)
538 (PCT_CONFIG*): Remove.
539 (D1L, D1H, D2H, D2L): Define.
541 2016-03-29 Claudiu Zissulescu <claziss@synopsys.com>
543 * arc-ext-tbl.h (dsp_fp_i2flt): Fix typo.
545 2016-03-29 Claudiu Zissulescu <claziss@synopsys.com>
547 * arc-tbl.h (invld07): Remove.
548 * arc-ext-tbl.h: New file.
549 * arc-dis.c (FIELDA, FIELDB, FIELDC): Remove.
550 * arc-opc.c (arc_opcodes): Add ext-tbl include.
552 2016-03-24 Jan Kratochvil <jan.kratochvil@redhat.com>
554 Fix -Wstack-usage warnings.
555 * aarch64-dis.c (print_operands): Substitute size.
556 * aarch64-opc.c (print_register_offset_address): Substitute tblen.
558 2016-03-22 Jose E. Marchesi <jose.marchesi@oracle.com>
560 * sparc-opc.c (sparc_opcodes): Reorder entries for `rd' in order
561 to get a proper diagnostic when an invalid ASR register is used.
563 2016-03-22 Nick Clifton <nickc@redhat.com>
565 * configure: Regenerate.
567 2016-03-21 Andrew Burgess <andrew.burgess@embecosm.com>
569 * arc-nps400-tbl.h: New file.
570 * arc-opc.c: Add top level comment.
571 (insert_nps_3bit_dst): New function.
572 (extract_nps_3bit_dst): New function.
573 (insert_nps_3bit_src2): New function.
574 (extract_nps_3bit_src2): New function.
575 (insert_nps_bitop_size): New function.
576 (extract_nps_bitop_size): New function.
577 (arc_flag_operands): Add nps400 entries.
578 (arc_flag_classes): Add nps400 entries.
579 (arc_operands): Add nps400 entries.
580 (arc_opcodes): Add nps400 include.
582 2016-03-21 Andrew Burgess <andrew.burgess@embecosm.com>
584 * arc-opc.c (arc_flag_classes): Convert all flag classes to use
585 the new class enum values.
587 2016-03-21 Andrew Burgess <andrew.burgess@embecosm.com>
589 * arc-dis.c (print_insn_arc): Handle nps400.
591 2016-03-21 Andrew Burgess <andrew.burgess@embecosm.com>
593 * arc-opc.c (BASE): Delete.
595 2016-03-18 Nick Clifton <nickc@redhat.com>
598 * aarch64-tbl.h (aarch64_opcode_table): Fix type of second operand
599 of MOV insn that aliases an ORR insn.
601 2016-03-16 Jiong Wang <jiong.wang@arm.com>
603 * arm-dis.c (neon_opcodes): Support new FP16 instructions.
605 2016-03-07 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
607 * mcore-opc.h: Add const qualifiers.
608 * microblaze-opc.h (struct op_code_struct): Likewise.
609 * sh-opc.h: Likewise.
610 * tic4x-dis.c (tic4x_print_indirect): Likewise.
611 (tic4x_print_op): Likewise.
613 2016-03-02 Alan Modra <amodra@gmail.com>
615 * or1k-desc.h: Regenerate.
616 * fr30-ibld.c: Regenerate.
617 * rl78-decode.c: Regenerate.
619 2016-03-01 Nick Clifton <nickc@redhat.com>
622 * rl78-dis.c (print_insn_rl78_common): Fix typo.
624 2016-02-24 Renlin Li <renlin.li@arm.com>
626 * arm-dis.c (coprocessor_opcodes): Add fp16 instruction entries.
627 (print_insn_coprocessor): Support fp16 instructions.
629 2016-02-24 Renlin Li <renlin.li@arm.com>
631 * arm-dis.c (print_insn_coprocessor): Fix mask for vsel, vmaxnm,
634 2016-02-24 Renlin Li <renlin.li@arm.com>
636 * arm-dis.c (print_insn_coprocessor): Check co-processor number for
637 cpd/cpd2, mcr/mcr2, mrc/mrc2, ldc/ldc2, stc/stc2.
639 2016-02-15 H.J. Lu <hongjiu.lu@intel.com>
641 * i386-dis.c (print_insn): Parenthesize expression to prevent
645 2016-02-10 Claudiu Zissulescu <claziss@synopsys.com>
646 Janek van Oirschot <jvanoirs@synopsys.com>
648 * arc-opc.c (arc_relax_opcodes, arc_num_relax_opcodes): New
651 2016-02-04 Nick Clifton <nickc@redhat.com>
654 * msp430-dis.c (print_insn_msp430): Add a special case for
655 decoding an RRC instruction with the ZC bit set in the extension
658 2016-02-02 Andrew Burgess <andrew.burgess@embecosm.com>
660 * cgen-ibld.in (insert_normal): Rework calculation of shift.
661 * epiphany-ibld.c: Regenerate.
662 * fr30-ibld.c: Regenerate.
663 * frv-ibld.c: Regenerate.
664 * ip2k-ibld.c: Regenerate.
665 * iq2000-ibld.c: Regenerate.
666 * lm32-ibld.c: Regenerate.
667 * m32c-ibld.c: Regenerate.
668 * m32r-ibld.c: Regenerate.
669 * mep-ibld.c: Regenerate.
670 * mt-ibld.c: Regenerate.
671 * or1k-ibld.c: Regenerate.
672 * xc16x-ibld.c: Regenerate.
673 * xstormy16-ibld.c: Regenerate.
675 2016-02-02 Andrew Burgess <andrew.burgess@embecosm.com>
677 * epiphany-dis.c: Regenerated from latest cpu files.
679 2016-02-01 Michael McConville <mmcco@mykolab.com>
681 * cgen-dis.c (count_decodable_bits): Use unsigned value for mask
684 2016-01-25 Renlin Li <renlin.li@arm.com>
686 * arm-dis.c (mapping_symbol_for_insn): New function.
687 (find_ifthen_state): Call mapping_symbol_for_insn().
689 2016-01-20 Matthew Wahab <matthew.wahab@arm.com>
691 * aarch64-opc.c (operand_general_constraint_met_p): Check validity
692 of MSR UAO immediate operand.
694 2016-01-18 Maciej W. Rozycki <macro@imgtec.com>
696 * mips-dis.c (print_insn_micromips): Remove 48-bit microMIPS
699 2016-01-17 Alan Modra <amodra@gmail.com>
701 * configure: Regenerate.
703 2016-01-14 Nick Clifton <nickc@redhat.com>
705 * rl78-decode.opc (rl78_decode_opcode): Add 's' operand to movw
706 instructions that can support stack pointer operations.
707 * rl78-decode.c: Regenerate.
708 * rl78-dis.c: Fix display of stack pointer in MOVW based
711 2016-01-14 Matthew Wahab <matthew.wahab@arm.com>
713 * aarch64-opc.c (aarch64_sys_reg_supported_p): Merge conditionals
714 testing for RAS support. Add checks for erxfr_el1, erxctlr_el1,
715 erxtatus_el1 and erxaddr_el1.
717 2016-01-12 Matthew Wahab <matthew.wahab@arm.com>
719 * arm-dis.c (arm_opcodes): Add "esb".
720 (thumb_opcodes): Likewise.
722 2016-01-11 Peter Bergner <bergner@vnet.ibm.com>
724 * ppc-opc.c <xscmpnedp>: Delete.
725 <xvcmpnedp>: Likewise.
726 <xvcmpnedp.>: Likewise.
727 <xvcmpnesp>: Likewise.
728 <xvcmpnesp.>: Likewise.
730 2016-01-08 Andreas Schwab <schwab@linux-m68k.org>
733 * m68k-opc.c (moveb, movew): For ISA_B/C only allow #,d(An) in
736 2016-01-01 Alan Modra <amodra@gmail.com>
738 Update year range in copyright notice of all files.
740 For older changes see ChangeLog-2015
742 Copyright (C) 2016 Free Software Foundation, Inc.
744 Copying and distribution of this file, with or without modification,
745 are permitted in any medium without royalty provided the copyright
746 notice and this notice are preserved.
752 version-control: never