1 2005-03-15 Alan Modra <amodra@bigpond.net.au>
3 * po/fr.po: Commit new French translation.
5 2005-03-14 Jan-Benedict Glaw <jbglaw@lug-owl.de>
7 * vax-dis.c: Fix spelling error
8 (print_insn_vax): Use ".word 0x0012 # Entry mask: r1 r2 >" instead
9 of just "Entry mask: < r1 ... >"
11 2005-03-12 Zack Weinberg <zack@codesourcery.com>
13 * arm-dis.c (arm_opcodes): Document %E and %V.
14 Add entries for v6T2 ARM instructions:
15 bfc bfi mls strht ldrht ldrsht ldrsbt movw movt rbit ubfx sbfx.
16 (print_insn_arm): Add support for %E and %V.
17 (thumb_opcodes): Add ARMv6K instructions nop, sev, wfe, wfi, yield.
19 2005-03-10 Jeff Baker <jbaker@qnx.com>
20 Alan Modra <amodra@bigpond.net.au>
22 * ppc-opc.c (insert_sprg, extract_sprg): New Functions.
23 (powerpc_operands <SPRG>): Call the above. Bit field is 5 bits.
25 (XSPRG_MASK): Mask off extra bits now part of sprg field.
26 (powerpc_opcodes): Asjust mfsprg and mtsprg to suit new mask. Move
27 mfsprg4..7 after msprg and consolidate.
29 2005-03-09 Jan-Benedict Glaw <jbglaw@lug-owl.de>
31 * vax-dis.c (entry_mask_bit): New array.
32 (print_insn_vax): Decode function entry mask.
34 2005-03-07 Aldy Hernandez <aldyh@redhat.com>
36 * ppc-opc.c (powerpc_opcodes): Fix encoding of efscfd.
38 2005-03-05 Alan Modra <amodra@bigpond.net.au>
40 * po/opcodes.pot: Regenerate.
42 2005-03-03 Ramana Radhakrishnan <ramana.radhakrishnan@codito.com>
44 * arc-dis.c (a4_decoding_class): New enum.
45 (dsmOneArcInst): Use the enum values for the decoding class.
46 Remove redundant case in the switch for decodingClass value 11.
48 2005-03-02 Jan Beulich <jbeulich@novell.com>
50 * i386-dis.c (print_insn): Suppress lock prefix printing for cr8...15
52 (OP_C): Consider lock prefix in non-64-bit modes.
54 2005-02-24 Alan Modra <amodra@bigpond.net.au>
56 * cris-dis.c (format_hex): Remove ineffective warning fix.
57 * crx-dis.c (make_instruction): Warning fix.
58 * frv-asm.c: Regenerate.
60 2005-02-23 Nick Clifton <nickc@redhat.com>
62 * cgen-dis.in: Use bfd_byte for buffers that are passed to
65 * ia64-opc.c (locate_opcode_ent): Initialise opval array.
67 * crx-dis.c (make_instruction): Move argument structure into inner
68 scope and ensure that all of its fields are initialised before
71 * fr30-asm.c: Regenerate.
72 * fr30-dis.c: Regenerate.
73 * frv-asm.c: Regenerate.
74 * frv-dis.c: Regenerate.
75 * ip2k-asm.c: Regenerate.
76 * ip2k-dis.c: Regenerate.
77 * iq2000-asm.c: Regenerate.
78 * iq2000-dis.c: Regenerate.
79 * m32r-asm.c: Regenerate.
80 * m32r-dis.c: Regenerate.
81 * openrisc-asm.c: Regenerate.
82 * openrisc-dis.c: Regenerate.
83 * xstormy16-asm.c: Regenerate.
84 * xstormy16-dis.c: Regenerate.
86 2005-02-22 Alan Modra <amodra@bigpond.net.au>
88 * arc-ext.c: Warning fixes.
89 * arc-ext.h: Likewise.
90 * cgen-opc.c: Likewise.
91 * ia64-gen.c: Likewise.
92 * maxq-dis.c: Likewise.
93 * ns32k-dis.c: Likewise.
94 * w65-dis.c: Likewise.
95 * ia64-asmtab.c: Regenerate.
97 2005-02-22 Alan Modra <amodra@bigpond.net.au>
99 * fr30-desc.c: Regenerate.
100 * fr30-desc.h: Regenerate.
101 * fr30-opc.c: Regenerate.
102 * fr30-opc.h: Regenerate.
103 * frv-desc.c: Regenerate.
104 * frv-desc.h: Regenerate.
105 * frv-opc.c: Regenerate.
106 * frv-opc.h: Regenerate.
107 * ip2k-desc.c: Regenerate.
108 * ip2k-desc.h: Regenerate.
109 * ip2k-opc.c: Regenerate.
110 * ip2k-opc.h: Regenerate.
111 * iq2000-desc.c: Regenerate.
112 * iq2000-desc.h: Regenerate.
113 * iq2000-opc.c: Regenerate.
114 * iq2000-opc.h: Regenerate.
115 * m32r-desc.c: Regenerate.
116 * m32r-desc.h: Regenerate.
117 * m32r-opc.c: Regenerate.
118 * m32r-opc.h: Regenerate.
119 * m32r-opinst.c: Regenerate.
120 * openrisc-desc.c: Regenerate.
121 * openrisc-desc.h: Regenerate.
122 * openrisc-opc.c: Regenerate.
123 * openrisc-opc.h: Regenerate.
124 * xstormy16-desc.c: Regenerate.
125 * xstormy16-desc.h: Regenerate.
126 * xstormy16-opc.c: Regenerate.
127 * xstormy16-opc.h: Regenerate.
129 2005-02-21 Alan Modra <amodra@bigpond.net.au>
131 * Makefile.am: Run "make dep-am"
132 * Makefile.in: Regenerate.
134 2005-02-15 Nick Clifton <nickc@redhat.com>
136 * cgen-dis.in (print_address): Add an ATTRIBUTE_UNUSED to prevent
137 compile time warnings.
138 (print_keyword): Likewise.
139 (default_print_insn): Likewise.
141 * fr30-desc.c: Regenerated.
142 * fr30-desc.h: Regenerated.
143 * fr30-dis.c: Regenerated.
144 * fr30-opc.c: Regenerated.
145 * fr30-opc.h: Regenerated.
146 * frv-desc.c: Regenerated.
147 * frv-dis.c: Regenerated.
148 * frv-opc.c: Regenerated.
149 * ip2k-asm.c: Regenerated.
150 * ip2k-desc.c: Regenerated.
151 * ip2k-desc.h: Regenerated.
152 * ip2k-dis.c: Regenerated.
153 * ip2k-opc.c: Regenerated.
154 * ip2k-opc.h: Regenerated.
155 * iq2000-desc.c: Regenerated.
156 * iq2000-dis.c: Regenerated.
157 * iq2000-opc.c: Regenerated.
158 * m32r-asm.c: Regenerated.
159 * m32r-desc.c: Regenerated.
160 * m32r-desc.h: Regenerated.
161 * m32r-dis.c: Regenerated.
162 * m32r-opc.c: Regenerated.
163 * m32r-opc.h: Regenerated.
164 * m32r-opinst.c: Regenerated.
165 * openrisc-desc.c: Regenerated.
166 * openrisc-desc.h: Regenerated.
167 * openrisc-dis.c: Regenerated.
168 * openrisc-opc.c: Regenerated.
169 * openrisc-opc.h: Regenerated.
170 * xstormy16-desc.c: Regenerated.
171 * xstormy16-desc.h: Regenerated.
172 * xstormy16-dis.c: Regenerated.
173 * xstormy16-opc.c: Regenerated.
174 * xstormy16-opc.h: Regenerated.
176 2005-02-14 H.J. Lu <hongjiu.lu@intel.com>
178 * dis-buf.c (perror_memory): Use sprintf_vma to print out
181 2005-02-11 Nick Clifton <nickc@redhat.com>
183 * iq2000-asm.c: Regenerate.
185 * frv-dis.c: Regenerate.
187 2005-02-07 Jim Blandy <jimb@redhat.com>
189 * Makefile.am (CGEN): Load guile.scm before calling the main
191 * Makefile.in: Regenerated.
192 * cgen.sh: Be prepared for the 'cgen' argument to contain spaces.
193 Simply pass the cgen-opc.scm path to ${cgen} as its first
194 argument; ${cgen} itself now contains the '-s', or whatever is
195 appropriate for the Scheme being used.
197 2005-01-31 Andrew Cagney <cagney@gnu.org>
199 * configure: Regenerate to track ../gettext.m4.
201 2005-01-31 Jan Beulich <jbeulich@novell.com>
203 * ia64-gen.c (NELEMS): Define.
204 (shrink): Generate alias with missing second predicate register when
205 opcode has two outputs and these are both predicates.
206 * ia64-opc-i.c (FULL17): Define.
207 (ia64_opcodes_i): Add mov-to-pr alias without second input. Use FULL17
208 here to generate output template.
209 (TBITCM, TNATCM): Undefine after use.
210 * ia64-opc-m.c (ia64_opcodes_i): Add alloc alias without ar.pfs as
211 first input. Add ld16 aliases without ar.csd as second output. Add
212 st16 aliases without ar.csd as second input. Add cmpxchg aliases
213 without ar.ccv as third input. Add cmp8xchg16 aliases without ar.csd/
214 ar.ccv as third/fourth inputs. Consolidate through...
215 (CMPXCHG_acq, CMPXCHG_rel, CMPXCHG_1, CMPXCHG_2, CMPXCHG_4, CMPXCHG_8,
216 CMPXCHGn, CMP8XCHG16, CMPXCHG_ALL): Define.
217 * ia64-asmtab.c: Regenerate.
219 2005-01-27 Andrew Cagney <cagney@gnu.org>
221 * configure: Regenerate to track ../gettext.m4 change.
223 2005-01-25 Alexandre Oliva <aoliva@redhat.com>
225 2004-11-10 Alexandre Oliva <aoliva@redhat.com>
226 * frv-asm.c: Rebuilt.
227 * frv-desc.c: Rebuilt.
228 * frv-desc.h: Rebuilt.
229 * frv-dis.c: Rebuilt.
230 * frv-ibld.c: Rebuilt.
231 * frv-opc.c: Rebuilt.
232 * frv-opc.h: Rebuilt.
234 2005-01-24 Andrew Cagney <cagney@gnu.org>
236 * configure: Regenerate, ../gettext.m4 was updated.
238 2005-01-21 Fred Fish <fnf@specifixinc.com>
240 * mips-opc.c: Change INSN_ALIAS to INSN2_ALIAS.
241 Change INSN_WRITE_MDMX_ACC to INSN2_WRITE_MDMX_ACC.
242 Change INSN_READ_MDMX_ACC to INSN2_READ_MDMX_ACC.
245 2005-01-20 Alan Modra <amodra@bigpond.net.au>
247 * ppc-opc.c (powerpc_opcodes): Add optional 'l' arg to tlbiel.
249 2005-01-19 Fred Fish <fnf@specifixinc.com>
251 * mips-dis.c (no_aliases): New disassembly option flag.
252 (set_default_mips_dis_options): Init no_aliases to zero.
253 (parse_mips_dis_option): Handle no-aliases option.
254 (print_insn_mips): Ignore table entries that are aliases
255 if no_aliases is set.
256 (print_insn_mips16): Ditto.
257 * mips-opc.c (mips_builtin_opcodes): Add initializer column for
258 new pinfo2 member and add INSN_ALIAS initializers as needed. Also
259 move WR_MACC and RD_MACC initializers from pinfo to pinfo2.
260 * mips16-opc.c (mips16_opcodes): Ditto.
262 2005-01-17 Andrew Stubbs <andrew.stubbs@st.com>
264 * sh-opc.h (arch_sh2a_or_sh3e,arch_sh2a_or_sh4): Correct definition.
265 (inheritance diagram): Add missing edge.
266 (arch_sh1_up): Rename arch_sh_up to match external name to make life
267 easier for the testsuite.
268 (arch_sh4_nofp_up): Likewise, rename arch_sh4_nofpu_up.
269 (arch_sh4a_nofp_up): Likewise, rename arch_sh4a_nofpu_up.
270 (arch_sh2a_nofpu_or_sh4_nommu_nofpu_up): Add missing
271 arch_sh2a_or_sh4_up child.
272 (sh_table): Do renaming as above.
273 Correct comment for ldc.l for gas testsuite to read.
274 Remove rogue mul.l from sh1 (duplicate of the one for sh2).
275 Correct comments for movy.w and movy.l for gas testsuite to read.
276 Correct comments for fmov.d and fmov.s for gas testsuite to read.
278 2005-01-12 H.J. Lu <hongjiu.lu@intel.com>
280 * i386-dis.c (OP_E): Don't ignore scale in SIB for 64 bit mode.
282 2005-01-12 H.J. Lu <hongjiu.lu@intel.com>
284 * i386-dis.c (OP_E): Ignore scale when index == 0x4 in SIB.
286 2005-01-10 Andreas Schwab <schwab@suse.de>
288 * disassemble.c (disassemble_init_for_target) <case
289 bfd_arch_ia64>: Set skip_zeroes to 16.
290 <case bfd_arch_tic4x>: Set skip_zeroes to 32.
292 2004-12-23 Tomer Levi <Tomer.Levi@nsc.com>
294 * crx-opc.c: Mark 'bcop' instruction as RELAXABLE.
296 2004-12-14 Svein E. Seldal <Svein.Seldal@solidas.com>
298 * avr-dis.c: Prettyprint. Added printing of symbol names in all
299 memory references. Convert avr_operand() to C90 formatting.
301 2004-12-05 Tomer Levi <Tomer.Levi@nsc.com>
303 * crx-dis.c (print_arg): Use 'info->print_address_func' for address printing.
305 2004-11-29 Tomer Levi <Tomer.Levi@nsc.com>
307 * crx-opc.c (crx_optab): Mark all rbase_disps* operands as signed.
308 (no_op_insn): Initialize array with instructions that have no
310 * crx-dis.c (make_instruction): Get rid of COP_BRANCH_INS operand swapping.
312 2004-11-29 Richard Earnshaw <rearnsha@arm.com>
314 * arm-dis.c: Correct top-level comment.
316 2004-11-27 Richard Earnshaw <rearnsha@arm.com>
318 * arm-opc.h (arm_opcode, thumb_opcode): Add extra field for the
319 architecuture defining the insn.
320 (arm_opcodes, thumb_opcodes): Delete. Move to ...
321 * arm-dis.c (arm_opcodes, thumb_opcodes): Here. Add architecutre
323 Also include opcode/arm.h.
324 * Makefile.am (arm-dis.lo): Update dependency list.
325 * Makefile.in: Regenerate.
327 2004-11-22 Ravi Ramaseshan <ravi.ramaseshan@codito.com>
329 * opcode/arc-opc.c (insert_base): Modify ls_operand[LS_OFFSET] to
330 reflect the change to the short immediate syntax.
332 2004-11-19 Alan Modra <amodra@bigpond.net.au>
334 * or32-opc.c (debug): Warning fix.
335 * po/POTFILES.in: Regenerate.
337 * maxq-dis.c: Formatting.
338 (print_insn): Warning fix.
340 2004-11-17 Daniel Jacobowitz <dan@codesourcery.com>
342 * arm-dis.c (WORD_ADDRESS): Define.
343 (print_insn): Use it. Correct big-endian end-of-section handling.
345 2004-11-08 Inderpreet Singh <inderpreetb@nioda.hcltech.com>
346 Vineet Sharma <vineets@noida.hcltech.com>
348 * maxq-dis.c: New file.
349 * disassemble.c (ARCH_maxq): Define.
350 (disassembler): Add 'print_insn_maxq_little' for handling maxq
352 * configure.in: Add case for bfd_maxq_arch.
353 * configure: Regenerate.
354 * Makefile.am: Add support for maxq-dis.c
355 * Makefile.in: Regenerate.
356 * aclocal.m4: Regenerate.
358 2004-11-05 Tomer Levi <Tomer.Levi@nsc.com>
360 * crx-opc.c (crx_optab): Rename 'arg_icr' to 'arg_idxr' for Index register
362 * crx-dis.c: Likewise.
364 2004-11-04 Hans-Peter Nilsson <hp@axis.com>
366 Generally, handle CRISv32.
367 * cris-dis.c (TRACE_CASE): Define as (disdata->trace_case).
368 (struct cris_disasm_data): New type.
369 (format_reg, format_hex, cris_constraint, print_flags)
370 (get_opcode_entry): Add struct cris_disasm_data * parameter. All
372 (format_sup_reg, print_insn_crisv32_with_register_prefix)
373 (print_insn_crisv32_without_register_prefix)
374 (print_insn_crisv10_v32_with_register_prefix)
375 (print_insn_crisv10_v32_without_register_prefix)
376 (cris_parse_disassembler_options): New functions.
377 (bytes_to_skip, cris_spec_reg): Add enum cris_disass_family
378 parameter. All callers changed.
379 (get_opcode_entry): Call malloc, not xmalloc. Return NULL on
381 (cris_constraint) <case 'Y', 'U'>: New cases.
382 (bytes_to_skip): Handle 'Y' and 'N' as 's'. Skip size is 4 bytes
384 (print_with_operands) <case 'Y'>: New case.
385 (print_with_operands) <case 'T', 'A', '[', ']', 'd', 'n', 'u'>
386 <case 'N', 'Y', 'Q'>: New cases.
387 (print_insn_cris_generic): Emit "bcc ." for zero and CRISv32.
388 (print_insn_cris_with_register_prefix)
389 (print_insn_cris_without_register_prefix): Call
390 cris_parse_disassembler_options.
391 * cris-opc.c (cris_spec_regs): Mention that this table isn't used
392 for CRISv32 and the size of immediate operands. New v32-only
393 entries for bz, pid, srs, wz, exs, eda, dz, ebp, erp, nrp, ccs and
394 spc. Add v32-only 4-byte entries for p2, p3, p5 and p6. Change
395 ccr, ibr, irp to be v0..v10. Change bar, dccr to be v8..v10.
396 Change brp to be v3..v10.
397 (cris_support_regs): New vector.
398 (cris_opcodes): Update head comment. New format characters '[',
399 ']', space, 'A', 'd', 'N', 'n', 'Q', 'T', 'u', 'U', 'Y'.
400 Add new opcodes for v32 and adjust existing opcodes to accommodate
401 differences to earlier variants.
402 (cris_cond15s): New vector.
404 2004-11-04 Jan Beulich <jbeulich@novell.com>
406 * i386-dis.c (Eq, Edqw, indirEp, Gdq, I1): Define.
408 (Mp): Use f_mode rather than none at all.
409 (t_mode, dq_mode, dqw_mode, f_mode, const_1_mode): Define. t_mode
410 replaces what previously was x_mode; x_mode now means 128-bit SSE
412 (dis386): Make far jumps and calls have an 'l' prefix only in AT&T
413 mode. movmskpX's, pextrw's, and pmovmskb's first operands are Gdq.
414 pinsrw's second operand is Edqw.
415 (grps): 1-bit shifts' and rotates' second operands are I1. cmpxchg8b's
416 operand is Eq. movntq's and movntdq's first operands are EM. s[gi]dt,
417 fldenv, frstor, fsave, fstenv all should also have suffixes in Intel
418 mode when an operand size override is present or always suffixing.
419 More instructions will need to be added to this group.
420 (putop): Handle new macro chars 'C' (short/long suffix selector),
421 'I' (Intel mode override for following macro char), and 'J' (for
422 adding the 'l' prefix to far branches in AT&T mode). When an
423 alternative was specified in the template, honor macro character when
424 specified for Intel mode.
425 (OP_E): Handle new *_mode values. Correct pointer specifications for
426 memory operands. Consolidate output of index register.
427 (OP_G): Handle new *_mode values.
428 (OP_I): Handle const_1_mode.
429 (OP_ESreg, OP_DSreg): Generate pointer specifications. Indicate
430 respective opcode prefix bits have been consumed.
431 (OP_EM, OP_EX): Provide some default handling for generating pointer
434 2004-10-28 Tomer Levi <Tomer.Levi@nsc.com>
436 * crx-opc.c (REV_COP_INST): New macro, reverse operand order of
439 2004-10-27 Tomer Levi <Tomer.Levi@nsc.com>
441 * crx-dis.c (enum REG_ARG_TYPE): New, replacing COP_ARG_TYPE.
442 (getregliststring): Support HI/LO and user registers.
443 * crx-opc.c (crx_instruction): Update data structure according to the
444 rearrangement done in CRX opcode header file.
445 (crx_regtab): Likewise.
446 (crx_optab): Likewise.
447 (crx_instruction): Reorder load/stor instructions, remove unsupported
449 support new Co-Processor instruction 'cpi'.
451 2004-10-27 Nick Clifton <nickc@redhat.com>
453 * opcodes/iq2000-asm.c: Regenerate.
454 * opcodes/iq2000-desc.c: Regenerate.
455 * opcodes/iq2000-desc.h: Regenerate.
456 * opcodes/iq2000-dis.c: Regenerate.
457 * opcodes/iq2000-ibld.c: Regenerate.
458 * opcodes/iq2000-opc.c: Regenerate.
459 * opcodes/iq2000-opc.h: Regenerate.
461 2004-10-21 Tomer Levi <Tomer.Levi@nsc.com>
463 * crx-opc.c (crx_instruction): Replace i3, i4, i5 with us3,
464 us4, us5 (respectively).
465 Remove unsupported 'popa' instruction.
466 Reverse operands order in store co-processor instructions.
468 2004-10-15 Alan Modra <amodra@bigpond.net.au>
470 * Makefile.am: Run "make dep-am"
471 * Makefile.in: Regenerate.
473 2004-10-12 Bob Wilson <bob.wilson@acm.org>
475 * xtensa-dis.c: Use ISO C90 formatting.
477 2004-10-09 Alan Modra <amodra@bigpond.net.au>
479 * ppc-opc.c: Revert 2004-09-09 change.
481 2004-10-07 Bob Wilson <bob.wilson@acm.org>
483 * xtensa-dis.c (state_names): Delete.
484 (fetch_data): Use xtensa_isa_maxlength.
485 (print_xtensa_operand): Replace operand parameter with opcode/operand
486 pair. Remove print_sr_name parameter. Use new xtensa-isa.h functions.
487 (print_insn_xtensa): Use new xtensa-isa.h functions. Handle multislot
488 instruction bundles. Use xmalloc instead of malloc.
490 2004-10-07 David Gibson <david@gibson.dropbear.id.au>
492 * ppc-opc.c: Replace literal "0"s with NULLs in pointer
495 2004-10-07 Tomer Levi <Tomer.Levi@nsc.com>
497 * crx-opc.c (crx_instruction): Support Co-processor insns.
498 * crx-dis.c (COP_ARG_TYPE): New enum for CO-Processor arguments.
499 (getregliststring): Change function to use the above enum.
500 (print_arg): Handle CO-Processor insns.
501 (crx_cinvs): Add 'b' option to invalidate the branch-target
504 2004-10-06 Aldy Hernandez <aldyh@redhat.com>
506 * ppc-opc.c (powerpc_opcodes): Add efscfd, efdabs, efdnabs,
507 efdneg, efdadd, efdsub, efdmul, efddiv, efdcmpgt, efdcmplt,
508 efdcmpeq, efdtstgt, efdtstlt, efdtsteq, efdcfsi, efdcfsid,
509 efdcfui, efdcfuid, efdcfsf, efdcfuf, efdctsi, efdctsidz, efdctsiz,
510 efdctui, efdctuidz, efdctuiz, efdctsf, efdctuf, efdctuf, efdcfs.
512 2004-10-01 Bill Farmer <Bill@the-farmers.freeserve.co.uk>
514 * pdp11-dis.c (print_insn_pdp11): Subtract the SOB's displacement
517 2004-09-30 Paul Brook <paul@codesourcery.com>
519 * arm-dis.c (print_insn_arm): Handle 'e' for SMI instruction.
520 * arm-opc.h: Document %e. Add ARMv6ZK instructions.
522 2004-09-17 H.J. Lu <hongjiu.lu@intel.com>
524 * Makefile.am (AUTOMAKE_OPTIONS): Require 1.9.
525 (CONFIG_STATUS_DEPENDENCIES): New.
527 (config.status): Likewise.
528 * Makefile.in: Regenerated.
530 2004-09-17 Alan Modra <amodra@bigpond.net.au>
532 * Makefile.am: Run "make dep-am".
533 * Makefile.in: Regenerate.
534 * aclocal.m4: Regenerate.
535 * configure: Regenerate.
536 * po/POTFILES.in: Regenerate.
537 * po/opcodes.pot: Regenerate.
539 2004-09-11 Andreas Schwab <schwab@suse.de>
541 * configure: Rebuild.
543 2004-09-09 Segher Boessenkool <segher@kernel.crashing.org>
545 * ppc-opc.c (L): Make this field not optional.
547 2004-09-03 Tomer Levi <Tomer.Levi@nsc.com>
549 * opc-crx.c: Rename 'popma' to 'popa', remove 'pushma'.
550 Fix parameter to 'm[t|f]csr' insns.
552 2004-08-30 Nathanael Nerode <neroden@gcc.gnu.org>
554 * configure.in: Autoupdate to autoconf 2.59.
555 * aclocal.m4: Rebuild with aclocal 1.4p6.
556 * configure: Rebuild with autoconf 2.59.
557 * Makefile.in: Rebuild with automake 1.4p6 (picking up
558 bfd changes for autoconf 2.59 on the way).
559 * config.in: Rebuild with autoheader 2.59.
561 2004-08-27 Richard Sandiford <rsandifo@redhat.com>
563 * frv-desc.[ch], frv-opc.[ch]: Regenerated.
565 2004-07-30 Michal Ludvig <mludvig@suse.cz>
567 * i386-dis.c (GRPPADLCK): Renamed to GRPPADLCK1
568 (GRPPADLCK2): New define.
569 (twobyte_has_modrm): True for 0xA6.
570 (grps): GRPPADLCK2 for opcode 0xA6.
572 2004-07-29 Alexandre Oliva <aoliva@redhat.com>
574 Introduce SH2a support.
575 * sh-opc.h (arch_sh2a_base): Renumber.
576 (arch_sh2a_nofpu_base): Remove.
577 (arch_sh_base_mask): Adjust.
578 (arch_opann_mask): New.
579 (arch_sh2a, arch_sh2a_nofpu): Adjust.
580 (arch_sh2a_up, arch_sh2a_nofpu_up): Likewise.
581 (sh_table): Adjust whitespace.
582 2004-02-24 Corinna Vinschen <vinschen@redhat.com>
583 * sh-opc.h (arch_sh2a_nofpu_up): New. Use instead of arch_sh2a_up in
584 instruction list throughout.
585 (arch_sh2a_up): Redefine to include fpu instruction set. Use instead
586 of arch_sh2a in instruction list throughout.
587 (arch_sh2e_up): Accomodate above changes.
588 (arch_sh2_up): Ditto.
589 2004-02-20 Corinna Vinschen <vinschen@redhat.com>
590 * sh-opc.h: Add arch_sh2a_nofpu to arch_sh2_up.
591 2004-02-18 Corinna Vinschen <vinschen@redhat.com>
592 * sh-dis.c (print_insn_sh): Add bfd_mach_sh2a_nofpu handling.
593 * sh-opc.h (arch_sh2a_nofpu): New.
594 (arch_sh2a_up): New, defines sh2a and sh2a_nofpu.
595 (sh_table): Change all arch_sh2a to arch_sh2a_up unless FPU
597 2004-01-20 DJ Delorie <dj@redhat.com>
598 * sh-dis.c (print_insn_sh): SH2A does not have 'X' fp regs.
599 2003-12-29 DJ Delorie <dj@redhat.com>
600 * sh-opc.c (sh_nibble_type, sh_arg_type, arch_2a, arch_2e_up,
601 sh_opcode_info, sh_table): Add sh2a support.
602 (arch_op32): New, to tag 32-bit opcodes.
603 * sh-dis.c (print_insn_sh): Support sh2a opcodes.
604 2003-12-02 Michael Snyder <msnyder@redhat.com>
605 * sh-opc.h (arch_sh2a): Add.
606 * sh-dis.c (arch_sh2a): Handle.
607 * sh-opc.h (arch_sh2_up): Fix up to include arch_sh2a.
609 2004-07-27 Tomer Levi <Tomer.Levi@nsc.com>
611 * crx-opc.c: Add popx,pushx insns. Indent code, fix comments.
613 2004-07-22 Nick Clifton <nickc@redhat.com>
616 * h8300-dis.c (bfd_h8_disassemble): Do not dump raw bytes for the
617 insns - this is done by objdump itself.
618 * h8500-dis.c (print_insn_h8500): Likewise.
620 2004-07-21 Jan Beulich <jbeulich@novell.com>
622 * i386-dis.c (OP_E): Show rip-relative addressing in 64-bit mode
623 regardless of address size prefix in effect.
624 (ptr_reg): Size or address registers does not depend on rex64, but
625 on the presence of an address size override.
626 (OP_MMX): Use rex.x only for xmm registers.
627 (OP_EM): Use rex.z only for xmm registers.
629 2004-07-20 Maciej W. Rozycki <macro@linux-mips.org>
631 * mips-opc.c (mips_builtin_opcodes): Move coprocessor 2
632 move/branch operations to the bottom so that VR5400 multimedia
633 instructions take precedence in disassembly.
635 2004-07-20 Maciej W. Rozycki <macro@linux-mips.org>
637 * mips-opc.c (mips_builtin_opcodes): Remove the MIPS32
638 ISA-specific "break" encoding.
640 2004-07-13 Elvis Chiang <elvisfb@gmail.com>
642 * arm-opc.h: Fix typo in comment.
644 2004-07-11 Andreas Schwab <schwab@suse.de>
646 * m68k-dis.c (m68k_valid_ea): Fix typos in last change.
648 2004-07-09 Andreas Schwab <schwab@suse.de>
650 * m68k-dis.c (m68k_valid_ea): Check validity of all codes.
652 2004-07-07 Tomer Levi <Tomer.Levi@nsc.com>
654 * Makefile.am (CFILES): Add crx-dis.c, crx-opc.c.
655 (ALL_MACHINES): Add crx-dis.lo, crx-opc.lo.
656 (crx-dis.lo): New target.
657 (crx-opc.lo): Likewise.
658 * Makefile.in: Regenerate.
659 * configure.in: Handle bfd_crx_arch.
660 * configure: Regenerate.
661 * crx-dis.c: New file.
662 * crx-opc.c: New file.
663 * disassemble.c (ARCH_crx): Define.
664 (disassembler): Handle ARCH_crx.
666 2004-06-29 James E Wilson <wilson@specifixinc.com>
668 * ia64-opc-a.c (ia64_opcodes_a): Delete mov immediate pseudo for adds.
669 * ia64-asmtab.c: Regnerate.
671 2004-06-28 Alan Modra <amodra@bigpond.net.au>
673 * ppc-opc.c (insert_fxm): Handle mfocrf and mtocrf.
674 (extract_fxm): Don't test dialect.
675 (XFXFXM_MASK): Include the power4 bit.
676 (XFXM): Add p4 param.
677 (powerpc_opcodes): Add mfocrf and mtocrf. Adjust mtcr.
679 2004-06-27 Alexandre Oliva <aoliva@redhat.com>
681 2003-07-21 Richard Sandiford <rsandifo@redhat.com>
682 * disassemble.c (disassembler): Handle bfd_mach_h8300sxn.
684 2004-06-26 Alan Modra <amodra@bigpond.net.au>
686 * ppc-opc.c (BH, XLBH_MASK): Define.
687 (powerpc_opcodes): Allow BH field on bclr, bclrl, bcctr, bcctrl.
689 2004-06-24 Alan Modra <amodra@bigpond.net.au>
691 * i386-dis.c (x_mode): Comment.
692 (two_source_ops): File scope.
693 (float_mem): Correct fisttpll and fistpll.
694 (float_mem_mode): New table.
696 (OP_E): Correct intel mode PTR output.
697 (ptr_reg): Use open_char and close_char.
698 (PNI_Fixup): Handle possible suffix on sidt. Use op1out etc. for
699 operands. Set two_source_ops.
701 2004-06-15 Alan Modra <amodra@bigpond.net.au>
703 * arc-ext.c (build_ARC_extmap): Use bfd_get_section_size
704 instead of _raw_size.
706 2004-06-08 Jakub Jelinek <jakub@redhat.com>
708 * ia64-gen.c (in_iclass): Handle more postinc st
710 * ia64-asmtab.c: Rebuilt.
712 2004-06-01 Martin Schwidefsky <schwidefsky@de.ibm.com>
714 * s390-opc.txt: Correct architecture mask for some opcodes.
715 lrv, lrvh, strv, ml, dl, alc, slb rll and mvclu are available
716 in the esa mode as well.
718 2004-05-28 Andrew Stubbs <andrew.stubbs@superh.com>
720 * sh-dis.c (target_arch): Make unsigned.
721 (print_insn_sh): Replace (most of) switch with a call to
722 sh_get_arch_from_bfd_mach(). Also use new architecture flags system.
723 * sh-opc.h: Redefine architecture flags values.
724 Add sh3-nommu architecture.
725 Reorganise <arch>_up macros so they make more visual sense.
726 (SH_MERGE_ARCH_SET): Define new macro.
727 (SH_VALID_BASE_ARCH_SET): Likewise.
728 (SH_VALID_MMU_ARCH_SET): Likewise.
729 (SH_VALID_CO_ARCH_SET): Likewise.
730 (SH_VALID_ARCH_SET): Likewise.
731 (SH_MERGE_ARCH_SET_VALID): Likewise.
732 (SH_ARCH_SET_HAS_FPU): Likewise.
733 (SH_ARCH_SET_HAS_DSP): Likewise.
734 (SH_ARCH_UNKNOWN_ARCH): Likewise.
735 (sh_get_arch_from_bfd_mach): Add prototype.
736 (sh_get_arch_up_from_bfd_mach): Likewise.
737 (sh_get_bfd_mach_from_arch_set): Likewise.
738 (sh_merge_bfd_arc): Likewise.
740 2004-05-24 Peter Barada <peter@the-baradas.com>
742 * m68k-dis.c(print_insn_m68k): Strip body of diassembly out
743 into new match_insn_m68k function. Loop over canidate
744 matches and select first that completely matches.
745 * m68k-dis.c(print_insn_arg): Fix 'g' case to only extract 1 bit.
746 * m68k-dis.c(print_insn_arg): Call new function m68k_valid_ea
747 to verify addressing for MAC/EMAC.
748 * m68k-dis.c(print_insn_arg): Use reg_half_names for MAC/EMAC
749 reigster halves since 'fpu' and 'spl' look misleading.
750 * m68k-dis.c(fetch_arg): Fix 'G', 'H', 'I', 'f', 'M', 'N' cases.
751 * m68k-opc.c: Rearragne mac/emac cases to use longest for
752 first, tighten up match masks.
753 * m68k-opc.c: Add 'size' field to struct m68k_opcode. Produce
754 'size' from special case code in print_insn_m68k to
755 determine decode size of insns.
757 2004-05-19 Alan Modra <amodra@bigpond.net.au>
759 * ppc-opc.c (insert_fxm): Enable two operand mfcr when -many as
760 well as when -mpower4.
762 2004-05-13 Nick Clifton <nickc@redhat.com>
764 * po/fr.po: Updated French translation.
766 2004-05-05 Peter Barada <peter@the-baradas.com>
768 * m68k-dis.c(print_insn_m68k): Add new chips, use core
769 variants in arch_mask. Only set m68881/68851 for 68k chips.
770 * m68k-op.c: Switch from ColdFire chips to core variants.
772 2004-05-05 Alan Modra <amodra@bigpond.net.au>
775 * ppc-opc.c (PPCVEC): Remove PPC_OPCODE_PPC.
777 2004-04-29 Ben Elliston <bje@au.ibm.com>
779 * ppc-opc.c (XCMPL): Renmame to XOPL. Update users.
780 (powerpc_opcodes): Add "dbczl" instruction for PPC970.
782 2004-04-22 Kaz Kojima <kkojima@rr.iij4u.or.jp>
784 * sh-dis.c (print_insn_sh): Print the value in constant pool
785 as a symbol if it looks like a symbol.
787 2004-04-22 Peter Barada <peter@the-baradas.com>
789 * m68k-dis.c(print_insn_m68k): Set mfcmac/mcfemac on
790 appropriate ColdFire architectures.
791 (print_insn_m68k): Handle EMAC, MAC/EMAC scalefactor, and MAC/EMAC
793 Add EMAC instructions, fix MAC instructions. Remove
794 macmw/macml/msacmw/msacml instructions since mask addressing now
797 2004-04-20 Jakub Jelinek <jakub@redhat.com>
799 * sparc-opc.c (fmoviccx, fmovfccx, fmovccx): Define.
800 (fmovicc, fmovfcc, fmovcc): Remove fpsize argument, change opcode to
801 suffix. Use fmov*x macros, create all 3 fpsize variants in one
802 macro. Adjust all users.
804 2004-04-15 Anil Paranjpe <anilp1@kpitcummins.com>
806 * h8300-dis.c (bfd_h8_disassemble) : Treat "adds" & "subs"
809 2004-03-30 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
811 * m32r-asm.c: Regenerate.
813 2004-03-29 Stan Shebs <shebs@apple.com>
815 * mpw-config.in, mpw-make.sed: Remove MPW support files, no longer
818 2004-03-19 Alan Modra <amodra@bigpond.net.au>
820 * aclocal.m4: Regenerate.
821 * config.in: Regenerate.
822 * configure: Regenerate.
823 * po/POTFILES.in: Regenerate.
824 * po/opcodes.pot: Regenerate.
826 2004-03-16 Alan Modra <amodra@bigpond.net.au>
828 * ppc-dis.c (print_insn_powerpc): Don't print tabs. Handle
830 * ppc-opc.c (RA0): Define.
831 (RAQ, RAL, RAM, RAS, RSQ, RTQ, RSO): Use PPC_OPERAND_GPR_0.
832 (RAOPT): Rename from RAO. Update all uses.
833 (powerpc_opcodes): Use RA0 as appropriate.
835 2004-03-15 Aldy Hernandez <aldyh@redhat.com>
837 * ppc-opc.c (powerpc_opcodes): Add BOOKE versions of mfsprg.
839 2004-03-15 Alan Modra <amodra@bigpond.net.au>
841 * sparc-dis.c (print_insn_sparc): Update getword prototype.
843 2004-03-12 Michal Ludvig <mludvig@suse.cz>
845 * i386-dis.c (GRPPLOCK): Delete.
846 (grps): Delete GRPPLOCK entry.
848 2004-03-12 Alan Modra <amodra@bigpond.net.au>
850 * i386-dis.c (OP_M, OP_0f0e, OP_0fae, NOP_Fixup): New functions.
852 (None, PADLOCK_SPECIAL, PADLOCK_0): Delete.
854 (dis386): Use NOP_Fixup on "nop".
855 (dis386_twobyte): Use GRPPADLCK on opcode 0xa7.
856 (twobyte_has_modrm): Set for 0xa7.
857 (padlock_table): Delete. Move to..
858 (grps): ..here, using OP_0f07. Use OP_Ofae on lfence, mfence
860 (print_insn): Revert PADLOCK_SPECIAL code.
861 (OP_E): Delete sfence, lfence, mfence checks.
863 2004-03-12 Jakub Jelinek <jakub@redhat.com>
865 * i386-dis.c (grps): Use INVLPG_Fixup instead of OP_E for invlpg.
866 (INVLPG_Fixup): New function.
867 (PNI_Fixup): Remove ATTRIBUTE_UNUSED from sizeflag.
869 2004-03-12 Michal Ludvig <mludvig@suse.cz>
871 * i386-dis.c (PADLOCK_SPECIAL, PADLOCK_0): New defines.
872 (dis386_twobyte): Opcode 0xa7 is PADLOCK_0.
873 (padlock_table): New struct with PadLock instructions.
874 (print_insn): Handle PADLOCK_SPECIAL.
876 2004-03-12 Alan Modra <amodra@bigpond.net.au>
878 * i386-dis.c (grps): Use clflush by default for 0x0fae/7.
879 (OP_E): Twiddle clflush to sfence here.
881 2004-03-08 Nick Clifton <nickc@redhat.com>
883 * po/de.po: Updated German translation.
885 2003-03-03 Andrew Stubbs <andrew.stubbs@superh.com>
887 * sh-dis.c (print_insn_sh): Don't disassemble fp instructions in
888 nofpu mode. Add BFD type bfd_mach_sh4_nommu_nofpu.
889 * sh-opc.h: Add sh4_nommu_nofpu architecture and adjust instructions
892 2004-03-01 Richard Sandiford <rsandifo@redhat.com>
894 * frv-asm.c: Regenerate.
895 * frv-desc.c: Regenerate.
896 * frv-desc.h: Regenerate.
897 * frv-dis.c: Regenerate.
898 * frv-ibld.c: Regenerate.
899 * frv-opc.c: Regenerate.
900 * frv-opc.h: Regenerate.
902 2004-03-01 Richard Sandiford <rsandifo@redhat.com>
904 * frv-desc.c, frv-opc.c: Regenerate.
906 2004-03-01 Richard Sandiford <rsandifo@redhat.com>
908 * frv-desc.c, frv-opc.c, frv-opc.h: Regenerate.
910 2004-02-26 Andrew Stubbs <andrew.stubbs@superh.com>
912 * sh-opc.h: Move fsca and fsrra instructions from sh4a to sh4.
913 Also correct mistake in the comment.
915 2004-02-26 Andrew Stubbs <andrew.stubbs@superh.com>
917 * sh-dis.c (print_insn_sh): Add REG_N_D nibble type to
918 ensure that double registers have even numbers.
919 Add REG_N_B01 for nn01 (binary 01) nibble to ensure
920 that reserved instruction 0xfffd does not decode the same
922 * sh-opc.h: Add REG_N_D nibble type and use it whereever
923 REG_N refers to a double register.
924 Add REG_N_B01 nibble type and use it instead of REG_NM
926 Adjust the bit patterns in a few comments.
928 2004-02-25 Aldy Hernandez <aldyh@redhat.com>
930 * ppc-opc.c (powerpc_opcodes): Change mask for dcbt and dcbtst.
932 2004-02-20 Aldy Hernandez <aldyh@redhat.com>
934 * ppc-opc.c (powerpc_opcodes): Move mfmcsrr0 before mfdc_dat.
936 2004-02-20 Aldy Hernandez <aldyh@redhat.com>
938 * ppc-opc.c (powerpc_opcodes): Add m*ivor35.
940 2004-02-20 Aldy Hernandez <aldyh@redhat.com>
942 * ppc-opc.c (powerpc_opcodes): Add mfivor32, mfivor33, mfivor34,
943 mtivor32, mtivor33, mtivor34.
945 2004-02-19 Aldy Hernandez <aldyh@redhat.com>
947 * ppc-opc.c (powerpc_opcodes): Add mfmcar.
949 2004-02-10 Petko Manolov <petkan@nucleusys.com>
951 * arm-opc.h Maverick accumulator register opcode fixes.
953 2004-02-13 Ben Elliston <bje@wasabisystems.com>
955 * m32r-dis.c: Regenerate.
957 2004-01-27 Michael Snyder <msnyder@redhat.com>
959 * sh-opc.h (sh_table): "fsrra", not "fssra".
961 2004-01-23 Andrew Over <andrew.over@cs.anu.edu.au>
963 * sparc-opc.c (fdtox, fstox, fqtox, fxtod, fxtos, fxtoq): Tighten
966 2004-01-19 Andrew Over <andrew.over@cs.anu.edu.au>
968 * sparc-opc.c (sparc_opcodes) <f[dsq]tox, fxto[dsq]>: Fix args.
970 2004-01-19 Alan Modra <amodra@bigpond.net.au>
972 * i386-dis.c (OP_E): Print scale factor on intel mode sib when not
973 1. Don't print scale factor on AT&T mode when index missing.
975 2004-01-16 Alexandre Oliva <aoliva@redhat.com>
977 * m10300-opc.c (mov): 8- and 24-bit immediates are zero-extended
978 when loaded into XR registers.
980 2004-01-14 Richard Sandiford <rsandifo@redhat.com>
982 * frv-desc.h: Regenerate.
983 * frv-desc.c: Regenerate.
984 * frv-opc.c: Regenerate.
986 2004-01-13 Michael Snyder <msnyder@redhat.com>
988 * sh-dis.c (print_insn_sh): Allocate 4 bytes for insn.
990 2004-01-09 Paul Brook <paul@codesourcery.com>
992 * arm-opc.h (arm_opcodes): Move generic mcrr after known
995 2004-01-07 Daniel Jacobowitz <drow@mvista.com>
997 * Makefile.am (libopcodes_la_DEPENDENCIES)
998 (libopcodes_la_LIBADD): Revert 2003-05-17 change. Add explanatory
999 comment about the problem.
1000 * Makefile.in: Regenerate.
1002 2004-01-06 Alexandre Oliva <aoliva@redhat.com>
1004 2003-12-19 Alexandre Oliva <aoliva@redhat.com>
1005 * frv-asm.c (parse_ulo16, parse_uhi16, parse_d12): Fix some
1006 cut&paste errors in shifting/truncating numerical operands.
1007 2003-08-04 Alexandre Oliva <aoliva@redhat.com>
1008 * frv-asm.c (parse_ulo16): Parse gotofflo and gotofffuncdesclo.
1009 (parse_uslo16): Likewise.
1010 (parse_uhi16): Parse gotoffhi and gotofffuncdeschi.
1011 (parse_d12): Parse gotoff12 and gotofffuncdesc12.
1012 (parse_s12): Likewise.
1013 2003-08-04 Alexandre Oliva <aoliva@redhat.com>
1014 * frv-asm.c (parse_ulo16): Parse gotlo and gotfuncdesclo.
1015 (parse_uslo16): Likewise.
1016 (parse_uhi16): Parse gothi and gotfuncdeschi.
1017 (parse_d12): Parse got12 and gotfuncdesc12.
1018 (parse_s12): Likewise.
1020 2004-01-02 Albert Bartoszko <albar@nt.kegel.com.pl>
1022 * msp430-dis.c (msp430_doubleoperand): Check for an 'add'
1023 instruction which looks similar to an 'rla' instruction.
1025 For older changes see ChangeLog-0203
1031 version-control: never