1 2005-08-18 Alan Modra <amodra@bigpond.net.au>
3 * Makefile.am: Remove a29k support.
4 * configure.in: Likewise.
5 * disassemble.c: Likewise.
6 * Makefile.in: Regenerate.
7 * configure: Regenerate.
8 * po/POTFILES.in: Regenerate.
10 2005-08-15 Daniel Jacobowitz <dan@codesourcery.com>
12 * ppc-dis.c (powerpc_dialect): Handle e300.
13 (print_ppc_disassembler_options): Likewise.
14 * ppc-opc.c (PPCE300): Define.
15 (powerpc_opcodes): Mark icbt as available for the e300.
17 2005-08-13 John David Anglin <dave.anglin@nrc-cnrc.gc.ca>
19 * hppa-dis.c (print_insn_hppa): Don't print '%' before register names.
20 Use "rp" instead of "%r2" in "b,l" insns.
22 2005-08-12 Martin Schwidefsky <schwidefsky@de.ibm.com>
24 * s390-dis.c (print_insn_s390): Print unsigned operands with %u.
25 * s390-mkopc.c (s390_opcode_cpu_val): Add support for cpu type z9-109.
27 * s390-opc.c (I32_16, U32_16, M_16): Add defines 32 bit immediates
28 and 4 bit optional masks.
29 (INSTR_RIL_RI, INSTR_RIL_RU, INSTR_RRF_M0RR, INSTR_RSE_CCRD,
30 INSTR_RSY_CCRD, INSTR_SSF_RRDRD): Add new instruction formats.
31 (MASK_RIL_RI, MASK_RIL_RU, MASK_RRF_M0RR, MASK_RSE_CCRD,
32 MASK_RSY_CCRD, MASK_SSF_RRDRD): Likewise.
33 (s390_opformats): Likewise.
34 * s390-opc.txt: Add new instructions for cpu type z9-109.
36 2005-08-05 John David Anglin <dave.anglin@nrc-crnc.gc.ca>
38 * hppa-dis.c (print_insn_hppa): Prefix 21-bit values with "L%".
40 2005-07-29 Paul Brook <paul@codesourcery.com>
42 * arm-dis.c: Fix disassebly of thumb2 writeback addressing modes.
44 2005-07-29 Paul Brook <paul@codesourcery.com>
46 * arm-dis.c (thumb32_opc): Fix addressing mode for tbh.
47 (print_insn_thumb32): Fix decoding of thumb2 'I' operands.
49 2005-07-25 DJ Delorie <dj@redhat.com>
51 * m32c-asm.c Regenerate.
52 * m32c-dis.c Regenerate.
54 2005-07-20 DJ Delorie <dj@redhat.com>
56 * disassemble.c (disassemble_init_for_target): M32C ISAs are
57 enums, so convert them to bit masks, which attributes are.
59 2005-07-18 Nick Clifton <nickc@redhat.com>
61 * configure.in: Restore alpha ordering to list of arches.
62 * configure: Regenerate.
63 * disassemble.c: Restore alpha ordering to list of arches.
65 2005-07-18 Nick Clifton <nickc@redhat.com>
67 * m32c-asm.c: Regenerate.
68 * m32c-desc.c: Regenerate.
69 * m32c-desc.h: Regenerate.
70 * m32c-dis.c: Regenerate.
71 * m32c-ibld.h: Regenerate.
72 * m32c-opc.c: Regenerate.
73 * m32c-opc.h: Regenerate.
75 2005-07-18 H.J. Lu <hongjiu.lu@intel.com>
77 * i386-dis.c (PNI_Fixup): Update comment.
78 (VMX_Fixup): Properly handle the suffix check.
80 2005-07-16 John David Anglin <dave.anglin@nrc-cnrc.gc.ca>
82 * hppa-dis.c (print_insn_hppa): Add space after 'w' in wide-mode
85 2005-07-16 Alan Modra <amodra@bigpond.net.au>
87 * Makefile.am: Run "make dep-am".
88 (stamp-m32c): Fix cpu dependencies.
89 * Makefile.in: Regenerate.
90 * ip2k-dis.c: Regenerate.
92 2007-07-15 H.J. Lu <hongjiu.lu@intel.com>
94 * i386-dis.c (OP_VMX): New. Handle Intel VMX Instructions.
95 (VMX_Fixup): New. Fix up Intel VMX Instructions.
99 (dis386_twobyte): Updated entries 0x78 and 0x79.
100 (twobyte_has_modrm): Likewise.
101 (grps): Use OP_VMX in the "sgdtIQ" entry. Updated GRP9.
102 (OP_G): Handle m_mode.
104 2005-07-14 Jim Blandy <jimb@redhat.com>
106 Add support for the Renesas M32C and M16C.
107 * m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c, m32c-opc.c: New.
108 * m32c-desc.h, m32c-opc.h: New.
109 * Makefile.am (HFILES): List m32c-desc.h and m32c-opc.h.
110 (CFILES): List m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c,
112 (ALL_MACHINES): List m32c-asm.lo, m32c-desc.lo, m32c-dis.lo,
113 m32c-ibld.lo, m32c-opc.lo.
114 (CLEANFILES): List stamp-m32c.
115 (M32C_DEPS): List stamp-m32c, if CGEN_MAINT.
116 (CGEN_CPUS): Add m32c.
117 (m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c, m32c-opc.c)
118 (m32c-desc.h, m32c-opc.h): Depend on M32C_DEPS.
119 (m32c_opc_h): New variable.
120 (stamp-m32c, m32c-asm.lo, m32c-desc.lo, m32c-dis.lo, m32c-ibld.lo)
121 (m32c-opc.lo): New rules.
122 * Makefile.in: Regenerated.
123 * configure.in: Add case for bfd_m32c_arch.
124 * configure: Regenerated.
125 * disassemble.c (ARCH_m32c): New.
126 [ARCH_m32c]: #include "m32c-desc.h".
127 (disassembler) [ARCH_m32c]: Add case for bfd_arch_m32c.
128 (disassemble_init_for_target) [ARCH_m32c]: Same.
130 * cgen-ops.h, cgen-types.h: New files.
131 * Makefile.am (HFILES): List them.
132 * Makefile.in: Regenerated.
134 2005-07-07 Kaveh R. Ghazi <ghazi@caip.rutgers.edu>
136 * arc-dis.c, arm-dis.c, cris-dis.c, crx-dis.c, d10v-dis.c,
137 d30v-dis.c, fr30-dis.c, h8300-dis.c, h8500-dis.c, i860-dis.c,
138 ia64-dis.c, ip2k-dis.c, m10200-dis.c, m10300-dis.c,
139 m88k-dis.c, mcore-dis.c, mips-dis.c, ms1-dis.c, or32-dis.c,
140 ppc-dis.c, sh64-dis.c, sparc-dis.c, tic4x-dis.c, tic80-dis.c,
141 v850-dis.c: Fix format bugs.
142 * ia64-gen.c (fail, warn): Add format attribute.
143 * or32-opc.c (debug): Likewise.
145 2005-07-07 Khem Raj <kraj@mvista.com>
147 * arm-dis.c (opcode32 arm_opcodes): Fix ARM VFP fadds instruction
150 2005-07-06 Alan Modra <amodra@bigpond.net.au>
152 * Makefile.am (stamp-m32r): Fix path to cpu files.
153 (stamp-m32r, stamp-iq2000): Likewise.
154 * Makefile.in: Regenerate.
155 * m32r-asm.c: Regenerate.
156 * po/POTFILES.in: Remove arm-opc.h. Add ms1-asm.c, ms1-desc.c,
157 ms1-desc.h, ms1-dis.c, ms1-ibld.c, ms1-opc.c, ms1-opc.h.
159 2005-07-05 Nick Clifton <nickc@redhat.com>
161 * iq2000-asm.c: Regenerate.
162 * ms1-asm.c: Regenerate.
164 2005-07-05 Jan Beulich <jbeulich@novell.com>
166 * i386-dis.c (SVME_Fixup): New.
167 (grps): Use it for the lidt entry.
168 (PNI_Fixup): Call OP_M rather than OP_E.
169 (INVLPG_Fixup): Likewise.
171 2005-07-04 H.J. Lu <hongjiu.lu@intel.com>
173 * tic30-dis.c (cnvt_tmsfloat_ieee): Use HUGE_VALF if defined.
175 2005-07-01 Nick Clifton <nickc@redhat.com>
177 * a29k-dis.c: Update to ISO C90 style function declarations and
179 * alpha-opc.c: Likewise.
180 * arc-dis.c: Likewise.
181 * arc-opc.c: Likewise.
182 * avr-dis.c: Likewise.
183 * cgen-asm.in: Likewise.
184 * cgen-dis.in: Likewise.
185 * cgen-ibld.in: Likewise.
186 * cgen-opc.c: Likewise.
187 * cris-dis.c: Likewise.
188 * d10v-dis.c: Likewise.
189 * d30v-dis.c: Likewise.
190 * d30v-opc.c: Likewise.
191 * dis-buf.c: Likewise.
192 * dlx-dis.c: Likewise.
193 * h8300-dis.c: Likewise.
194 * h8500-dis.c: Likewise.
195 * hppa-dis.c: Likewise.
196 * i370-dis.c: Likewise.
197 * i370-opc.c: Likewise.
198 * m10200-dis.c: Likewise.
199 * m10300-dis.c: Likewise.
200 * m68k-dis.c: Likewise.
201 * m88k-dis.c: Likewise.
202 * mips-dis.c: Likewise.
203 * mmix-dis.c: Likewise.
204 * msp430-dis.c: Likewise.
205 * ns32k-dis.c: Likewise.
206 * or32-dis.c: Likewise.
207 * or32-opc.c: Likewise.
208 * pdp11-dis.c: Likewise.
209 * pj-dis.c: Likewise.
210 * s390-dis.c: Likewise.
211 * sh-dis.c: Likewise.
212 * sh64-dis.c: Likewise.
213 * sparc-dis.c: Likewise.
214 * sparc-opc.c: Likewise.
215 * sysdep.h: Likewise.
216 * tic30-dis.c: Likewise.
217 * tic4x-dis.c: Likewise.
218 * tic80-dis.c: Likewise.
219 * v850-dis.c: Likewise.
220 * v850-opc.c: Likewise.
221 * vax-dis.c: Likewise.
222 * w65-dis.c: Likewise.
223 * z8kgen.c: Likewise.
225 * fr30-*: Regenerate.
227 * ip2k-*: Regenerate.
228 * iq2000-*: Regenerate.
229 * m32r-*: Regenerate.
231 * openrisc-*: Regenerate.
232 * xstormy16-*: Regenerate.
234 2005-06-23 Ben Elliston <bje@gnu.org>
236 * m68k-dis.c: Use ISC C90.
237 * m68k-opc.c: Formatting fixes.
239 2005-06-16 David Ung <davidu@mips.com>
241 * mips16-opc.c (mips16_opcodes): Add the following MIPS16e
242 instructions to the table; seb/seh/sew/zeb/zeh/zew.
244 2005-06-15 Dave Brolley <brolley@redhat.com>
246 Contribute Morpho ms1 on behalf of Red Hat
247 * ms1-asm.c, ms1-desc.c, ms1-dis.c, ms1-ibld.c, ms1-opc.c,
248 ms1-opc.h: New files, Morpho ms1 target.
250 2004-05-14 Stan Cox <scox@redhat.com>
252 * disassemble.c (ARCH_ms1): Define.
253 (disassembler): Handle bfd_arch_ms1
255 2004-05-13 Michael Snyder <msnyder@redhat.com>
257 * Makefile.am, Makefile.in: Add ms1 target.
258 * configure.in: Ditto.
260 2005-06-08 Zack Weinberg <zack@codesourcery.com>
262 * arm-opc.h: Delete; fold contents into ...
263 * arm-dis.c: ... here. Move includes of internal COFF headers
264 next to includes of internal ELF headers.
265 (streq, WORD_ADDRESS, BDISP, BDISP23): Delete, unused.
266 (struct arm_opcode): Rename struct opcode32. Make 'assembler' const.
267 (struct thumb_opcode): Rename struct opcode16. Make 'assembler' const.
268 (arm_conditional, arm_fp_const, arm_shift, arm_regname, regnames)
269 (iwmmxt_wwnames, iwmmxt_wwssnames):
271 (regnames): Remove iWMMXt coprocessor register sets.
272 (iwmmxt_regnames, iwmmxt_cregnames): New statics.
273 (get_arm_regnames): Adjust fourth argument to match above changes.
274 (set_iwmmxt_regnames): Delete.
275 (print_insn_arm): Constify 'c'. Use ISO syntax for function
276 pointer calls. Expand sole use of BDISP. Use iwmmxt_regnames
277 and iwmmxt_cregnames, not set_iwmmxt_regnames.
278 (print_insn_thumb16, print_insn_thumb32): Constify 'c'. Use
279 ISO syntax for function pointer calls.
281 2005-06-07 Zack Weinberg <zack@codesourcery.com>
283 * arm-dis.c: Split up the comments describing the format codes, so
284 that the ARM and 16-bit Thumb opcode tables each have comments
285 preceding them that describe all the codes, and only the codes,
286 valid in those tables. (32-bit Thumb table is already like this.)
287 Reorder the lists in all three comments to match the order in
288 which the codes are implemented.
289 Remove all forward declarations of static functions. Convert all
290 function definitions to ISO C format.
291 (print_insn_arm, print_insn_thumb16, print_insn_thumb32):
293 (print_insn_thumb16): Remove unused case 'I'.
294 (print_insn): Update for changed calling convention of subroutines.
296 2005-05-25 Jan Beulich <jbeulich@novell.com>
298 * i386-dis.c (OP_E): In Intel mode, display 32-bit displacements in
299 hex (but retain it being displayed as signed). Remove redundant
300 checks. Add handling of displacements for 16-bit addressing in Intel
303 2005-05-25 Jan Beulich <jbeulich@novell.com>
305 * i386-dis.c (prefix_name): Remove pointless mode_64bit check.
306 (OP_E): Remove redundant REX_EXTZ handling. Remove pointless
307 masking of 'rm' in 16-bit memory address handling.
309 2005-05-19 Anton Blanchard <anton@samba.org>
311 * ppc-dis.c (powerpc_dialect): Handle "-Mpower5".
312 (print_ppc_disassembler_options): Document it.
313 * ppc-opc.c (SVC_LEV): Define.
314 (LEV): Allow optional operand.
316 (powerpc_opcodes): Extend "sc". Adjust "svc" and "svcl". Add
317 "hrfid", "popcntb", "fsqrtes", "fsqrtes.", "fre" and "fre.".
319 2005-05-19 Kelley Cook <kcook@gcc.gnu.org>
321 * Makefile.in: Regenerate.
323 2005-05-17 Zack Weinberg <zack@codesourcery.com>
325 * arm-dis.c (thumb_opcodes): Add disassembly for V6T2 16-bit
326 instructions. Adjust disassembly of some opcodes to match
328 (thumb32_opcodes): New table.
329 (print_insn_thumb): Rename print_insn_thumb16; don't handle
330 two-halfword branches here.
331 (print_insn_thumb32): New function.
332 (print_insn): Choose among print_insn_arm, print_insn_thumb16,
333 and print_insn_thumb32. Be consistent about order of
334 halfwords when printing 32-bit instructions.
336 2005-05-07 H.J. Lu <hongjiu.lu@intel.com>
339 * i386-dis.c (branch_v_mode): New.
340 (indirEv): Use branch_v_mode instead of v_mode.
341 (OP_E): Handle branch_v_mode.
343 2005-05-07 H.J. Lu <hongjiu.lu@intel.com>
345 * d10v-dis.c (dis_2_short): Support 64bit host.
347 2005-05-07 Nick Clifton <nickc@redhat.com>
349 * po/nl.po: Updated translation.
351 2005-05-07 Nick Clifton <nickc@redhat.com>
353 * Update the address and phone number of the FSF organization in
354 the GPL notices in the following files:
355 a29k-dis.c, aclocal.m4, alpha-dis.c, alpha-opc.c, arc-dis.c,
356 arc-dis.h, arc-ext.c, arc-ext.h, arc-opc.c, arm-dis.c, arm-opc.h,
357 avr-dis.c, cgen-asm.c, cgen-asm.in, cgen-dis.c, cgen-dis.in,
358 cgen-ibld.in, cgen-opc.c, cgen.sh, cris-dis.c, cris-opc.c,
359 crx-dis.c, crx-opc.c, d10v-dis.c, d10v-opc.c, d30v-dis.c,
360 d30v-opc.c, dis-buf.c, dis-init.c, disassemble.c, dlx-dis.c,
361 fr30-asm.c, fr30-desc.c, fr30-desc.h, fr30-dis.c, fr30-ibld.c,
362 fr30-opc.c, fr30-opc.h, frv-asm.c, frv-desc.c, frv-desc.h,
363 frv-dis.c, frv-ibld.c, frv-opc.c, frv-opc.h, h8300-dis.c,
364 h8500-dis.c, h8500-opc.h, hppa-dis.c, i370-dis.c, i370-opc.c,
365 i386-dis.c, i860-dis.c, i960-dis.c, ia64-asmtab.h, ia64-dis.c,
366 ia64-gen.c, ia64-opc-a.c, ia64-opc-b.c, ia64-opc-d.c,
367 ia64-opc-f.c, ia64-opc-i.c, ia64-opc-m.c, ia64-opc-x.c,
368 ia64-opc.c, ia64-opc.h, ip2k-asm.c, ip2k-desc.c, ip2k-desc.h,
369 ip2k-dis.c, ip2k-ibld.c, ip2k-opc.c, ip2k-opc.h, iq2000-asm.c,
370 iq2000-desc.c, iq2000-desc.h, iq2000-dis.c, iq2000-ibld.c,
371 iq2000-opc.c, iq2000-opc.h, m10200-dis.c, m10200-opc.c,
372 m10300-dis.c, m10300-opc.c, m32r-asm.c, m32r-desc.c, m32r-desc.h,
373 m32r-dis.c, m32r-ibld.c, m32r-opc.c, m32r-opc.h, m32r-opinst.c,
374 m68hc11-dis.c, m68hc11-opc.c, m68k-dis.c, m68k-opc.c, m88k-dis.c,
375 maxq-dis.c, mcore-dis.c, mcore-opc.h, mips-dis.c, mips-opc.c,
376 mips16-opc.c, mmix-dis.c, mmix-opc.c, msp430-dis.c, ns32k-dis.c,
377 openrisc-asm.c, openrisc-desc.c, openrisc-desc.h, openrisc-dis.c,
378 openrisc-ibld.c, openrisc-opc.c, openrisc-opc.h, opintl.h,
379 or32-dis.c, or32-opc.c, pdp11-dis.c, pdp11-opc.c, pj-dis.c,
380 pj-opc.c, ppc-dis.c, ppc-opc.c, s390-dis.c, s390-mkopc.c,
381 s390-opc.c, sh-dis.c, sh-opc.h, sh64-dis.c, sh64-opc.c,
382 sh64-opc.h, sparc-dis.c, sparc-opc.c, sysdep.h, tic30-dis.c,
383 tic4x-dis.c, tic54x-dis.c, tic54x-opc.c, tic80-dis.c, tic80-opc.c,
384 v850-dis.c, v850-opc.c, vax-dis.c, w65-dis.c, w65-opc.h,
385 xstormy16-asm.c, xstormy16-desc.c, xstormy16-desc.h,
386 xstormy16-dis.c, xstormy16-ibld.c, xstormy16-opc.c,
387 xstormy16-opc.h, xtensa-dis.c, z8k-dis.c, z8kgen.c
389 2005-05-05 James E Wilson <wilson@specifixinc.com>
391 * ia64-opc.c: Include sysdep.h before libiberty.h.
393 2005-05-05 Nick Clifton <nickc@redhat.com>
395 * configure.in (ALL_LINGUAS): Add vi.
396 * configure: Regenerate.
399 2005-04-26 Jerome Guitton <guitton@gnat.com>
401 * configure.in: Fix the check for basename declaration.
402 * configure: Regenerate.
404 2005-04-19 Alan Modra <amodra@bigpond.net.au>
406 * ppc-opc.c (RTO): Define.
407 (powerpc_opcodes <tlbsx, tlbsx., tlbre>): Combine PPC403 and BOOKE
408 entries to suit PPC440.
410 2005-04-18 Mark Kettenis <kettenis@gnu.org>
412 * i386-dis.c: Insert hyphens into selected VIA PadLock extensions.
415 2005-04-14 Nick Clifton <nickc@redhat.com>
417 * po/fi.po: New translation: Finnish.
418 * configure.in (ALL_LINGUAS): Add fi.
419 * configure: Regenerate.
421 2005-04-14 Alan Modra <amodra@bigpond.net.au>
423 * Makefile.am (NO_WERROR): Define.
424 * configure.in: Invoke AM_BINUTILS_WARNINGS.
425 * Makefile.in: Regenerate.
426 * aclocal.m4: Regenerate.
427 * configure: Regenerate.
429 2005-04-04 Nick Clifton <nickc@redhat.com>
431 * fr30-asm.c: Regenerate.
432 * frv-asm.c: Regenerate.
433 * iq2000-asm.c: Regenerate.
434 * m32r-asm.c: Regenerate.
435 * openrisc-asm.c: Regenerate.
437 2005-04-01 Jan Beulich <jbeulich@novell.com>
439 * i386-dis.c (PNI_Fixup): Neither mwait nor monitor have any
440 visible operands in Intel mode. The first operand of monitor is
443 2005-04-01 Jan Beulich <jbeulich@novell.com>
445 * i386-dis.c (INVLPG_Fixup): Decode rdtscp; change code to allow for
446 easier future additions.
448 2005-03-31 Jerome Guitton <guitton@gnat.com>
450 * configure.in: Check for basename.
451 * configure: Regenerate.
454 2005-03-29 H.J. Lu <hongjiu.lu@intel.com>
456 * i386-dis.c (SEG_Fixup): New.
458 (dis386): Use "Sv" for 0x8c and 0x8e.
460 2005-03-21 Jan-Benedict Glaw <jbglaw@lug-owl.de>
461 Nick Clifton <nickc@redhat.com>
463 * vax-dis.c: (entry_addr): New varible: An array of user supplied
464 function entry mask addresses.
465 (entry_addr_occupied_slots): New variable: The number of occupied
466 elements in entry_addr.
467 (entry_addr_total_slots): New variable: The total number of
468 elements in entry_addr.
469 (parse_disassembler_options): New function. Fills in the entry_addr
471 (free_entry_array): New function. Release the memory used by the
472 entry addr array. Suppressed because there is no way to call it.
473 (is_function_entry): Check if a given address is a function's
474 start address by looking at supplied entry mask addresses and
475 symbol information, if available.
476 (print_insn_vax): Use parse_disassembler_options and is_function_entry.
478 2005-03-23 H.J. Lu <hongjiu.lu@intel.com>
480 * cris-dis.c (print_with_operands): Use ~31L for long instead
483 2005-03-20 H.J. Lu <hongjiu.lu@intel.com>
485 * mmix-opc.c (O): Revert the last change.
488 2005-03-19 H.J. Lu <hongjiu.lu@intel.com>
490 * mmix-opc.c (O): Use 24UL instead of 24 for unsigned long.
493 2005-03-19 Hans-Peter Nilsson <hp@bitrange.com>
495 * mmix-opc.c (O, Z): Force expression as unsigned long.
497 2005-03-18 Nick Clifton <nickc@redhat.com>
499 * ip2k-asm.c: Regenerate.
500 * op/opcodes.pot: Regenerate.
502 2005-03-16 Nick Clifton <nickc@redhat.com>
503 Ben Elliston <bje@au.ibm.com>
505 * configure.in (werror): New switch: Add -Werror to the
506 compiler command line. Enabled by default. Disable via
508 * configure: Regenerate.
510 2005-03-16 Alan Modra <amodra@bigpond.net.au>
512 * ppc-dis.c (powerpc_dialect): Don't set PPC_OPCODE_ALTIVEC when
515 2005-03-15 Alan Modra <amodra@bigpond.net.au>
517 * po/es.po: Commit new Spanish translation.
519 * po/fr.po: Commit new French translation.
521 2005-03-14 Jan-Benedict Glaw <jbglaw@lug-owl.de>
523 * vax-dis.c: Fix spelling error
524 (print_insn_vax): Use ".word 0x0012 # Entry mask: r1 r2 >" instead
525 of just "Entry mask: < r1 ... >"
527 2005-03-12 Zack Weinberg <zack@codesourcery.com>
529 * arm-dis.c (arm_opcodes): Document %E and %V.
530 Add entries for v6T2 ARM instructions:
531 bfc bfi mls strht ldrht ldrsht ldrsbt movw movt rbit ubfx sbfx.
532 (print_insn_arm): Add support for %E and %V.
533 (thumb_opcodes): Add ARMv6K instructions nop, sev, wfe, wfi, yield.
535 2005-03-10 Jeff Baker <jbaker@qnx.com>
536 Alan Modra <amodra@bigpond.net.au>
538 * ppc-opc.c (insert_sprg, extract_sprg): New Functions.
539 (powerpc_operands <SPRG>): Call the above. Bit field is 5 bits.
541 (XSPRG_MASK): Mask off extra bits now part of sprg field.
542 (powerpc_opcodes): Asjust mfsprg and mtsprg to suit new mask. Move
543 mfsprg4..7 after msprg and consolidate.
545 2005-03-09 Jan-Benedict Glaw <jbglaw@lug-owl.de>
547 * vax-dis.c (entry_mask_bit): New array.
548 (print_insn_vax): Decode function entry mask.
550 2005-03-07 Aldy Hernandez <aldyh@redhat.com>
552 * ppc-opc.c (powerpc_opcodes): Fix encoding of efscfd.
554 2005-03-05 Alan Modra <amodra@bigpond.net.au>
556 * po/opcodes.pot: Regenerate.
558 2005-03-03 Ramana Radhakrishnan <ramana.radhakrishnan@codito.com>
560 * arc-dis.c (a4_decoding_class): New enum.
561 (dsmOneArcInst): Use the enum values for the decoding class.
562 Remove redundant case in the switch for decodingClass value 11.
564 2005-03-02 Jan Beulich <jbeulich@novell.com>
566 * i386-dis.c (print_insn): Suppress lock prefix printing for cr8...15
568 (OP_C): Consider lock prefix in non-64-bit modes.
570 2005-02-24 Alan Modra <amodra@bigpond.net.au>
572 * cris-dis.c (format_hex): Remove ineffective warning fix.
573 * crx-dis.c (make_instruction): Warning fix.
574 * frv-asm.c: Regenerate.
576 2005-02-23 Nick Clifton <nickc@redhat.com>
578 * cgen-dis.in: Use bfd_byte for buffers that are passed to
581 * ia64-opc.c (locate_opcode_ent): Initialise opval array.
583 * crx-dis.c (make_instruction): Move argument structure into inner
584 scope and ensure that all of its fields are initialised before
587 * fr30-asm.c: Regenerate.
588 * fr30-dis.c: Regenerate.
589 * frv-asm.c: Regenerate.
590 * frv-dis.c: Regenerate.
591 * ip2k-asm.c: Regenerate.
592 * ip2k-dis.c: Regenerate.
593 * iq2000-asm.c: Regenerate.
594 * iq2000-dis.c: Regenerate.
595 * m32r-asm.c: Regenerate.
596 * m32r-dis.c: Regenerate.
597 * openrisc-asm.c: Regenerate.
598 * openrisc-dis.c: Regenerate.
599 * xstormy16-asm.c: Regenerate.
600 * xstormy16-dis.c: Regenerate.
602 2005-02-22 Alan Modra <amodra@bigpond.net.au>
604 * arc-ext.c: Warning fixes.
605 * arc-ext.h: Likewise.
606 * cgen-opc.c: Likewise.
607 * ia64-gen.c: Likewise.
608 * maxq-dis.c: Likewise.
609 * ns32k-dis.c: Likewise.
610 * w65-dis.c: Likewise.
611 * ia64-asmtab.c: Regenerate.
613 2005-02-22 Alan Modra <amodra@bigpond.net.au>
615 * fr30-desc.c: Regenerate.
616 * fr30-desc.h: Regenerate.
617 * fr30-opc.c: Regenerate.
618 * fr30-opc.h: Regenerate.
619 * frv-desc.c: Regenerate.
620 * frv-desc.h: Regenerate.
621 * frv-opc.c: Regenerate.
622 * frv-opc.h: Regenerate.
623 * ip2k-desc.c: Regenerate.
624 * ip2k-desc.h: Regenerate.
625 * ip2k-opc.c: Regenerate.
626 * ip2k-opc.h: Regenerate.
627 * iq2000-desc.c: Regenerate.
628 * iq2000-desc.h: Regenerate.
629 * iq2000-opc.c: Regenerate.
630 * iq2000-opc.h: Regenerate.
631 * m32r-desc.c: Regenerate.
632 * m32r-desc.h: Regenerate.
633 * m32r-opc.c: Regenerate.
634 * m32r-opc.h: Regenerate.
635 * m32r-opinst.c: Regenerate.
636 * openrisc-desc.c: Regenerate.
637 * openrisc-desc.h: Regenerate.
638 * openrisc-opc.c: Regenerate.
639 * openrisc-opc.h: Regenerate.
640 * xstormy16-desc.c: Regenerate.
641 * xstormy16-desc.h: Regenerate.
642 * xstormy16-opc.c: Regenerate.
643 * xstormy16-opc.h: Regenerate.
645 2005-02-21 Alan Modra <amodra@bigpond.net.au>
647 * Makefile.am: Run "make dep-am"
648 * Makefile.in: Regenerate.
650 2005-02-15 Nick Clifton <nickc@redhat.com>
652 * cgen-dis.in (print_address): Add an ATTRIBUTE_UNUSED to prevent
653 compile time warnings.
654 (print_keyword): Likewise.
655 (default_print_insn): Likewise.
657 * fr30-desc.c: Regenerated.
658 * fr30-desc.h: Regenerated.
659 * fr30-dis.c: Regenerated.
660 * fr30-opc.c: Regenerated.
661 * fr30-opc.h: Regenerated.
662 * frv-desc.c: Regenerated.
663 * frv-dis.c: Regenerated.
664 * frv-opc.c: Regenerated.
665 * ip2k-asm.c: Regenerated.
666 * ip2k-desc.c: Regenerated.
667 * ip2k-desc.h: Regenerated.
668 * ip2k-dis.c: Regenerated.
669 * ip2k-opc.c: Regenerated.
670 * ip2k-opc.h: Regenerated.
671 * iq2000-desc.c: Regenerated.
672 * iq2000-dis.c: Regenerated.
673 * iq2000-opc.c: Regenerated.
674 * m32r-asm.c: Regenerated.
675 * m32r-desc.c: Regenerated.
676 * m32r-desc.h: Regenerated.
677 * m32r-dis.c: Regenerated.
678 * m32r-opc.c: Regenerated.
679 * m32r-opc.h: Regenerated.
680 * m32r-opinst.c: Regenerated.
681 * openrisc-desc.c: Regenerated.
682 * openrisc-desc.h: Regenerated.
683 * openrisc-dis.c: Regenerated.
684 * openrisc-opc.c: Regenerated.
685 * openrisc-opc.h: Regenerated.
686 * xstormy16-desc.c: Regenerated.
687 * xstormy16-desc.h: Regenerated.
688 * xstormy16-dis.c: Regenerated.
689 * xstormy16-opc.c: Regenerated.
690 * xstormy16-opc.h: Regenerated.
692 2005-02-14 H.J. Lu <hongjiu.lu@intel.com>
694 * dis-buf.c (perror_memory): Use sprintf_vma to print out
697 2005-02-11 Nick Clifton <nickc@redhat.com>
699 * iq2000-asm.c: Regenerate.
701 * frv-dis.c: Regenerate.
703 2005-02-07 Jim Blandy <jimb@redhat.com>
705 * Makefile.am (CGEN): Load guile.scm before calling the main
707 * Makefile.in: Regenerated.
708 * cgen.sh: Be prepared for the 'cgen' argument to contain spaces.
709 Simply pass the cgen-opc.scm path to ${cgen} as its first
710 argument; ${cgen} itself now contains the '-s', or whatever is
711 appropriate for the Scheme being used.
713 2005-01-31 Andrew Cagney <cagney@gnu.org>
715 * configure: Regenerate to track ../gettext.m4.
717 2005-01-31 Jan Beulich <jbeulich@novell.com>
719 * ia64-gen.c (NELEMS): Define.
720 (shrink): Generate alias with missing second predicate register when
721 opcode has two outputs and these are both predicates.
722 * ia64-opc-i.c (FULL17): Define.
723 (ia64_opcodes_i): Add mov-to-pr alias without second input. Use FULL17
724 here to generate output template.
725 (TBITCM, TNATCM): Undefine after use.
726 * ia64-opc-m.c (ia64_opcodes_i): Add alloc alias without ar.pfs as
727 first input. Add ld16 aliases without ar.csd as second output. Add
728 st16 aliases without ar.csd as second input. Add cmpxchg aliases
729 without ar.ccv as third input. Add cmp8xchg16 aliases without ar.csd/
730 ar.ccv as third/fourth inputs. Consolidate through...
731 (CMPXCHG_acq, CMPXCHG_rel, CMPXCHG_1, CMPXCHG_2, CMPXCHG_4, CMPXCHG_8,
732 CMPXCHGn, CMP8XCHG16, CMPXCHG_ALL): Define.
733 * ia64-asmtab.c: Regenerate.
735 2005-01-27 Andrew Cagney <cagney@gnu.org>
737 * configure: Regenerate to track ../gettext.m4 change.
739 2005-01-25 Alexandre Oliva <aoliva@redhat.com>
741 2004-11-10 Alexandre Oliva <aoliva@redhat.com>
742 * frv-asm.c: Rebuilt.
743 * frv-desc.c: Rebuilt.
744 * frv-desc.h: Rebuilt.
745 * frv-dis.c: Rebuilt.
746 * frv-ibld.c: Rebuilt.
747 * frv-opc.c: Rebuilt.
748 * frv-opc.h: Rebuilt.
750 2005-01-24 Andrew Cagney <cagney@gnu.org>
752 * configure: Regenerate, ../gettext.m4 was updated.
754 2005-01-21 Fred Fish <fnf@specifixinc.com>
756 * mips-opc.c: Change INSN_ALIAS to INSN2_ALIAS.
757 Change INSN_WRITE_MDMX_ACC to INSN2_WRITE_MDMX_ACC.
758 Change INSN_READ_MDMX_ACC to INSN2_READ_MDMX_ACC.
761 2005-01-20 Alan Modra <amodra@bigpond.net.au>
763 * ppc-opc.c (powerpc_opcodes): Add optional 'l' arg to tlbiel.
765 2005-01-19 Fred Fish <fnf@specifixinc.com>
767 * mips-dis.c (no_aliases): New disassembly option flag.
768 (set_default_mips_dis_options): Init no_aliases to zero.
769 (parse_mips_dis_option): Handle no-aliases option.
770 (print_insn_mips): Ignore table entries that are aliases
771 if no_aliases is set.
772 (print_insn_mips16): Ditto.
773 * mips-opc.c (mips_builtin_opcodes): Add initializer column for
774 new pinfo2 member and add INSN_ALIAS initializers as needed. Also
775 move WR_MACC and RD_MACC initializers from pinfo to pinfo2.
776 * mips16-opc.c (mips16_opcodes): Ditto.
778 2005-01-17 Andrew Stubbs <andrew.stubbs@st.com>
780 * sh-opc.h (arch_sh2a_or_sh3e,arch_sh2a_or_sh4): Correct definition.
781 (inheritance diagram): Add missing edge.
782 (arch_sh1_up): Rename arch_sh_up to match external name to make life
783 easier for the testsuite.
784 (arch_sh4_nofp_up): Likewise, rename arch_sh4_nofpu_up.
785 (arch_sh4a_nofp_up): Likewise, rename arch_sh4a_nofpu_up.
786 (arch_sh2a_nofpu_or_sh4_nommu_nofpu_up): Add missing
787 arch_sh2a_or_sh4_up child.
788 (sh_table): Do renaming as above.
789 Correct comment for ldc.l for gas testsuite to read.
790 Remove rogue mul.l from sh1 (duplicate of the one for sh2).
791 Correct comments for movy.w and movy.l for gas testsuite to read.
792 Correct comments for fmov.d and fmov.s for gas testsuite to read.
794 2005-01-12 H.J. Lu <hongjiu.lu@intel.com>
796 * i386-dis.c (OP_E): Don't ignore scale in SIB for 64 bit mode.
798 2005-01-12 H.J. Lu <hongjiu.lu@intel.com>
800 * i386-dis.c (OP_E): Ignore scale when index == 0x4 in SIB.
802 2005-01-10 Andreas Schwab <schwab@suse.de>
804 * disassemble.c (disassemble_init_for_target) <case
805 bfd_arch_ia64>: Set skip_zeroes to 16.
806 <case bfd_arch_tic4x>: Set skip_zeroes to 32.
808 2004-12-23 Tomer Levi <Tomer.Levi@nsc.com>
810 * crx-opc.c: Mark 'bcop' instruction as RELAXABLE.
812 2004-12-14 Svein E. Seldal <Svein.Seldal@solidas.com>
814 * avr-dis.c: Prettyprint. Added printing of symbol names in all
815 memory references. Convert avr_operand() to C90 formatting.
817 2004-12-05 Tomer Levi <Tomer.Levi@nsc.com>
819 * crx-dis.c (print_arg): Use 'info->print_address_func' for address printing.
821 2004-11-29 Tomer Levi <Tomer.Levi@nsc.com>
823 * crx-opc.c (crx_optab): Mark all rbase_disps* operands as signed.
824 (no_op_insn): Initialize array with instructions that have no
826 * crx-dis.c (make_instruction): Get rid of COP_BRANCH_INS operand swapping.
828 2004-11-29 Richard Earnshaw <rearnsha@arm.com>
830 * arm-dis.c: Correct top-level comment.
832 2004-11-27 Richard Earnshaw <rearnsha@arm.com>
834 * arm-opc.h (arm_opcode, thumb_opcode): Add extra field for the
835 architecuture defining the insn.
836 (arm_opcodes, thumb_opcodes): Delete. Move to ...
837 * arm-dis.c (arm_opcodes, thumb_opcodes): Here. Add architecutre
839 Also include opcode/arm.h.
840 * Makefile.am (arm-dis.lo): Update dependency list.
841 * Makefile.in: Regenerate.
843 2004-11-22 Ravi Ramaseshan <ravi.ramaseshan@codito.com>
845 * opcode/arc-opc.c (insert_base): Modify ls_operand[LS_OFFSET] to
846 reflect the change to the short immediate syntax.
848 2004-11-19 Alan Modra <amodra@bigpond.net.au>
850 * or32-opc.c (debug): Warning fix.
851 * po/POTFILES.in: Regenerate.
853 * maxq-dis.c: Formatting.
854 (print_insn): Warning fix.
856 2004-11-17 Daniel Jacobowitz <dan@codesourcery.com>
858 * arm-dis.c (WORD_ADDRESS): Define.
859 (print_insn): Use it. Correct big-endian end-of-section handling.
861 2004-11-08 Inderpreet Singh <inderpreetb@nioda.hcltech.com>
862 Vineet Sharma <vineets@noida.hcltech.com>
864 * maxq-dis.c: New file.
865 * disassemble.c (ARCH_maxq): Define.
866 (disassembler): Add 'print_insn_maxq_little' for handling maxq
868 * configure.in: Add case for bfd_maxq_arch.
869 * configure: Regenerate.
870 * Makefile.am: Add support for maxq-dis.c
871 * Makefile.in: Regenerate.
872 * aclocal.m4: Regenerate.
874 2004-11-05 Tomer Levi <Tomer.Levi@nsc.com>
876 * crx-opc.c (crx_optab): Rename 'arg_icr' to 'arg_idxr' for Index register
878 * crx-dis.c: Likewise.
880 2004-11-04 Hans-Peter Nilsson <hp@axis.com>
882 Generally, handle CRISv32.
883 * cris-dis.c (TRACE_CASE): Define as (disdata->trace_case).
884 (struct cris_disasm_data): New type.
885 (format_reg, format_hex, cris_constraint, print_flags)
886 (get_opcode_entry): Add struct cris_disasm_data * parameter. All
888 (format_sup_reg, print_insn_crisv32_with_register_prefix)
889 (print_insn_crisv32_without_register_prefix)
890 (print_insn_crisv10_v32_with_register_prefix)
891 (print_insn_crisv10_v32_without_register_prefix)
892 (cris_parse_disassembler_options): New functions.
893 (bytes_to_skip, cris_spec_reg): Add enum cris_disass_family
894 parameter. All callers changed.
895 (get_opcode_entry): Call malloc, not xmalloc. Return NULL on
897 (cris_constraint) <case 'Y', 'U'>: New cases.
898 (bytes_to_skip): Handle 'Y' and 'N' as 's'. Skip size is 4 bytes
900 (print_with_operands) <case 'Y'>: New case.
901 (print_with_operands) <case 'T', 'A', '[', ']', 'd', 'n', 'u'>
902 <case 'N', 'Y', 'Q'>: New cases.
903 (print_insn_cris_generic): Emit "bcc ." for zero and CRISv32.
904 (print_insn_cris_with_register_prefix)
905 (print_insn_cris_without_register_prefix): Call
906 cris_parse_disassembler_options.
907 * cris-opc.c (cris_spec_regs): Mention that this table isn't used
908 for CRISv32 and the size of immediate operands. New v32-only
909 entries for bz, pid, srs, wz, exs, eda, dz, ebp, erp, nrp, ccs and
910 spc. Add v32-only 4-byte entries for p2, p3, p5 and p6. Change
911 ccr, ibr, irp to be v0..v10. Change bar, dccr to be v8..v10.
912 Change brp to be v3..v10.
913 (cris_support_regs): New vector.
914 (cris_opcodes): Update head comment. New format characters '[',
915 ']', space, 'A', 'd', 'N', 'n', 'Q', 'T', 'u', 'U', 'Y'.
916 Add new opcodes for v32 and adjust existing opcodes to accommodate
917 differences to earlier variants.
918 (cris_cond15s): New vector.
920 2004-11-04 Jan Beulich <jbeulich@novell.com>
922 * i386-dis.c (Eq, Edqw, indirEp, Gdq, I1): Define.
924 (Mp): Use f_mode rather than none at all.
925 (t_mode, dq_mode, dqw_mode, f_mode, const_1_mode): Define. t_mode
926 replaces what previously was x_mode; x_mode now means 128-bit SSE
928 (dis386): Make far jumps and calls have an 'l' prefix only in AT&T
929 mode. movmskpX's, pextrw's, and pmovmskb's first operands are Gdq.
930 pinsrw's second operand is Edqw.
931 (grps): 1-bit shifts' and rotates' second operands are I1. cmpxchg8b's
932 operand is Eq. movntq's and movntdq's first operands are EM. s[gi]dt,
933 fldenv, frstor, fsave, fstenv all should also have suffixes in Intel
934 mode when an operand size override is present or always suffixing.
935 More instructions will need to be added to this group.
936 (putop): Handle new macro chars 'C' (short/long suffix selector),
937 'I' (Intel mode override for following macro char), and 'J' (for
938 adding the 'l' prefix to far branches in AT&T mode). When an
939 alternative was specified in the template, honor macro character when
940 specified for Intel mode.
941 (OP_E): Handle new *_mode values. Correct pointer specifications for
942 memory operands. Consolidate output of index register.
943 (OP_G): Handle new *_mode values.
944 (OP_I): Handle const_1_mode.
945 (OP_ESreg, OP_DSreg): Generate pointer specifications. Indicate
946 respective opcode prefix bits have been consumed.
947 (OP_EM, OP_EX): Provide some default handling for generating pointer
950 2004-10-28 Tomer Levi <Tomer.Levi@nsc.com>
952 * crx-opc.c (REV_COP_INST): New macro, reverse operand order of
955 2004-10-27 Tomer Levi <Tomer.Levi@nsc.com>
957 * crx-dis.c (enum REG_ARG_TYPE): New, replacing COP_ARG_TYPE.
958 (getregliststring): Support HI/LO and user registers.
959 * crx-opc.c (crx_instruction): Update data structure according to the
960 rearrangement done in CRX opcode header file.
961 (crx_regtab): Likewise.
962 (crx_optab): Likewise.
963 (crx_instruction): Reorder load/stor instructions, remove unsupported
965 support new Co-Processor instruction 'cpi'.
967 2004-10-27 Nick Clifton <nickc@redhat.com>
969 * opcodes/iq2000-asm.c: Regenerate.
970 * opcodes/iq2000-desc.c: Regenerate.
971 * opcodes/iq2000-desc.h: Regenerate.
972 * opcodes/iq2000-dis.c: Regenerate.
973 * opcodes/iq2000-ibld.c: Regenerate.
974 * opcodes/iq2000-opc.c: Regenerate.
975 * opcodes/iq2000-opc.h: Regenerate.
977 2004-10-21 Tomer Levi <Tomer.Levi@nsc.com>
979 * crx-opc.c (crx_instruction): Replace i3, i4, i5 with us3,
980 us4, us5 (respectively).
981 Remove unsupported 'popa' instruction.
982 Reverse operands order in store co-processor instructions.
984 2004-10-15 Alan Modra <amodra@bigpond.net.au>
986 * Makefile.am: Run "make dep-am"
987 * Makefile.in: Regenerate.
989 2004-10-12 Bob Wilson <bob.wilson@acm.org>
991 * xtensa-dis.c: Use ISO C90 formatting.
993 2004-10-09 Alan Modra <amodra@bigpond.net.au>
995 * ppc-opc.c: Revert 2004-09-09 change.
997 2004-10-07 Bob Wilson <bob.wilson@acm.org>
999 * xtensa-dis.c (state_names): Delete.
1000 (fetch_data): Use xtensa_isa_maxlength.
1001 (print_xtensa_operand): Replace operand parameter with opcode/operand
1002 pair. Remove print_sr_name parameter. Use new xtensa-isa.h functions.
1003 (print_insn_xtensa): Use new xtensa-isa.h functions. Handle multislot
1004 instruction bundles. Use xmalloc instead of malloc.
1006 2004-10-07 David Gibson <david@gibson.dropbear.id.au>
1008 * ppc-opc.c: Replace literal "0"s with NULLs in pointer
1011 2004-10-07 Tomer Levi <Tomer.Levi@nsc.com>
1013 * crx-opc.c (crx_instruction): Support Co-processor insns.
1014 * crx-dis.c (COP_ARG_TYPE): New enum for CO-Processor arguments.
1015 (getregliststring): Change function to use the above enum.
1016 (print_arg): Handle CO-Processor insns.
1017 (crx_cinvs): Add 'b' option to invalidate the branch-target
1020 2004-10-06 Aldy Hernandez <aldyh@redhat.com>
1022 * ppc-opc.c (powerpc_opcodes): Add efscfd, efdabs, efdnabs,
1023 efdneg, efdadd, efdsub, efdmul, efddiv, efdcmpgt, efdcmplt,
1024 efdcmpeq, efdtstgt, efdtstlt, efdtsteq, efdcfsi, efdcfsid,
1025 efdcfui, efdcfuid, efdcfsf, efdcfuf, efdctsi, efdctsidz, efdctsiz,
1026 efdctui, efdctuidz, efdctuiz, efdctsf, efdctuf, efdctuf, efdcfs.
1028 2004-10-01 Bill Farmer <Bill@the-farmers.freeserve.co.uk>
1030 * pdp11-dis.c (print_insn_pdp11): Subtract the SOB's displacement
1033 2004-09-30 Paul Brook <paul@codesourcery.com>
1035 * arm-dis.c (print_insn_arm): Handle 'e' for SMI instruction.
1036 * arm-opc.h: Document %e. Add ARMv6ZK instructions.
1038 2004-09-17 H.J. Lu <hongjiu.lu@intel.com>
1040 * Makefile.am (AUTOMAKE_OPTIONS): Require 1.9.
1041 (CONFIG_STATUS_DEPENDENCIES): New.
1042 (Makefile): Removed.
1043 (config.status): Likewise.
1044 * Makefile.in: Regenerated.
1046 2004-09-17 Alan Modra <amodra@bigpond.net.au>
1048 * Makefile.am: Run "make dep-am".
1049 * Makefile.in: Regenerate.
1050 * aclocal.m4: Regenerate.
1051 * configure: Regenerate.
1052 * po/POTFILES.in: Regenerate.
1053 * po/opcodes.pot: Regenerate.
1055 2004-09-11 Andreas Schwab <schwab@suse.de>
1057 * configure: Rebuild.
1059 2004-09-09 Segher Boessenkool <segher@kernel.crashing.org>
1061 * ppc-opc.c (L): Make this field not optional.
1063 2004-09-03 Tomer Levi <Tomer.Levi@nsc.com>
1065 * opc-crx.c: Rename 'popma' to 'popa', remove 'pushma'.
1066 Fix parameter to 'm[t|f]csr' insns.
1068 2004-08-30 Nathanael Nerode <neroden@gcc.gnu.org>
1070 * configure.in: Autoupdate to autoconf 2.59.
1071 * aclocal.m4: Rebuild with aclocal 1.4p6.
1072 * configure: Rebuild with autoconf 2.59.
1073 * Makefile.in: Rebuild with automake 1.4p6 (picking up
1074 bfd changes for autoconf 2.59 on the way).
1075 * config.in: Rebuild with autoheader 2.59.
1077 2004-08-27 Richard Sandiford <rsandifo@redhat.com>
1079 * frv-desc.[ch], frv-opc.[ch]: Regenerated.
1081 2004-07-30 Michal Ludvig <mludvig@suse.cz>
1083 * i386-dis.c (GRPPADLCK): Renamed to GRPPADLCK1
1084 (GRPPADLCK2): New define.
1085 (twobyte_has_modrm): True for 0xA6.
1086 (grps): GRPPADLCK2 for opcode 0xA6.
1088 2004-07-29 Alexandre Oliva <aoliva@redhat.com>
1090 Introduce SH2a support.
1091 * sh-opc.h (arch_sh2a_base): Renumber.
1092 (arch_sh2a_nofpu_base): Remove.
1093 (arch_sh_base_mask): Adjust.
1094 (arch_opann_mask): New.
1095 (arch_sh2a, arch_sh2a_nofpu): Adjust.
1096 (arch_sh2a_up, arch_sh2a_nofpu_up): Likewise.
1097 (sh_table): Adjust whitespace.
1098 2004-02-24 Corinna Vinschen <vinschen@redhat.com>
1099 * sh-opc.h (arch_sh2a_nofpu_up): New. Use instead of arch_sh2a_up in
1100 instruction list throughout.
1101 (arch_sh2a_up): Redefine to include fpu instruction set. Use instead
1102 of arch_sh2a in instruction list throughout.
1103 (arch_sh2e_up): Accomodate above changes.
1104 (arch_sh2_up): Ditto.
1105 2004-02-20 Corinna Vinschen <vinschen@redhat.com>
1106 * sh-opc.h: Add arch_sh2a_nofpu to arch_sh2_up.
1107 2004-02-18 Corinna Vinschen <vinschen@redhat.com>
1108 * sh-dis.c (print_insn_sh): Add bfd_mach_sh2a_nofpu handling.
1109 * sh-opc.h (arch_sh2a_nofpu): New.
1110 (arch_sh2a_up): New, defines sh2a and sh2a_nofpu.
1111 (sh_table): Change all arch_sh2a to arch_sh2a_up unless FPU
1113 2004-01-20 DJ Delorie <dj@redhat.com>
1114 * sh-dis.c (print_insn_sh): SH2A does not have 'X' fp regs.
1115 2003-12-29 DJ Delorie <dj@redhat.com>
1116 * sh-opc.c (sh_nibble_type, sh_arg_type, arch_2a, arch_2e_up,
1117 sh_opcode_info, sh_table): Add sh2a support.
1118 (arch_op32): New, to tag 32-bit opcodes.
1119 * sh-dis.c (print_insn_sh): Support sh2a opcodes.
1120 2003-12-02 Michael Snyder <msnyder@redhat.com>
1121 * sh-opc.h (arch_sh2a): Add.
1122 * sh-dis.c (arch_sh2a): Handle.
1123 * sh-opc.h (arch_sh2_up): Fix up to include arch_sh2a.
1125 2004-07-27 Tomer Levi <Tomer.Levi@nsc.com>
1127 * crx-opc.c: Add popx,pushx insns. Indent code, fix comments.
1129 2004-07-22 Nick Clifton <nickc@redhat.com>
1132 * h8300-dis.c (bfd_h8_disassemble): Do not dump raw bytes for the
1133 insns - this is done by objdump itself.
1134 * h8500-dis.c (print_insn_h8500): Likewise.
1136 2004-07-21 Jan Beulich <jbeulich@novell.com>
1138 * i386-dis.c (OP_E): Show rip-relative addressing in 64-bit mode
1139 regardless of address size prefix in effect.
1140 (ptr_reg): Size or address registers does not depend on rex64, but
1141 on the presence of an address size override.
1142 (OP_MMX): Use rex.x only for xmm registers.
1143 (OP_EM): Use rex.z only for xmm registers.
1145 2004-07-20 Maciej W. Rozycki <macro@linux-mips.org>
1147 * mips-opc.c (mips_builtin_opcodes): Move coprocessor 2
1148 move/branch operations to the bottom so that VR5400 multimedia
1149 instructions take precedence in disassembly.
1151 2004-07-20 Maciej W. Rozycki <macro@linux-mips.org>
1153 * mips-opc.c (mips_builtin_opcodes): Remove the MIPS32
1154 ISA-specific "break" encoding.
1156 2004-07-13 Elvis Chiang <elvisfb@gmail.com>
1158 * arm-opc.h: Fix typo in comment.
1160 2004-07-11 Andreas Schwab <schwab@suse.de>
1162 * m68k-dis.c (m68k_valid_ea): Fix typos in last change.
1164 2004-07-09 Andreas Schwab <schwab@suse.de>
1166 * m68k-dis.c (m68k_valid_ea): Check validity of all codes.
1168 2004-07-07 Tomer Levi <Tomer.Levi@nsc.com>
1170 * Makefile.am (CFILES): Add crx-dis.c, crx-opc.c.
1171 (ALL_MACHINES): Add crx-dis.lo, crx-opc.lo.
1172 (crx-dis.lo): New target.
1173 (crx-opc.lo): Likewise.
1174 * Makefile.in: Regenerate.
1175 * configure.in: Handle bfd_crx_arch.
1176 * configure: Regenerate.
1177 * crx-dis.c: New file.
1178 * crx-opc.c: New file.
1179 * disassemble.c (ARCH_crx): Define.
1180 (disassembler): Handle ARCH_crx.
1182 2004-06-29 James E Wilson <wilson@specifixinc.com>
1184 * ia64-opc-a.c (ia64_opcodes_a): Delete mov immediate pseudo for adds.
1185 * ia64-asmtab.c: Regnerate.
1187 2004-06-28 Alan Modra <amodra@bigpond.net.au>
1189 * ppc-opc.c (insert_fxm): Handle mfocrf and mtocrf.
1190 (extract_fxm): Don't test dialect.
1191 (XFXFXM_MASK): Include the power4 bit.
1192 (XFXM): Add p4 param.
1193 (powerpc_opcodes): Add mfocrf and mtocrf. Adjust mtcr.
1195 2004-06-27 Alexandre Oliva <aoliva@redhat.com>
1197 2003-07-21 Richard Sandiford <rsandifo@redhat.com>
1198 * disassemble.c (disassembler): Handle bfd_mach_h8300sxn.
1200 2004-06-26 Alan Modra <amodra@bigpond.net.au>
1202 * ppc-opc.c (BH, XLBH_MASK): Define.
1203 (powerpc_opcodes): Allow BH field on bclr, bclrl, bcctr, bcctrl.
1205 2004-06-24 Alan Modra <amodra@bigpond.net.au>
1207 * i386-dis.c (x_mode): Comment.
1208 (two_source_ops): File scope.
1209 (float_mem): Correct fisttpll and fistpll.
1210 (float_mem_mode): New table.
1212 (OP_E): Correct intel mode PTR output.
1213 (ptr_reg): Use open_char and close_char.
1214 (PNI_Fixup): Handle possible suffix on sidt. Use op1out etc. for
1215 operands. Set two_source_ops.
1217 2004-06-15 Alan Modra <amodra@bigpond.net.au>
1219 * arc-ext.c (build_ARC_extmap): Use bfd_get_section_size
1220 instead of _raw_size.
1222 2004-06-08 Jakub Jelinek <jakub@redhat.com>
1224 * ia64-gen.c (in_iclass): Handle more postinc st
1226 * ia64-asmtab.c: Rebuilt.
1228 2004-06-01 Martin Schwidefsky <schwidefsky@de.ibm.com>
1230 * s390-opc.txt: Correct architecture mask for some opcodes.
1231 lrv, lrvh, strv, ml, dl, alc, slb rll and mvclu are available
1232 in the esa mode as well.
1234 2004-05-28 Andrew Stubbs <andrew.stubbs@superh.com>
1236 * sh-dis.c (target_arch): Make unsigned.
1237 (print_insn_sh): Replace (most of) switch with a call to
1238 sh_get_arch_from_bfd_mach(). Also use new architecture flags system.
1239 * sh-opc.h: Redefine architecture flags values.
1240 Add sh3-nommu architecture.
1241 Reorganise <arch>_up macros so they make more visual sense.
1242 (SH_MERGE_ARCH_SET): Define new macro.
1243 (SH_VALID_BASE_ARCH_SET): Likewise.
1244 (SH_VALID_MMU_ARCH_SET): Likewise.
1245 (SH_VALID_CO_ARCH_SET): Likewise.
1246 (SH_VALID_ARCH_SET): Likewise.
1247 (SH_MERGE_ARCH_SET_VALID): Likewise.
1248 (SH_ARCH_SET_HAS_FPU): Likewise.
1249 (SH_ARCH_SET_HAS_DSP): Likewise.
1250 (SH_ARCH_UNKNOWN_ARCH): Likewise.
1251 (sh_get_arch_from_bfd_mach): Add prototype.
1252 (sh_get_arch_up_from_bfd_mach): Likewise.
1253 (sh_get_bfd_mach_from_arch_set): Likewise.
1254 (sh_merge_bfd_arc): Likewise.
1256 2004-05-24 Peter Barada <peter@the-baradas.com>
1258 * m68k-dis.c(print_insn_m68k): Strip body of diassembly out
1259 into new match_insn_m68k function. Loop over canidate
1260 matches and select first that completely matches.
1261 * m68k-dis.c(print_insn_arg): Fix 'g' case to only extract 1 bit.
1262 * m68k-dis.c(print_insn_arg): Call new function m68k_valid_ea
1263 to verify addressing for MAC/EMAC.
1264 * m68k-dis.c(print_insn_arg): Use reg_half_names for MAC/EMAC
1265 reigster halves since 'fpu' and 'spl' look misleading.
1266 * m68k-dis.c(fetch_arg): Fix 'G', 'H', 'I', 'f', 'M', 'N' cases.
1267 * m68k-opc.c: Rearragne mac/emac cases to use longest for
1268 first, tighten up match masks.
1269 * m68k-opc.c: Add 'size' field to struct m68k_opcode. Produce
1270 'size' from special case code in print_insn_m68k to
1271 determine decode size of insns.
1273 2004-05-19 Alan Modra <amodra@bigpond.net.au>
1275 * ppc-opc.c (insert_fxm): Enable two operand mfcr when -many as
1276 well as when -mpower4.
1278 2004-05-13 Nick Clifton <nickc@redhat.com>
1280 * po/fr.po: Updated French translation.
1282 2004-05-05 Peter Barada <peter@the-baradas.com>
1284 * m68k-dis.c(print_insn_m68k): Add new chips, use core
1285 variants in arch_mask. Only set m68881/68851 for 68k chips.
1286 * m68k-op.c: Switch from ColdFire chips to core variants.
1288 2004-05-05 Alan Modra <amodra@bigpond.net.au>
1291 * ppc-opc.c (PPCVEC): Remove PPC_OPCODE_PPC.
1293 2004-04-29 Ben Elliston <bje@au.ibm.com>
1295 * ppc-opc.c (XCMPL): Renmame to XOPL. Update users.
1296 (powerpc_opcodes): Add "dbczl" instruction for PPC970.
1298 2004-04-22 Kaz Kojima <kkojima@rr.iij4u.or.jp>
1300 * sh-dis.c (print_insn_sh): Print the value in constant pool
1301 as a symbol if it looks like a symbol.
1303 2004-04-22 Peter Barada <peter@the-baradas.com>
1305 * m68k-dis.c(print_insn_m68k): Set mfcmac/mcfemac on
1306 appropriate ColdFire architectures.
1307 (print_insn_m68k): Handle EMAC, MAC/EMAC scalefactor, and MAC/EMAC
1309 Add EMAC instructions, fix MAC instructions. Remove
1310 macmw/macml/msacmw/msacml instructions since mask addressing now
1313 2004-04-20 Jakub Jelinek <jakub@redhat.com>
1315 * sparc-opc.c (fmoviccx, fmovfccx, fmovccx): Define.
1316 (fmovicc, fmovfcc, fmovcc): Remove fpsize argument, change opcode to
1317 suffix. Use fmov*x macros, create all 3 fpsize variants in one
1318 macro. Adjust all users.
1320 2004-04-15 Anil Paranjpe <anilp1@kpitcummins.com>
1322 * h8300-dis.c (bfd_h8_disassemble) : Treat "adds" & "subs"
1325 2004-03-30 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
1327 * m32r-asm.c: Regenerate.
1329 2004-03-29 Stan Shebs <shebs@apple.com>
1331 * mpw-config.in, mpw-make.sed: Remove MPW support files, no longer
1334 2004-03-19 Alan Modra <amodra@bigpond.net.au>
1336 * aclocal.m4: Regenerate.
1337 * config.in: Regenerate.
1338 * configure: Regenerate.
1339 * po/POTFILES.in: Regenerate.
1340 * po/opcodes.pot: Regenerate.
1342 2004-03-16 Alan Modra <amodra@bigpond.net.au>
1344 * ppc-dis.c (print_insn_powerpc): Don't print tabs. Handle
1346 * ppc-opc.c (RA0): Define.
1347 (RAQ, RAL, RAM, RAS, RSQ, RTQ, RSO): Use PPC_OPERAND_GPR_0.
1348 (RAOPT): Rename from RAO. Update all uses.
1349 (powerpc_opcodes): Use RA0 as appropriate.
1351 2004-03-15 Aldy Hernandez <aldyh@redhat.com>
1353 * ppc-opc.c (powerpc_opcodes): Add BOOKE versions of mfsprg.
1355 2004-03-15 Alan Modra <amodra@bigpond.net.au>
1357 * sparc-dis.c (print_insn_sparc): Update getword prototype.
1359 2004-03-12 Michal Ludvig <mludvig@suse.cz>
1361 * i386-dis.c (GRPPLOCK): Delete.
1362 (grps): Delete GRPPLOCK entry.
1364 2004-03-12 Alan Modra <amodra@bigpond.net.au>
1366 * i386-dis.c (OP_M, OP_0f0e, OP_0fae, NOP_Fixup): New functions.
1368 (None, PADLOCK_SPECIAL, PADLOCK_0): Delete.
1369 (GRPPADLCK): Define.
1370 (dis386): Use NOP_Fixup on "nop".
1371 (dis386_twobyte): Use GRPPADLCK on opcode 0xa7.
1372 (twobyte_has_modrm): Set for 0xa7.
1373 (padlock_table): Delete. Move to..
1374 (grps): ..here, using OP_0f07. Use OP_Ofae on lfence, mfence
1376 (print_insn): Revert PADLOCK_SPECIAL code.
1377 (OP_E): Delete sfence, lfence, mfence checks.
1379 2004-03-12 Jakub Jelinek <jakub@redhat.com>
1381 * i386-dis.c (grps): Use INVLPG_Fixup instead of OP_E for invlpg.
1382 (INVLPG_Fixup): New function.
1383 (PNI_Fixup): Remove ATTRIBUTE_UNUSED from sizeflag.
1385 2004-03-12 Michal Ludvig <mludvig@suse.cz>
1387 * i386-dis.c (PADLOCK_SPECIAL, PADLOCK_0): New defines.
1388 (dis386_twobyte): Opcode 0xa7 is PADLOCK_0.
1389 (padlock_table): New struct with PadLock instructions.
1390 (print_insn): Handle PADLOCK_SPECIAL.
1392 2004-03-12 Alan Modra <amodra@bigpond.net.au>
1394 * i386-dis.c (grps): Use clflush by default for 0x0fae/7.
1395 (OP_E): Twiddle clflush to sfence here.
1397 2004-03-08 Nick Clifton <nickc@redhat.com>
1399 * po/de.po: Updated German translation.
1401 2003-03-03 Andrew Stubbs <andrew.stubbs@superh.com>
1403 * sh-dis.c (print_insn_sh): Don't disassemble fp instructions in
1404 nofpu mode. Add BFD type bfd_mach_sh4_nommu_nofpu.
1405 * sh-opc.h: Add sh4_nommu_nofpu architecture and adjust instructions
1408 2004-03-01 Richard Sandiford <rsandifo@redhat.com>
1410 * frv-asm.c: Regenerate.
1411 * frv-desc.c: Regenerate.
1412 * frv-desc.h: Regenerate.
1413 * frv-dis.c: Regenerate.
1414 * frv-ibld.c: Regenerate.
1415 * frv-opc.c: Regenerate.
1416 * frv-opc.h: Regenerate.
1418 2004-03-01 Richard Sandiford <rsandifo@redhat.com>
1420 * frv-desc.c, frv-opc.c: Regenerate.
1422 2004-03-01 Richard Sandiford <rsandifo@redhat.com>
1424 * frv-desc.c, frv-opc.c, frv-opc.h: Regenerate.
1426 2004-02-26 Andrew Stubbs <andrew.stubbs@superh.com>
1428 * sh-opc.h: Move fsca and fsrra instructions from sh4a to sh4.
1429 Also correct mistake in the comment.
1431 2004-02-26 Andrew Stubbs <andrew.stubbs@superh.com>
1433 * sh-dis.c (print_insn_sh): Add REG_N_D nibble type to
1434 ensure that double registers have even numbers.
1435 Add REG_N_B01 for nn01 (binary 01) nibble to ensure
1436 that reserved instruction 0xfffd does not decode the same
1438 * sh-opc.h: Add REG_N_D nibble type and use it whereever
1439 REG_N refers to a double register.
1440 Add REG_N_B01 nibble type and use it instead of REG_NM
1442 Adjust the bit patterns in a few comments.
1444 2004-02-25 Aldy Hernandez <aldyh@redhat.com>
1446 * ppc-opc.c (powerpc_opcodes): Change mask for dcbt and dcbtst.
1448 2004-02-20 Aldy Hernandez <aldyh@redhat.com>
1450 * ppc-opc.c (powerpc_opcodes): Move mfmcsrr0 before mfdc_dat.
1452 2004-02-20 Aldy Hernandez <aldyh@redhat.com>
1454 * ppc-opc.c (powerpc_opcodes): Add m*ivor35.
1456 2004-02-20 Aldy Hernandez <aldyh@redhat.com>
1458 * ppc-opc.c (powerpc_opcodes): Add mfivor32, mfivor33, mfivor34,
1459 mtivor32, mtivor33, mtivor34.
1461 2004-02-19 Aldy Hernandez <aldyh@redhat.com>
1463 * ppc-opc.c (powerpc_opcodes): Add mfmcar.
1465 2004-02-10 Petko Manolov <petkan@nucleusys.com>
1467 * arm-opc.h Maverick accumulator register opcode fixes.
1469 2004-02-13 Ben Elliston <bje@wasabisystems.com>
1471 * m32r-dis.c: Regenerate.
1473 2004-01-27 Michael Snyder <msnyder@redhat.com>
1475 * sh-opc.h (sh_table): "fsrra", not "fssra".
1477 2004-01-23 Andrew Over <andrew.over@cs.anu.edu.au>
1479 * sparc-opc.c (fdtox, fstox, fqtox, fxtod, fxtos, fxtoq): Tighten
1482 2004-01-19 Andrew Over <andrew.over@cs.anu.edu.au>
1484 * sparc-opc.c (sparc_opcodes) <f[dsq]tox, fxto[dsq]>: Fix args.
1486 2004-01-19 Alan Modra <amodra@bigpond.net.au>
1488 * i386-dis.c (OP_E): Print scale factor on intel mode sib when not
1489 1. Don't print scale factor on AT&T mode when index missing.
1491 2004-01-16 Alexandre Oliva <aoliva@redhat.com>
1493 * m10300-opc.c (mov): 8- and 24-bit immediates are zero-extended
1494 when loaded into XR registers.
1496 2004-01-14 Richard Sandiford <rsandifo@redhat.com>
1498 * frv-desc.h: Regenerate.
1499 * frv-desc.c: Regenerate.
1500 * frv-opc.c: Regenerate.
1502 2004-01-13 Michael Snyder <msnyder@redhat.com>
1504 * sh-dis.c (print_insn_sh): Allocate 4 bytes for insn.
1506 2004-01-09 Paul Brook <paul@codesourcery.com>
1508 * arm-opc.h (arm_opcodes): Move generic mcrr after known
1511 2004-01-07 Daniel Jacobowitz <drow@mvista.com>
1513 * Makefile.am (libopcodes_la_DEPENDENCIES)
1514 (libopcodes_la_LIBADD): Revert 2003-05-17 change. Add explanatory
1515 comment about the problem.
1516 * Makefile.in: Regenerate.
1518 2004-01-06 Alexandre Oliva <aoliva@redhat.com>
1520 2003-12-19 Alexandre Oliva <aoliva@redhat.com>
1521 * frv-asm.c (parse_ulo16, parse_uhi16, parse_d12): Fix some
1522 cut&paste errors in shifting/truncating numerical operands.
1523 2003-08-04 Alexandre Oliva <aoliva@redhat.com>
1524 * frv-asm.c (parse_ulo16): Parse gotofflo and gotofffuncdesclo.
1525 (parse_uslo16): Likewise.
1526 (parse_uhi16): Parse gotoffhi and gotofffuncdeschi.
1527 (parse_d12): Parse gotoff12 and gotofffuncdesc12.
1528 (parse_s12): Likewise.
1529 2003-08-04 Alexandre Oliva <aoliva@redhat.com>
1530 * frv-asm.c (parse_ulo16): Parse gotlo and gotfuncdesclo.
1531 (parse_uslo16): Likewise.
1532 (parse_uhi16): Parse gothi and gotfuncdeschi.
1533 (parse_d12): Parse got12 and gotfuncdesc12.
1534 (parse_s12): Likewise.
1536 2004-01-02 Albert Bartoszko <albar@nt.kegel.com.pl>
1538 * msp430-dis.c (msp430_doubleoperand): Check for an 'add'
1539 instruction which looks similar to an 'rla' instruction.
1541 For older changes see ChangeLog-0203
1547 version-control: never