1 2016-04-11 Maciej W. Rozycki <macro@imgtec.com>
3 * mips-dis.c (print_mips16_insn_arg): Mask unused extended
6 2016-04-07 Andrew Burgess <andrew.burgess@embecosm.com>
8 * arc-nps400-tbl.h: Add schd, sync, and hwschd instructions.
9 * arc-opc.c (arc_flag_operands): Add new flags.
10 (arc_flag_classes): Add new classes.
12 2016-04-07 Andrew Burgess <andrew.burgess@embecosm.com>
14 * arc-opc.c (arc_opcodes): Extend comment to discus table layout.
16 2016-04-05 Andrew Burgess <andrew.burgess@embecosm.com>
18 * arc-nps400-tbl.h: Add movbi, decode1, fbset, fbclear, encode0,
19 encode1, rflt, crc16, and crc32 instructions.
20 * arc-opc.c (arc_flag_operands): Add F_NPS_R.
21 (arc_flag_classes): Add C_NPS_R.
22 (insert_nps_bitop_size_2b): New function.
23 (extract_nps_bitop_size_2b): Likewise.
24 (insert_nps_bitop_uimm8): Likewise.
25 (extract_nps_bitop_uimm8): Likewise.
26 (arc_operands): Add new operand entries.
28 2016-04-05 Claudiu Zissulescu <claziss@synopsys.com>
30 * arc-regs.h: Add a new subclass field. Add double assist
31 accumulator register values.
32 * arc-tbl.h: Use DPA subclass to mark the double assist
33 instructions. Use DPX/SPX subclas to mark the FPX instructions.
34 * arc-opc.c (RSP): Define instead of SP.
35 (arc_aux_regs): Add the subclass field.
37 2016-04-05 Jiong Wang <jiong.wang@arm.com>
39 * arm-dis.c: Support FP16 vmul, vmla, vmls (by scalar).
41 2016-03-31 Andrew Burgess <andrew.burgess@embecosm.com>
43 * arc-opc.c (arc_operands): Fix operand flags for NPS_R_DST, and
46 2016-03-30 Andrew Burgess <andrew.burgess@embecosm.com>
48 * arc-nps400-tbl.h: Add a header comment, and fix some whitespace
49 issues. No functional changes.
51 2016-03-30 Claudiu Zissulescu <claziss@synopsys.com>
53 * arc-regs.h (IC_RAM_ADDRESS, IC_TAG, IC_WP, IC_DATA, CONTROL0)
54 (AX2, AY2, MX2, MY2, AY0, AY1, DC_RAM_ADDR, DC_TAG, CONTROL1)
55 (RTT): Remove duplicate.
56 (LCDINSTR, LCDDATA, LCDSTAT, CC_*, PCT_COUNT*, PCT_SNAP*)
57 (PCT_CONFIG*): Remove.
58 (D1L, D1H, D2H, D2L): Define.
60 2016-03-29 Claudiu Zissulescu <claziss@synopsys.com>
62 * arc-ext-tbl.h (dsp_fp_i2flt): Fix typo.
64 2016-03-29 Claudiu Zissulescu <claziss@synopsys.com>
66 * arc-tbl.h (invld07): Remove.
67 * arc-ext-tbl.h: New file.
68 * arc-dis.c (FIELDA, FIELDB, FIELDC): Remove.
69 * arc-opc.c (arc_opcodes): Add ext-tbl include.
71 2016-03-24 Jan Kratochvil <jan.kratochvil@redhat.com>
73 Fix -Wstack-usage warnings.
74 * aarch64-dis.c (print_operands): Substitute size.
75 * aarch64-opc.c (print_register_offset_address): Substitute tblen.
77 2016-03-22 Jose E. Marchesi <jose.marchesi@oracle.com>
79 * sparc-opc.c (sparc_opcodes): Reorder entries for `rd' in order
80 to get a proper diagnostic when an invalid ASR register is used.
82 2016-03-22 Nick Clifton <nickc@redhat.com>
84 * configure: Regenerate.
86 2016-03-21 Andrew Burgess <andrew.burgess@embecosm.com>
88 * arc-nps400-tbl.h: New file.
89 * arc-opc.c: Add top level comment.
90 (insert_nps_3bit_dst): New function.
91 (extract_nps_3bit_dst): New function.
92 (insert_nps_3bit_src2): New function.
93 (extract_nps_3bit_src2): New function.
94 (insert_nps_bitop_size): New function.
95 (extract_nps_bitop_size): New function.
96 (arc_flag_operands): Add nps400 entries.
97 (arc_flag_classes): Add nps400 entries.
98 (arc_operands): Add nps400 entries.
99 (arc_opcodes): Add nps400 include.
101 2016-03-21 Andrew Burgess <andrew.burgess@embecosm.com>
103 * arc-opc.c (arc_flag_classes): Convert all flag classes to use
104 the new class enum values.
106 2016-03-21 Andrew Burgess <andrew.burgess@embecosm.com>
108 * arc-dis.c (print_insn_arc): Handle nps400.
110 2016-03-21 Andrew Burgess <andrew.burgess@embecosm.com>
112 * arc-opc.c (BASE): Delete.
114 2016-03-18 Nick Clifton <nickc@redhat.com>
117 * aarch64-tbl.h (aarch64_opcode_table): Fix type of second operand
118 of MOV insn that aliases an ORR insn.
120 2016-03-16 Jiong Wang <jiong.wang@arm.com>
122 * arm-dis.c (neon_opcodes): Support new FP16 instructions.
124 2016-03-07 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
126 * mcore-opc.h: Add const qualifiers.
127 * microblaze-opc.h (struct op_code_struct): Likewise.
128 * sh-opc.h: Likewise.
129 * tic4x-dis.c (tic4x_print_indirect): Likewise.
130 (tic4x_print_op): Likewise.
132 2016-03-02 Alan Modra <amodra@gmail.com>
134 * or1k-desc.h: Regenerate.
135 * fr30-ibld.c: Regenerate.
136 * rl78-decode.c: Regenerate.
138 2016-03-01 Nick Clifton <nickc@redhat.com>
141 * rl78-dis.c (print_insn_rl78_common): Fix typo.
143 2016-02-24 Renlin Li <renlin.li@arm.com>
145 * arm-dis.c (coprocessor_opcodes): Add fp16 instruction entries.
146 (print_insn_coprocessor): Support fp16 instructions.
148 2016-02-24 Renlin Li <renlin.li@arm.com>
150 * arm-dis.c (print_insn_coprocessor): Fix mask for vsel, vmaxnm,
153 2016-02-24 Renlin Li <renlin.li@arm.com>
155 * arm-dis.c (print_insn_coprocessor): Check co-processor number for
156 cpd/cpd2, mcr/mcr2, mrc/mrc2, ldc/ldc2, stc/stc2.
158 2016-02-15 H.J. Lu <hongjiu.lu@intel.com>
160 * i386-dis.c (print_insn): Parenthesize expression to prevent
164 2016-02-10 Claudiu Zissulescu <claziss@synopsys.com>
165 Janek van Oirschot <jvanoirs@synopsys.com>
167 * arc-opc.c (arc_relax_opcodes, arc_num_relax_opcodes): New
170 2016-02-04 Nick Clifton <nickc@redhat.com>
173 * msp430-dis.c (print_insn_msp430): Add a special case for
174 decoding an RRC instruction with the ZC bit set in the extension
177 2016-02-02 Andrew Burgess <andrew.burgess@embecosm.com>
179 * cgen-ibld.in (insert_normal): Rework calculation of shift.
180 * epiphany-ibld.c: Regenerate.
181 * fr30-ibld.c: Regenerate.
182 * frv-ibld.c: Regenerate.
183 * ip2k-ibld.c: Regenerate.
184 * iq2000-ibld.c: Regenerate.
185 * lm32-ibld.c: Regenerate.
186 * m32c-ibld.c: Regenerate.
187 * m32r-ibld.c: Regenerate.
188 * mep-ibld.c: Regenerate.
189 * mt-ibld.c: Regenerate.
190 * or1k-ibld.c: Regenerate.
191 * xc16x-ibld.c: Regenerate.
192 * xstormy16-ibld.c: Regenerate.
194 2016-02-02 Andrew Burgess <andrew.burgess@embecosm.com>
196 * epiphany-dis.c: Regenerated from latest cpu files.
198 2016-02-01 Michael McConville <mmcco@mykolab.com>
200 * cgen-dis.c (count_decodable_bits): Use unsigned value for mask
203 2016-01-25 Renlin Li <renlin.li@arm.com>
205 * arm-dis.c (mapping_symbol_for_insn): New function.
206 (find_ifthen_state): Call mapping_symbol_for_insn().
208 2016-01-20 Matthew Wahab <matthew.wahab@arm.com>
210 * aarch64-opc.c (operand_general_constraint_met_p): Check validity
211 of MSR UAO immediate operand.
213 2016-01-18 Maciej W. Rozycki <macro@imgtec.com>
215 * mips-dis.c (print_insn_micromips): Remove 48-bit microMIPS
218 2016-01-17 Alan Modra <amodra@gmail.com>
220 * configure: Regenerate.
222 2016-01-14 Nick Clifton <nickc@redhat.com>
224 * rl78-decode.opc (rl78_decode_opcode): Add 's' operand to movw
225 instructions that can support stack pointer operations.
226 * rl78-decode.c: Regenerate.
227 * rl78-dis.c: Fix display of stack pointer in MOVW based
230 2016-01-14 Matthew Wahab <matthew.wahab@arm.com>
232 * aarch64-opc.c (aarch64_sys_reg_supported_p): Merge conditionals
233 testing for RAS support. Add checks for erxfr_el1, erxctlr_el1,
234 erxtatus_el1 and erxaddr_el1.
236 2016-01-12 Matthew Wahab <matthew.wahab@arm.com>
238 * arm-dis.c (arm_opcodes): Add "esb".
239 (thumb_opcodes): Likewise.
241 2016-01-11 Peter Bergner <bergner@vnet.ibm.com>
243 * ppc-opc.c <xscmpnedp>: Delete.
244 <xvcmpnedp>: Likewise.
245 <xvcmpnedp.>: Likewise.
246 <xvcmpnesp>: Likewise.
247 <xvcmpnesp.>: Likewise.
249 2016-01-08 Andreas Schwab <schwab@linux-m68k.org>
252 * m68k-opc.c (moveb, movew): For ISA_B/C only allow #,d(An) in
255 2016-01-01 Alan Modra <amodra@gmail.com>
257 Update year range in copyright notice of all files.
259 For older changes see ChangeLog-2015
261 Copyright (C) 2016 Free Software Foundation, Inc.
263 Copying and distribution of this file, with or without modification,
264 are permitted in any medium without royalty provided the copyright
265 notice and this notice are preserved.
271 version-control: never