1 2005-04-26 Jerome Guitton <guitton@gnat.com>
3 * configure.in: Fix the check for basename declaration.
4 * configure: Regenerate.
6 2005-04-19 Alan Modra <amodra@bigpond.net.au>
8 * ppc-opc.c (RTO): Define.
9 (powerpc_opcodes <tlbsx, tlbsx., tlbre>): Combine PPC403 and BOOKE
10 entries to suit PPC440.
12 2005-04-18 Mark Kettenis <kettenis@gnu.org>
14 * i386-dis.c: Insert hyphens into selected VIA PadLock extensions.
17 2005-04-14 Nick Clifton <nickc@redhat.com>
19 * po/fi.po: New translation: Finnish.
20 * configure.in (ALL_LINGUAS): Add fi.
21 * configure: Regenerate.
23 2005-04-14 Alan Modra <amodra@bigpond.net.au>
25 * Makefile.am (NO_WERROR): Define.
26 * configure.in: Invoke AM_BINUTILS_WARNINGS.
27 * Makefile.in: Regenerate.
28 * aclocal.m4: Regenerate.
29 * configure: Regenerate.
31 2005-04-04 Nick Clifton <nickc@redhat.com>
33 * fr30-asm.c: Regenerate.
34 * frv-asm.c: Regenerate.
35 * iq2000-asm.c: Regenerate.
36 * m32r-asm.c: Regenerate.
37 * openrisc-asm.c: Regenerate.
39 2005-04-01 Jan Beulich <jbeulich@novell.com>
41 * i386-dis.c (PNI_Fixup): Neither mwait nor monitor have any
42 visible operands in Intel mode. The first operand of monitor is
45 2005-04-01 Jan Beulich <jbeulich@novell.com>
47 * i386-dis.c (INVLPG_Fixup): Decode rdtscp; change code to allow for
48 easier future additions.
50 2005-03-31 Jerome Guitton <guitton@gnat.com>
52 * configure.in: Check for basename.
53 * configure: Regenerate.
56 2005-03-29 H.J. Lu <hongjiu.lu@intel.com>
58 * i386-dis.c (SEG_Fixup): New.
60 (dis386): Use "Sv" for 0x8c and 0x8e.
62 2005-03-21 Jan-Benedict Glaw <jbglaw@lug-owl.de>
63 Nick Clifton <nickc@redhat.com>
65 * vax-dis.c: (entry_addr): New varible: An array of user supplied
66 function entry mask addresses.
67 (entry_addr_occupied_slots): New variable: The number of occupied
68 elements in entry_addr.
69 (entry_addr_total_slots): New variable: The total number of
70 elements in entry_addr.
71 (parse_disassembler_options): New function. Fills in the entry_addr
73 (free_entry_array): New function. Release the memory used by the
74 entry addr array. Suppressed because there is no way to call it.
75 (is_function_entry): Check if a given address is a function's
76 start address by looking at supplied entry mask addresses and
77 symbol information, if available.
78 (print_insn_vax): Use parse_disassembler_options and is_function_entry.
80 2005-03-23 H.J. Lu <hongjiu.lu@intel.com>
82 * cris-dis.c (print_with_operands): Use ~31L for long instead
85 2005-03-20 H.J. Lu <hongjiu.lu@intel.com>
87 * mmix-opc.c (O): Revert the last change.
90 2005-03-19 H.J. Lu <hongjiu.lu@intel.com>
92 * mmix-opc.c (O): Use 24UL instead of 24 for unsigned long.
95 2005-03-19 Hans-Peter Nilsson <hp@bitrange.com>
97 * mmix-opc.c (O, Z): Force expression as unsigned long.
99 2005-03-18 Nick Clifton <nickc@redhat.com>
101 * ip2k-asm.c: Regenerate.
102 * op/opcodes.pot: Regenerate.
104 2005-03-16 Nick Clifton <nickc@redhat.com>
105 Ben Elliston <bje@au.ibm.com>
107 * configure.in (werror): New switch: Add -Werror to the
108 compiler command line. Enabled by default. Disable via
110 * configure: Regenerate.
112 2005-03-16 Alan Modra <amodra@bigpond.net.au>
114 * ppc-dis.c (powerpc_dialect): Don't set PPC_OPCODE_ALTIVEC when
117 2005-03-15 Alan Modra <amodra@bigpond.net.au>
119 * po/es.po: Commit new Spanish translation.
121 * po/fr.po: Commit new French translation.
123 2005-03-14 Jan-Benedict Glaw <jbglaw@lug-owl.de>
125 * vax-dis.c: Fix spelling error
126 (print_insn_vax): Use ".word 0x0012 # Entry mask: r1 r2 >" instead
127 of just "Entry mask: < r1 ... >"
129 2005-03-12 Zack Weinberg <zack@codesourcery.com>
131 * arm-dis.c (arm_opcodes): Document %E and %V.
132 Add entries for v6T2 ARM instructions:
133 bfc bfi mls strht ldrht ldrsht ldrsbt movw movt rbit ubfx sbfx.
134 (print_insn_arm): Add support for %E and %V.
135 (thumb_opcodes): Add ARMv6K instructions nop, sev, wfe, wfi, yield.
137 2005-03-10 Jeff Baker <jbaker@qnx.com>
138 Alan Modra <amodra@bigpond.net.au>
140 * ppc-opc.c (insert_sprg, extract_sprg): New Functions.
141 (powerpc_operands <SPRG>): Call the above. Bit field is 5 bits.
143 (XSPRG_MASK): Mask off extra bits now part of sprg field.
144 (powerpc_opcodes): Asjust mfsprg and mtsprg to suit new mask. Move
145 mfsprg4..7 after msprg and consolidate.
147 2005-03-09 Jan-Benedict Glaw <jbglaw@lug-owl.de>
149 * vax-dis.c (entry_mask_bit): New array.
150 (print_insn_vax): Decode function entry mask.
152 2005-03-07 Aldy Hernandez <aldyh@redhat.com>
154 * ppc-opc.c (powerpc_opcodes): Fix encoding of efscfd.
156 2005-03-05 Alan Modra <amodra@bigpond.net.au>
158 * po/opcodes.pot: Regenerate.
160 2005-03-03 Ramana Radhakrishnan <ramana.radhakrishnan@codito.com>
162 * arc-dis.c (a4_decoding_class): New enum.
163 (dsmOneArcInst): Use the enum values for the decoding class.
164 Remove redundant case in the switch for decodingClass value 11.
166 2005-03-02 Jan Beulich <jbeulich@novell.com>
168 * i386-dis.c (print_insn): Suppress lock prefix printing for cr8...15
170 (OP_C): Consider lock prefix in non-64-bit modes.
172 2005-02-24 Alan Modra <amodra@bigpond.net.au>
174 * cris-dis.c (format_hex): Remove ineffective warning fix.
175 * crx-dis.c (make_instruction): Warning fix.
176 * frv-asm.c: Regenerate.
178 2005-02-23 Nick Clifton <nickc@redhat.com>
180 * cgen-dis.in: Use bfd_byte for buffers that are passed to
183 * ia64-opc.c (locate_opcode_ent): Initialise opval array.
185 * crx-dis.c (make_instruction): Move argument structure into inner
186 scope and ensure that all of its fields are initialised before
189 * fr30-asm.c: Regenerate.
190 * fr30-dis.c: Regenerate.
191 * frv-asm.c: Regenerate.
192 * frv-dis.c: Regenerate.
193 * ip2k-asm.c: Regenerate.
194 * ip2k-dis.c: Regenerate.
195 * iq2000-asm.c: Regenerate.
196 * iq2000-dis.c: Regenerate.
197 * m32r-asm.c: Regenerate.
198 * m32r-dis.c: Regenerate.
199 * openrisc-asm.c: Regenerate.
200 * openrisc-dis.c: Regenerate.
201 * xstormy16-asm.c: Regenerate.
202 * xstormy16-dis.c: Regenerate.
204 2005-02-22 Alan Modra <amodra@bigpond.net.au>
206 * arc-ext.c: Warning fixes.
207 * arc-ext.h: Likewise.
208 * cgen-opc.c: Likewise.
209 * ia64-gen.c: Likewise.
210 * maxq-dis.c: Likewise.
211 * ns32k-dis.c: Likewise.
212 * w65-dis.c: Likewise.
213 * ia64-asmtab.c: Regenerate.
215 2005-02-22 Alan Modra <amodra@bigpond.net.au>
217 * fr30-desc.c: Regenerate.
218 * fr30-desc.h: Regenerate.
219 * fr30-opc.c: Regenerate.
220 * fr30-opc.h: Regenerate.
221 * frv-desc.c: Regenerate.
222 * frv-desc.h: Regenerate.
223 * frv-opc.c: Regenerate.
224 * frv-opc.h: Regenerate.
225 * ip2k-desc.c: Regenerate.
226 * ip2k-desc.h: Regenerate.
227 * ip2k-opc.c: Regenerate.
228 * ip2k-opc.h: Regenerate.
229 * iq2000-desc.c: Regenerate.
230 * iq2000-desc.h: Regenerate.
231 * iq2000-opc.c: Regenerate.
232 * iq2000-opc.h: Regenerate.
233 * m32r-desc.c: Regenerate.
234 * m32r-desc.h: Regenerate.
235 * m32r-opc.c: Regenerate.
236 * m32r-opc.h: Regenerate.
237 * m32r-opinst.c: Regenerate.
238 * openrisc-desc.c: Regenerate.
239 * openrisc-desc.h: Regenerate.
240 * openrisc-opc.c: Regenerate.
241 * openrisc-opc.h: Regenerate.
242 * xstormy16-desc.c: Regenerate.
243 * xstormy16-desc.h: Regenerate.
244 * xstormy16-opc.c: Regenerate.
245 * xstormy16-opc.h: Regenerate.
247 2005-02-21 Alan Modra <amodra@bigpond.net.au>
249 * Makefile.am: Run "make dep-am"
250 * Makefile.in: Regenerate.
252 2005-02-15 Nick Clifton <nickc@redhat.com>
254 * cgen-dis.in (print_address): Add an ATTRIBUTE_UNUSED to prevent
255 compile time warnings.
256 (print_keyword): Likewise.
257 (default_print_insn): Likewise.
259 * fr30-desc.c: Regenerated.
260 * fr30-desc.h: Regenerated.
261 * fr30-dis.c: Regenerated.
262 * fr30-opc.c: Regenerated.
263 * fr30-opc.h: Regenerated.
264 * frv-desc.c: Regenerated.
265 * frv-dis.c: Regenerated.
266 * frv-opc.c: Regenerated.
267 * ip2k-asm.c: Regenerated.
268 * ip2k-desc.c: Regenerated.
269 * ip2k-desc.h: Regenerated.
270 * ip2k-dis.c: Regenerated.
271 * ip2k-opc.c: Regenerated.
272 * ip2k-opc.h: Regenerated.
273 * iq2000-desc.c: Regenerated.
274 * iq2000-dis.c: Regenerated.
275 * iq2000-opc.c: Regenerated.
276 * m32r-asm.c: Regenerated.
277 * m32r-desc.c: Regenerated.
278 * m32r-desc.h: Regenerated.
279 * m32r-dis.c: Regenerated.
280 * m32r-opc.c: Regenerated.
281 * m32r-opc.h: Regenerated.
282 * m32r-opinst.c: Regenerated.
283 * openrisc-desc.c: Regenerated.
284 * openrisc-desc.h: Regenerated.
285 * openrisc-dis.c: Regenerated.
286 * openrisc-opc.c: Regenerated.
287 * openrisc-opc.h: Regenerated.
288 * xstormy16-desc.c: Regenerated.
289 * xstormy16-desc.h: Regenerated.
290 * xstormy16-dis.c: Regenerated.
291 * xstormy16-opc.c: Regenerated.
292 * xstormy16-opc.h: Regenerated.
294 2005-02-14 H.J. Lu <hongjiu.lu@intel.com>
296 * dis-buf.c (perror_memory): Use sprintf_vma to print out
299 2005-02-11 Nick Clifton <nickc@redhat.com>
301 * iq2000-asm.c: Regenerate.
303 * frv-dis.c: Regenerate.
305 2005-02-07 Jim Blandy <jimb@redhat.com>
307 * Makefile.am (CGEN): Load guile.scm before calling the main
309 * Makefile.in: Regenerated.
310 * cgen.sh: Be prepared for the 'cgen' argument to contain spaces.
311 Simply pass the cgen-opc.scm path to ${cgen} as its first
312 argument; ${cgen} itself now contains the '-s', or whatever is
313 appropriate for the Scheme being used.
315 2005-01-31 Andrew Cagney <cagney@gnu.org>
317 * configure: Regenerate to track ../gettext.m4.
319 2005-01-31 Jan Beulich <jbeulich@novell.com>
321 * ia64-gen.c (NELEMS): Define.
322 (shrink): Generate alias with missing second predicate register when
323 opcode has two outputs and these are both predicates.
324 * ia64-opc-i.c (FULL17): Define.
325 (ia64_opcodes_i): Add mov-to-pr alias without second input. Use FULL17
326 here to generate output template.
327 (TBITCM, TNATCM): Undefine after use.
328 * ia64-opc-m.c (ia64_opcodes_i): Add alloc alias without ar.pfs as
329 first input. Add ld16 aliases without ar.csd as second output. Add
330 st16 aliases without ar.csd as second input. Add cmpxchg aliases
331 without ar.ccv as third input. Add cmp8xchg16 aliases without ar.csd/
332 ar.ccv as third/fourth inputs. Consolidate through...
333 (CMPXCHG_acq, CMPXCHG_rel, CMPXCHG_1, CMPXCHG_2, CMPXCHG_4, CMPXCHG_8,
334 CMPXCHGn, CMP8XCHG16, CMPXCHG_ALL): Define.
335 * ia64-asmtab.c: Regenerate.
337 2005-01-27 Andrew Cagney <cagney@gnu.org>
339 * configure: Regenerate to track ../gettext.m4 change.
341 2005-01-25 Alexandre Oliva <aoliva@redhat.com>
343 2004-11-10 Alexandre Oliva <aoliva@redhat.com>
344 * frv-asm.c: Rebuilt.
345 * frv-desc.c: Rebuilt.
346 * frv-desc.h: Rebuilt.
347 * frv-dis.c: Rebuilt.
348 * frv-ibld.c: Rebuilt.
349 * frv-opc.c: Rebuilt.
350 * frv-opc.h: Rebuilt.
352 2005-01-24 Andrew Cagney <cagney@gnu.org>
354 * configure: Regenerate, ../gettext.m4 was updated.
356 2005-01-21 Fred Fish <fnf@specifixinc.com>
358 * mips-opc.c: Change INSN_ALIAS to INSN2_ALIAS.
359 Change INSN_WRITE_MDMX_ACC to INSN2_WRITE_MDMX_ACC.
360 Change INSN_READ_MDMX_ACC to INSN2_READ_MDMX_ACC.
363 2005-01-20 Alan Modra <amodra@bigpond.net.au>
365 * ppc-opc.c (powerpc_opcodes): Add optional 'l' arg to tlbiel.
367 2005-01-19 Fred Fish <fnf@specifixinc.com>
369 * mips-dis.c (no_aliases): New disassembly option flag.
370 (set_default_mips_dis_options): Init no_aliases to zero.
371 (parse_mips_dis_option): Handle no-aliases option.
372 (print_insn_mips): Ignore table entries that are aliases
373 if no_aliases is set.
374 (print_insn_mips16): Ditto.
375 * mips-opc.c (mips_builtin_opcodes): Add initializer column for
376 new pinfo2 member and add INSN_ALIAS initializers as needed. Also
377 move WR_MACC and RD_MACC initializers from pinfo to pinfo2.
378 * mips16-opc.c (mips16_opcodes): Ditto.
380 2005-01-17 Andrew Stubbs <andrew.stubbs@st.com>
382 * sh-opc.h (arch_sh2a_or_sh3e,arch_sh2a_or_sh4): Correct definition.
383 (inheritance diagram): Add missing edge.
384 (arch_sh1_up): Rename arch_sh_up to match external name to make life
385 easier for the testsuite.
386 (arch_sh4_nofp_up): Likewise, rename arch_sh4_nofpu_up.
387 (arch_sh4a_nofp_up): Likewise, rename arch_sh4a_nofpu_up.
388 (arch_sh2a_nofpu_or_sh4_nommu_nofpu_up): Add missing
389 arch_sh2a_or_sh4_up child.
390 (sh_table): Do renaming as above.
391 Correct comment for ldc.l for gas testsuite to read.
392 Remove rogue mul.l from sh1 (duplicate of the one for sh2).
393 Correct comments for movy.w and movy.l for gas testsuite to read.
394 Correct comments for fmov.d and fmov.s for gas testsuite to read.
396 2005-01-12 H.J. Lu <hongjiu.lu@intel.com>
398 * i386-dis.c (OP_E): Don't ignore scale in SIB for 64 bit mode.
400 2005-01-12 H.J. Lu <hongjiu.lu@intel.com>
402 * i386-dis.c (OP_E): Ignore scale when index == 0x4 in SIB.
404 2005-01-10 Andreas Schwab <schwab@suse.de>
406 * disassemble.c (disassemble_init_for_target) <case
407 bfd_arch_ia64>: Set skip_zeroes to 16.
408 <case bfd_arch_tic4x>: Set skip_zeroes to 32.
410 2004-12-23 Tomer Levi <Tomer.Levi@nsc.com>
412 * crx-opc.c: Mark 'bcop' instruction as RELAXABLE.
414 2004-12-14 Svein E. Seldal <Svein.Seldal@solidas.com>
416 * avr-dis.c: Prettyprint. Added printing of symbol names in all
417 memory references. Convert avr_operand() to C90 formatting.
419 2004-12-05 Tomer Levi <Tomer.Levi@nsc.com>
421 * crx-dis.c (print_arg): Use 'info->print_address_func' for address printing.
423 2004-11-29 Tomer Levi <Tomer.Levi@nsc.com>
425 * crx-opc.c (crx_optab): Mark all rbase_disps* operands as signed.
426 (no_op_insn): Initialize array with instructions that have no
428 * crx-dis.c (make_instruction): Get rid of COP_BRANCH_INS operand swapping.
430 2004-11-29 Richard Earnshaw <rearnsha@arm.com>
432 * arm-dis.c: Correct top-level comment.
434 2004-11-27 Richard Earnshaw <rearnsha@arm.com>
436 * arm-opc.h (arm_opcode, thumb_opcode): Add extra field for the
437 architecuture defining the insn.
438 (arm_opcodes, thumb_opcodes): Delete. Move to ...
439 * arm-dis.c (arm_opcodes, thumb_opcodes): Here. Add architecutre
441 Also include opcode/arm.h.
442 * Makefile.am (arm-dis.lo): Update dependency list.
443 * Makefile.in: Regenerate.
445 2004-11-22 Ravi Ramaseshan <ravi.ramaseshan@codito.com>
447 * opcode/arc-opc.c (insert_base): Modify ls_operand[LS_OFFSET] to
448 reflect the change to the short immediate syntax.
450 2004-11-19 Alan Modra <amodra@bigpond.net.au>
452 * or32-opc.c (debug): Warning fix.
453 * po/POTFILES.in: Regenerate.
455 * maxq-dis.c: Formatting.
456 (print_insn): Warning fix.
458 2004-11-17 Daniel Jacobowitz <dan@codesourcery.com>
460 * arm-dis.c (WORD_ADDRESS): Define.
461 (print_insn): Use it. Correct big-endian end-of-section handling.
463 2004-11-08 Inderpreet Singh <inderpreetb@nioda.hcltech.com>
464 Vineet Sharma <vineets@noida.hcltech.com>
466 * maxq-dis.c: New file.
467 * disassemble.c (ARCH_maxq): Define.
468 (disassembler): Add 'print_insn_maxq_little' for handling maxq
470 * configure.in: Add case for bfd_maxq_arch.
471 * configure: Regenerate.
472 * Makefile.am: Add support for maxq-dis.c
473 * Makefile.in: Regenerate.
474 * aclocal.m4: Regenerate.
476 2004-11-05 Tomer Levi <Tomer.Levi@nsc.com>
478 * crx-opc.c (crx_optab): Rename 'arg_icr' to 'arg_idxr' for Index register
480 * crx-dis.c: Likewise.
482 2004-11-04 Hans-Peter Nilsson <hp@axis.com>
484 Generally, handle CRISv32.
485 * cris-dis.c (TRACE_CASE): Define as (disdata->trace_case).
486 (struct cris_disasm_data): New type.
487 (format_reg, format_hex, cris_constraint, print_flags)
488 (get_opcode_entry): Add struct cris_disasm_data * parameter. All
490 (format_sup_reg, print_insn_crisv32_with_register_prefix)
491 (print_insn_crisv32_without_register_prefix)
492 (print_insn_crisv10_v32_with_register_prefix)
493 (print_insn_crisv10_v32_without_register_prefix)
494 (cris_parse_disassembler_options): New functions.
495 (bytes_to_skip, cris_spec_reg): Add enum cris_disass_family
496 parameter. All callers changed.
497 (get_opcode_entry): Call malloc, not xmalloc. Return NULL on
499 (cris_constraint) <case 'Y', 'U'>: New cases.
500 (bytes_to_skip): Handle 'Y' and 'N' as 's'. Skip size is 4 bytes
502 (print_with_operands) <case 'Y'>: New case.
503 (print_with_operands) <case 'T', 'A', '[', ']', 'd', 'n', 'u'>
504 <case 'N', 'Y', 'Q'>: New cases.
505 (print_insn_cris_generic): Emit "bcc ." for zero and CRISv32.
506 (print_insn_cris_with_register_prefix)
507 (print_insn_cris_without_register_prefix): Call
508 cris_parse_disassembler_options.
509 * cris-opc.c (cris_spec_regs): Mention that this table isn't used
510 for CRISv32 and the size of immediate operands. New v32-only
511 entries for bz, pid, srs, wz, exs, eda, dz, ebp, erp, nrp, ccs and
512 spc. Add v32-only 4-byte entries for p2, p3, p5 and p6. Change
513 ccr, ibr, irp to be v0..v10. Change bar, dccr to be v8..v10.
514 Change brp to be v3..v10.
515 (cris_support_regs): New vector.
516 (cris_opcodes): Update head comment. New format characters '[',
517 ']', space, 'A', 'd', 'N', 'n', 'Q', 'T', 'u', 'U', 'Y'.
518 Add new opcodes for v32 and adjust existing opcodes to accommodate
519 differences to earlier variants.
520 (cris_cond15s): New vector.
522 2004-11-04 Jan Beulich <jbeulich@novell.com>
524 * i386-dis.c (Eq, Edqw, indirEp, Gdq, I1): Define.
526 (Mp): Use f_mode rather than none at all.
527 (t_mode, dq_mode, dqw_mode, f_mode, const_1_mode): Define. t_mode
528 replaces what previously was x_mode; x_mode now means 128-bit SSE
530 (dis386): Make far jumps and calls have an 'l' prefix only in AT&T
531 mode. movmskpX's, pextrw's, and pmovmskb's first operands are Gdq.
532 pinsrw's second operand is Edqw.
533 (grps): 1-bit shifts' and rotates' second operands are I1. cmpxchg8b's
534 operand is Eq. movntq's and movntdq's first operands are EM. s[gi]dt,
535 fldenv, frstor, fsave, fstenv all should also have suffixes in Intel
536 mode when an operand size override is present or always suffixing.
537 More instructions will need to be added to this group.
538 (putop): Handle new macro chars 'C' (short/long suffix selector),
539 'I' (Intel mode override for following macro char), and 'J' (for
540 adding the 'l' prefix to far branches in AT&T mode). When an
541 alternative was specified in the template, honor macro character when
542 specified for Intel mode.
543 (OP_E): Handle new *_mode values. Correct pointer specifications for
544 memory operands. Consolidate output of index register.
545 (OP_G): Handle new *_mode values.
546 (OP_I): Handle const_1_mode.
547 (OP_ESreg, OP_DSreg): Generate pointer specifications. Indicate
548 respective opcode prefix bits have been consumed.
549 (OP_EM, OP_EX): Provide some default handling for generating pointer
552 2004-10-28 Tomer Levi <Tomer.Levi@nsc.com>
554 * crx-opc.c (REV_COP_INST): New macro, reverse operand order of
557 2004-10-27 Tomer Levi <Tomer.Levi@nsc.com>
559 * crx-dis.c (enum REG_ARG_TYPE): New, replacing COP_ARG_TYPE.
560 (getregliststring): Support HI/LO and user registers.
561 * crx-opc.c (crx_instruction): Update data structure according to the
562 rearrangement done in CRX opcode header file.
563 (crx_regtab): Likewise.
564 (crx_optab): Likewise.
565 (crx_instruction): Reorder load/stor instructions, remove unsupported
567 support new Co-Processor instruction 'cpi'.
569 2004-10-27 Nick Clifton <nickc@redhat.com>
571 * opcodes/iq2000-asm.c: Regenerate.
572 * opcodes/iq2000-desc.c: Regenerate.
573 * opcodes/iq2000-desc.h: Regenerate.
574 * opcodes/iq2000-dis.c: Regenerate.
575 * opcodes/iq2000-ibld.c: Regenerate.
576 * opcodes/iq2000-opc.c: Regenerate.
577 * opcodes/iq2000-opc.h: Regenerate.
579 2004-10-21 Tomer Levi <Tomer.Levi@nsc.com>
581 * crx-opc.c (crx_instruction): Replace i3, i4, i5 with us3,
582 us4, us5 (respectively).
583 Remove unsupported 'popa' instruction.
584 Reverse operands order in store co-processor instructions.
586 2004-10-15 Alan Modra <amodra@bigpond.net.au>
588 * Makefile.am: Run "make dep-am"
589 * Makefile.in: Regenerate.
591 2004-10-12 Bob Wilson <bob.wilson@acm.org>
593 * xtensa-dis.c: Use ISO C90 formatting.
595 2004-10-09 Alan Modra <amodra@bigpond.net.au>
597 * ppc-opc.c: Revert 2004-09-09 change.
599 2004-10-07 Bob Wilson <bob.wilson@acm.org>
601 * xtensa-dis.c (state_names): Delete.
602 (fetch_data): Use xtensa_isa_maxlength.
603 (print_xtensa_operand): Replace operand parameter with opcode/operand
604 pair. Remove print_sr_name parameter. Use new xtensa-isa.h functions.
605 (print_insn_xtensa): Use new xtensa-isa.h functions. Handle multislot
606 instruction bundles. Use xmalloc instead of malloc.
608 2004-10-07 David Gibson <david@gibson.dropbear.id.au>
610 * ppc-opc.c: Replace literal "0"s with NULLs in pointer
613 2004-10-07 Tomer Levi <Tomer.Levi@nsc.com>
615 * crx-opc.c (crx_instruction): Support Co-processor insns.
616 * crx-dis.c (COP_ARG_TYPE): New enum for CO-Processor arguments.
617 (getregliststring): Change function to use the above enum.
618 (print_arg): Handle CO-Processor insns.
619 (crx_cinvs): Add 'b' option to invalidate the branch-target
622 2004-10-06 Aldy Hernandez <aldyh@redhat.com>
624 * ppc-opc.c (powerpc_opcodes): Add efscfd, efdabs, efdnabs,
625 efdneg, efdadd, efdsub, efdmul, efddiv, efdcmpgt, efdcmplt,
626 efdcmpeq, efdtstgt, efdtstlt, efdtsteq, efdcfsi, efdcfsid,
627 efdcfui, efdcfuid, efdcfsf, efdcfuf, efdctsi, efdctsidz, efdctsiz,
628 efdctui, efdctuidz, efdctuiz, efdctsf, efdctuf, efdctuf, efdcfs.
630 2004-10-01 Bill Farmer <Bill@the-farmers.freeserve.co.uk>
632 * pdp11-dis.c (print_insn_pdp11): Subtract the SOB's displacement
635 2004-09-30 Paul Brook <paul@codesourcery.com>
637 * arm-dis.c (print_insn_arm): Handle 'e' for SMI instruction.
638 * arm-opc.h: Document %e. Add ARMv6ZK instructions.
640 2004-09-17 H.J. Lu <hongjiu.lu@intel.com>
642 * Makefile.am (AUTOMAKE_OPTIONS): Require 1.9.
643 (CONFIG_STATUS_DEPENDENCIES): New.
645 (config.status): Likewise.
646 * Makefile.in: Regenerated.
648 2004-09-17 Alan Modra <amodra@bigpond.net.au>
650 * Makefile.am: Run "make dep-am".
651 * Makefile.in: Regenerate.
652 * aclocal.m4: Regenerate.
653 * configure: Regenerate.
654 * po/POTFILES.in: Regenerate.
655 * po/opcodes.pot: Regenerate.
657 2004-09-11 Andreas Schwab <schwab@suse.de>
659 * configure: Rebuild.
661 2004-09-09 Segher Boessenkool <segher@kernel.crashing.org>
663 * ppc-opc.c (L): Make this field not optional.
665 2004-09-03 Tomer Levi <Tomer.Levi@nsc.com>
667 * opc-crx.c: Rename 'popma' to 'popa', remove 'pushma'.
668 Fix parameter to 'm[t|f]csr' insns.
670 2004-08-30 Nathanael Nerode <neroden@gcc.gnu.org>
672 * configure.in: Autoupdate to autoconf 2.59.
673 * aclocal.m4: Rebuild with aclocal 1.4p6.
674 * configure: Rebuild with autoconf 2.59.
675 * Makefile.in: Rebuild with automake 1.4p6 (picking up
676 bfd changes for autoconf 2.59 on the way).
677 * config.in: Rebuild with autoheader 2.59.
679 2004-08-27 Richard Sandiford <rsandifo@redhat.com>
681 * frv-desc.[ch], frv-opc.[ch]: Regenerated.
683 2004-07-30 Michal Ludvig <mludvig@suse.cz>
685 * i386-dis.c (GRPPADLCK): Renamed to GRPPADLCK1
686 (GRPPADLCK2): New define.
687 (twobyte_has_modrm): True for 0xA6.
688 (grps): GRPPADLCK2 for opcode 0xA6.
690 2004-07-29 Alexandre Oliva <aoliva@redhat.com>
692 Introduce SH2a support.
693 * sh-opc.h (arch_sh2a_base): Renumber.
694 (arch_sh2a_nofpu_base): Remove.
695 (arch_sh_base_mask): Adjust.
696 (arch_opann_mask): New.
697 (arch_sh2a, arch_sh2a_nofpu): Adjust.
698 (arch_sh2a_up, arch_sh2a_nofpu_up): Likewise.
699 (sh_table): Adjust whitespace.
700 2004-02-24 Corinna Vinschen <vinschen@redhat.com>
701 * sh-opc.h (arch_sh2a_nofpu_up): New. Use instead of arch_sh2a_up in
702 instruction list throughout.
703 (arch_sh2a_up): Redefine to include fpu instruction set. Use instead
704 of arch_sh2a in instruction list throughout.
705 (arch_sh2e_up): Accomodate above changes.
706 (arch_sh2_up): Ditto.
707 2004-02-20 Corinna Vinschen <vinschen@redhat.com>
708 * sh-opc.h: Add arch_sh2a_nofpu to arch_sh2_up.
709 2004-02-18 Corinna Vinschen <vinschen@redhat.com>
710 * sh-dis.c (print_insn_sh): Add bfd_mach_sh2a_nofpu handling.
711 * sh-opc.h (arch_sh2a_nofpu): New.
712 (arch_sh2a_up): New, defines sh2a and sh2a_nofpu.
713 (sh_table): Change all arch_sh2a to arch_sh2a_up unless FPU
715 2004-01-20 DJ Delorie <dj@redhat.com>
716 * sh-dis.c (print_insn_sh): SH2A does not have 'X' fp regs.
717 2003-12-29 DJ Delorie <dj@redhat.com>
718 * sh-opc.c (sh_nibble_type, sh_arg_type, arch_2a, arch_2e_up,
719 sh_opcode_info, sh_table): Add sh2a support.
720 (arch_op32): New, to tag 32-bit opcodes.
721 * sh-dis.c (print_insn_sh): Support sh2a opcodes.
722 2003-12-02 Michael Snyder <msnyder@redhat.com>
723 * sh-opc.h (arch_sh2a): Add.
724 * sh-dis.c (arch_sh2a): Handle.
725 * sh-opc.h (arch_sh2_up): Fix up to include arch_sh2a.
727 2004-07-27 Tomer Levi <Tomer.Levi@nsc.com>
729 * crx-opc.c: Add popx,pushx insns. Indent code, fix comments.
731 2004-07-22 Nick Clifton <nickc@redhat.com>
734 * h8300-dis.c (bfd_h8_disassemble): Do not dump raw bytes for the
735 insns - this is done by objdump itself.
736 * h8500-dis.c (print_insn_h8500): Likewise.
738 2004-07-21 Jan Beulich <jbeulich@novell.com>
740 * i386-dis.c (OP_E): Show rip-relative addressing in 64-bit mode
741 regardless of address size prefix in effect.
742 (ptr_reg): Size or address registers does not depend on rex64, but
743 on the presence of an address size override.
744 (OP_MMX): Use rex.x only for xmm registers.
745 (OP_EM): Use rex.z only for xmm registers.
747 2004-07-20 Maciej W. Rozycki <macro@linux-mips.org>
749 * mips-opc.c (mips_builtin_opcodes): Move coprocessor 2
750 move/branch operations to the bottom so that VR5400 multimedia
751 instructions take precedence in disassembly.
753 2004-07-20 Maciej W. Rozycki <macro@linux-mips.org>
755 * mips-opc.c (mips_builtin_opcodes): Remove the MIPS32
756 ISA-specific "break" encoding.
758 2004-07-13 Elvis Chiang <elvisfb@gmail.com>
760 * arm-opc.h: Fix typo in comment.
762 2004-07-11 Andreas Schwab <schwab@suse.de>
764 * m68k-dis.c (m68k_valid_ea): Fix typos in last change.
766 2004-07-09 Andreas Schwab <schwab@suse.de>
768 * m68k-dis.c (m68k_valid_ea): Check validity of all codes.
770 2004-07-07 Tomer Levi <Tomer.Levi@nsc.com>
772 * Makefile.am (CFILES): Add crx-dis.c, crx-opc.c.
773 (ALL_MACHINES): Add crx-dis.lo, crx-opc.lo.
774 (crx-dis.lo): New target.
775 (crx-opc.lo): Likewise.
776 * Makefile.in: Regenerate.
777 * configure.in: Handle bfd_crx_arch.
778 * configure: Regenerate.
779 * crx-dis.c: New file.
780 * crx-opc.c: New file.
781 * disassemble.c (ARCH_crx): Define.
782 (disassembler): Handle ARCH_crx.
784 2004-06-29 James E Wilson <wilson@specifixinc.com>
786 * ia64-opc-a.c (ia64_opcodes_a): Delete mov immediate pseudo for adds.
787 * ia64-asmtab.c: Regnerate.
789 2004-06-28 Alan Modra <amodra@bigpond.net.au>
791 * ppc-opc.c (insert_fxm): Handle mfocrf and mtocrf.
792 (extract_fxm): Don't test dialect.
793 (XFXFXM_MASK): Include the power4 bit.
794 (XFXM): Add p4 param.
795 (powerpc_opcodes): Add mfocrf and mtocrf. Adjust mtcr.
797 2004-06-27 Alexandre Oliva <aoliva@redhat.com>
799 2003-07-21 Richard Sandiford <rsandifo@redhat.com>
800 * disassemble.c (disassembler): Handle bfd_mach_h8300sxn.
802 2004-06-26 Alan Modra <amodra@bigpond.net.au>
804 * ppc-opc.c (BH, XLBH_MASK): Define.
805 (powerpc_opcodes): Allow BH field on bclr, bclrl, bcctr, bcctrl.
807 2004-06-24 Alan Modra <amodra@bigpond.net.au>
809 * i386-dis.c (x_mode): Comment.
810 (two_source_ops): File scope.
811 (float_mem): Correct fisttpll and fistpll.
812 (float_mem_mode): New table.
814 (OP_E): Correct intel mode PTR output.
815 (ptr_reg): Use open_char and close_char.
816 (PNI_Fixup): Handle possible suffix on sidt. Use op1out etc. for
817 operands. Set two_source_ops.
819 2004-06-15 Alan Modra <amodra@bigpond.net.au>
821 * arc-ext.c (build_ARC_extmap): Use bfd_get_section_size
822 instead of _raw_size.
824 2004-06-08 Jakub Jelinek <jakub@redhat.com>
826 * ia64-gen.c (in_iclass): Handle more postinc st
828 * ia64-asmtab.c: Rebuilt.
830 2004-06-01 Martin Schwidefsky <schwidefsky@de.ibm.com>
832 * s390-opc.txt: Correct architecture mask for some opcodes.
833 lrv, lrvh, strv, ml, dl, alc, slb rll and mvclu are available
834 in the esa mode as well.
836 2004-05-28 Andrew Stubbs <andrew.stubbs@superh.com>
838 * sh-dis.c (target_arch): Make unsigned.
839 (print_insn_sh): Replace (most of) switch with a call to
840 sh_get_arch_from_bfd_mach(). Also use new architecture flags system.
841 * sh-opc.h: Redefine architecture flags values.
842 Add sh3-nommu architecture.
843 Reorganise <arch>_up macros so they make more visual sense.
844 (SH_MERGE_ARCH_SET): Define new macro.
845 (SH_VALID_BASE_ARCH_SET): Likewise.
846 (SH_VALID_MMU_ARCH_SET): Likewise.
847 (SH_VALID_CO_ARCH_SET): Likewise.
848 (SH_VALID_ARCH_SET): Likewise.
849 (SH_MERGE_ARCH_SET_VALID): Likewise.
850 (SH_ARCH_SET_HAS_FPU): Likewise.
851 (SH_ARCH_SET_HAS_DSP): Likewise.
852 (SH_ARCH_UNKNOWN_ARCH): Likewise.
853 (sh_get_arch_from_bfd_mach): Add prototype.
854 (sh_get_arch_up_from_bfd_mach): Likewise.
855 (sh_get_bfd_mach_from_arch_set): Likewise.
856 (sh_merge_bfd_arc): Likewise.
858 2004-05-24 Peter Barada <peter@the-baradas.com>
860 * m68k-dis.c(print_insn_m68k): Strip body of diassembly out
861 into new match_insn_m68k function. Loop over canidate
862 matches and select first that completely matches.
863 * m68k-dis.c(print_insn_arg): Fix 'g' case to only extract 1 bit.
864 * m68k-dis.c(print_insn_arg): Call new function m68k_valid_ea
865 to verify addressing for MAC/EMAC.
866 * m68k-dis.c(print_insn_arg): Use reg_half_names for MAC/EMAC
867 reigster halves since 'fpu' and 'spl' look misleading.
868 * m68k-dis.c(fetch_arg): Fix 'G', 'H', 'I', 'f', 'M', 'N' cases.
869 * m68k-opc.c: Rearragne mac/emac cases to use longest for
870 first, tighten up match masks.
871 * m68k-opc.c: Add 'size' field to struct m68k_opcode. Produce
872 'size' from special case code in print_insn_m68k to
873 determine decode size of insns.
875 2004-05-19 Alan Modra <amodra@bigpond.net.au>
877 * ppc-opc.c (insert_fxm): Enable two operand mfcr when -many as
878 well as when -mpower4.
880 2004-05-13 Nick Clifton <nickc@redhat.com>
882 * po/fr.po: Updated French translation.
884 2004-05-05 Peter Barada <peter@the-baradas.com>
886 * m68k-dis.c(print_insn_m68k): Add new chips, use core
887 variants in arch_mask. Only set m68881/68851 for 68k chips.
888 * m68k-op.c: Switch from ColdFire chips to core variants.
890 2004-05-05 Alan Modra <amodra@bigpond.net.au>
893 * ppc-opc.c (PPCVEC): Remove PPC_OPCODE_PPC.
895 2004-04-29 Ben Elliston <bje@au.ibm.com>
897 * ppc-opc.c (XCMPL): Renmame to XOPL. Update users.
898 (powerpc_opcodes): Add "dbczl" instruction for PPC970.
900 2004-04-22 Kaz Kojima <kkojima@rr.iij4u.or.jp>
902 * sh-dis.c (print_insn_sh): Print the value in constant pool
903 as a symbol if it looks like a symbol.
905 2004-04-22 Peter Barada <peter@the-baradas.com>
907 * m68k-dis.c(print_insn_m68k): Set mfcmac/mcfemac on
908 appropriate ColdFire architectures.
909 (print_insn_m68k): Handle EMAC, MAC/EMAC scalefactor, and MAC/EMAC
911 Add EMAC instructions, fix MAC instructions. Remove
912 macmw/macml/msacmw/msacml instructions since mask addressing now
915 2004-04-20 Jakub Jelinek <jakub@redhat.com>
917 * sparc-opc.c (fmoviccx, fmovfccx, fmovccx): Define.
918 (fmovicc, fmovfcc, fmovcc): Remove fpsize argument, change opcode to
919 suffix. Use fmov*x macros, create all 3 fpsize variants in one
920 macro. Adjust all users.
922 2004-04-15 Anil Paranjpe <anilp1@kpitcummins.com>
924 * h8300-dis.c (bfd_h8_disassemble) : Treat "adds" & "subs"
927 2004-03-30 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
929 * m32r-asm.c: Regenerate.
931 2004-03-29 Stan Shebs <shebs@apple.com>
933 * mpw-config.in, mpw-make.sed: Remove MPW support files, no longer
936 2004-03-19 Alan Modra <amodra@bigpond.net.au>
938 * aclocal.m4: Regenerate.
939 * config.in: Regenerate.
940 * configure: Regenerate.
941 * po/POTFILES.in: Regenerate.
942 * po/opcodes.pot: Regenerate.
944 2004-03-16 Alan Modra <amodra@bigpond.net.au>
946 * ppc-dis.c (print_insn_powerpc): Don't print tabs. Handle
948 * ppc-opc.c (RA0): Define.
949 (RAQ, RAL, RAM, RAS, RSQ, RTQ, RSO): Use PPC_OPERAND_GPR_0.
950 (RAOPT): Rename from RAO. Update all uses.
951 (powerpc_opcodes): Use RA0 as appropriate.
953 2004-03-15 Aldy Hernandez <aldyh@redhat.com>
955 * ppc-opc.c (powerpc_opcodes): Add BOOKE versions of mfsprg.
957 2004-03-15 Alan Modra <amodra@bigpond.net.au>
959 * sparc-dis.c (print_insn_sparc): Update getword prototype.
961 2004-03-12 Michal Ludvig <mludvig@suse.cz>
963 * i386-dis.c (GRPPLOCK): Delete.
964 (grps): Delete GRPPLOCK entry.
966 2004-03-12 Alan Modra <amodra@bigpond.net.au>
968 * i386-dis.c (OP_M, OP_0f0e, OP_0fae, NOP_Fixup): New functions.
970 (None, PADLOCK_SPECIAL, PADLOCK_0): Delete.
972 (dis386): Use NOP_Fixup on "nop".
973 (dis386_twobyte): Use GRPPADLCK on opcode 0xa7.
974 (twobyte_has_modrm): Set for 0xa7.
975 (padlock_table): Delete. Move to..
976 (grps): ..here, using OP_0f07. Use OP_Ofae on lfence, mfence
978 (print_insn): Revert PADLOCK_SPECIAL code.
979 (OP_E): Delete sfence, lfence, mfence checks.
981 2004-03-12 Jakub Jelinek <jakub@redhat.com>
983 * i386-dis.c (grps): Use INVLPG_Fixup instead of OP_E for invlpg.
984 (INVLPG_Fixup): New function.
985 (PNI_Fixup): Remove ATTRIBUTE_UNUSED from sizeflag.
987 2004-03-12 Michal Ludvig <mludvig@suse.cz>
989 * i386-dis.c (PADLOCK_SPECIAL, PADLOCK_0): New defines.
990 (dis386_twobyte): Opcode 0xa7 is PADLOCK_0.
991 (padlock_table): New struct with PadLock instructions.
992 (print_insn): Handle PADLOCK_SPECIAL.
994 2004-03-12 Alan Modra <amodra@bigpond.net.au>
996 * i386-dis.c (grps): Use clflush by default for 0x0fae/7.
997 (OP_E): Twiddle clflush to sfence here.
999 2004-03-08 Nick Clifton <nickc@redhat.com>
1001 * po/de.po: Updated German translation.
1003 2003-03-03 Andrew Stubbs <andrew.stubbs@superh.com>
1005 * sh-dis.c (print_insn_sh): Don't disassemble fp instructions in
1006 nofpu mode. Add BFD type bfd_mach_sh4_nommu_nofpu.
1007 * sh-opc.h: Add sh4_nommu_nofpu architecture and adjust instructions
1010 2004-03-01 Richard Sandiford <rsandifo@redhat.com>
1012 * frv-asm.c: Regenerate.
1013 * frv-desc.c: Regenerate.
1014 * frv-desc.h: Regenerate.
1015 * frv-dis.c: Regenerate.
1016 * frv-ibld.c: Regenerate.
1017 * frv-opc.c: Regenerate.
1018 * frv-opc.h: Regenerate.
1020 2004-03-01 Richard Sandiford <rsandifo@redhat.com>
1022 * frv-desc.c, frv-opc.c: Regenerate.
1024 2004-03-01 Richard Sandiford <rsandifo@redhat.com>
1026 * frv-desc.c, frv-opc.c, frv-opc.h: Regenerate.
1028 2004-02-26 Andrew Stubbs <andrew.stubbs@superh.com>
1030 * sh-opc.h: Move fsca and fsrra instructions from sh4a to sh4.
1031 Also correct mistake in the comment.
1033 2004-02-26 Andrew Stubbs <andrew.stubbs@superh.com>
1035 * sh-dis.c (print_insn_sh): Add REG_N_D nibble type to
1036 ensure that double registers have even numbers.
1037 Add REG_N_B01 for nn01 (binary 01) nibble to ensure
1038 that reserved instruction 0xfffd does not decode the same
1040 * sh-opc.h: Add REG_N_D nibble type and use it whereever
1041 REG_N refers to a double register.
1042 Add REG_N_B01 nibble type and use it instead of REG_NM
1044 Adjust the bit patterns in a few comments.
1046 2004-02-25 Aldy Hernandez <aldyh@redhat.com>
1048 * ppc-opc.c (powerpc_opcodes): Change mask for dcbt and dcbtst.
1050 2004-02-20 Aldy Hernandez <aldyh@redhat.com>
1052 * ppc-opc.c (powerpc_opcodes): Move mfmcsrr0 before mfdc_dat.
1054 2004-02-20 Aldy Hernandez <aldyh@redhat.com>
1056 * ppc-opc.c (powerpc_opcodes): Add m*ivor35.
1058 2004-02-20 Aldy Hernandez <aldyh@redhat.com>
1060 * ppc-opc.c (powerpc_opcodes): Add mfivor32, mfivor33, mfivor34,
1061 mtivor32, mtivor33, mtivor34.
1063 2004-02-19 Aldy Hernandez <aldyh@redhat.com>
1065 * ppc-opc.c (powerpc_opcodes): Add mfmcar.
1067 2004-02-10 Petko Manolov <petkan@nucleusys.com>
1069 * arm-opc.h Maverick accumulator register opcode fixes.
1071 2004-02-13 Ben Elliston <bje@wasabisystems.com>
1073 * m32r-dis.c: Regenerate.
1075 2004-01-27 Michael Snyder <msnyder@redhat.com>
1077 * sh-opc.h (sh_table): "fsrra", not "fssra".
1079 2004-01-23 Andrew Over <andrew.over@cs.anu.edu.au>
1081 * sparc-opc.c (fdtox, fstox, fqtox, fxtod, fxtos, fxtoq): Tighten
1084 2004-01-19 Andrew Over <andrew.over@cs.anu.edu.au>
1086 * sparc-opc.c (sparc_opcodes) <f[dsq]tox, fxto[dsq]>: Fix args.
1088 2004-01-19 Alan Modra <amodra@bigpond.net.au>
1090 * i386-dis.c (OP_E): Print scale factor on intel mode sib when not
1091 1. Don't print scale factor on AT&T mode when index missing.
1093 2004-01-16 Alexandre Oliva <aoliva@redhat.com>
1095 * m10300-opc.c (mov): 8- and 24-bit immediates are zero-extended
1096 when loaded into XR registers.
1098 2004-01-14 Richard Sandiford <rsandifo@redhat.com>
1100 * frv-desc.h: Regenerate.
1101 * frv-desc.c: Regenerate.
1102 * frv-opc.c: Regenerate.
1104 2004-01-13 Michael Snyder <msnyder@redhat.com>
1106 * sh-dis.c (print_insn_sh): Allocate 4 bytes for insn.
1108 2004-01-09 Paul Brook <paul@codesourcery.com>
1110 * arm-opc.h (arm_opcodes): Move generic mcrr after known
1113 2004-01-07 Daniel Jacobowitz <drow@mvista.com>
1115 * Makefile.am (libopcodes_la_DEPENDENCIES)
1116 (libopcodes_la_LIBADD): Revert 2003-05-17 change. Add explanatory
1117 comment about the problem.
1118 * Makefile.in: Regenerate.
1120 2004-01-06 Alexandre Oliva <aoliva@redhat.com>
1122 2003-12-19 Alexandre Oliva <aoliva@redhat.com>
1123 * frv-asm.c (parse_ulo16, parse_uhi16, parse_d12): Fix some
1124 cut&paste errors in shifting/truncating numerical operands.
1125 2003-08-04 Alexandre Oliva <aoliva@redhat.com>
1126 * frv-asm.c (parse_ulo16): Parse gotofflo and gotofffuncdesclo.
1127 (parse_uslo16): Likewise.
1128 (parse_uhi16): Parse gotoffhi and gotofffuncdeschi.
1129 (parse_d12): Parse gotoff12 and gotofffuncdesc12.
1130 (parse_s12): Likewise.
1131 2003-08-04 Alexandre Oliva <aoliva@redhat.com>
1132 * frv-asm.c (parse_ulo16): Parse gotlo and gotfuncdesclo.
1133 (parse_uslo16): Likewise.
1134 (parse_uhi16): Parse gothi and gotfuncdeschi.
1135 (parse_d12): Parse got12 and gotfuncdesc12.
1136 (parse_s12): Likewise.
1138 2004-01-02 Albert Bartoszko <albar@nt.kegel.com.pl>
1140 * msp430-dis.c (msp430_doubleoperand): Check for an 'add'
1141 instruction which looks similar to an 'rla' instruction.
1143 For older changes see ChangeLog-0203
1149 version-control: never