1 2013-02-19 H.J. Lu <hongjiu.lu@intel.com>
4 * i386-dis.c (rm_table): Add clac and stac to RM_0F01_REG_1.
6 * i386-gen.c (cpu_flag_init): Add CPU_SMAP_FLAGS.
7 (cpu_flags): Add CpuSMAP.
9 * i386-opc.h (CpuSMAP): New.
10 (i386_cpu_flags): Add cpusmap.
12 * i386-opc.tbl: Add clac and stac.
14 * i386-init.h: Regenerated.
15 * i386-tbl.h: Likewise.
17 2013-02-15 Markos Chandras <markos.chandras@imgtec.com>
19 * metag-dis.c: Initialize outf->bytes_per_chunk to 4
20 which also makes the disassembler output be in little
21 endian like it should be.
23 2013-02-14 Yufeng Zhang <yufeng.zhang@arm.com>
25 * aarch64-opc.c (aarch64_prfops): Change unnamed operation 'name'
27 (aarch64_print_operand): Adjust the printing for AARCH64_OPND_PRFOP.
29 2013-02-13 Maciej W. Rozycki <macro@codesourcery.com>
31 * mips-dis.c (is_compressed_mode_p): Only match symbols from the
34 2013-02-11 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
36 * arm-dis.c: Update strht pattern.
38 2013-02-09 Jürgen Urban <JuergenUrban@gmx.de>
40 * mips-opc.c (mips_builtin_opcodes): Enable l.d and s.d macros for
41 single-float. Disable ll, lld, sc and scd for EE. Disable the
42 trunc.w.s macro for EE.
44 2013-02-06 Sandra Loosemore <sandra@codesourcery.com>
45 Andrew Jenner <andrew@codesourcery.com>
47 Based on patches from Altera Corporation.
49 * Makefile.am (TARGET_LIBOPCODES_CFILES): Add nios2-dis.c and
51 * Makefile.in: Regenerated.
52 * configure.in: Add case for bfd_nios2_arch.
53 * configure: Regenerated.
54 * disassemble.c (ARCH_nios2): Define.
55 (disassembler): Add case for bfd_arch_nios2.
56 * nios2-dis.c: New file.
57 * nios2-opc.c: New file.
59 2013-02-04 Alan Modra <amodra@gmail.com>
61 * po/POTFILES.in: Regenerate.
62 * rl78-decode.c: Regenerate.
63 * rx-decode.c: Regenerate.
65 2013-01-30 Yufeng Zhang <yufeng.zhang@arm.com>
67 * aarch64-tbl.h (aarch64_opcode_table): Flag sshll, sshll2, ushll and
68 ushll2 with F_HAS_ALIAS. Add entries for sxtl, sxtl2, uxtl and uxtl2.
69 * aarch64-asm.c (convert_xtl_to_shll): New function.
70 (convert_to_real): Handle OP_SXTL, OP_SXTL2, OP_UXTL and OP_UXTL2 by
71 calling convert_xtl_to_shll.
72 * aarch64-dis.c (convert_shll_to_xtl): New function.
73 (convert_to_alias): Handle OP_SXTL, OP_SXTL2, OP_UXTL and OP_UXTL2 by
74 calling convert_shll_to_xtl.
75 * aarch64-gen.c: Update copyright year.
76 * aarch64-asm-2.c: Re-generate.
77 * aarch64-dis-2.c: Re-generate.
78 * aarch64-opc-2.c: Re-generate.
80 2013-01-24 Nick Clifton <nickc@redhat.com>
82 * v850-dis.c: Add support for e3v5 architecture.
83 * v850-opc.c: Likewise.
85 2013-01-17 Yufeng Zhang <yufeng.zhang@arm.com>
87 * aarch64-asm.c (aarch64_ins_advsimd_imm_modified): Handle 8-bit MOVI.
88 * aarch64-dis.c (aarch64_ext_advsimd_imm_modified): Likewise.
89 * aarch64-opc.c (operand_general_constraint_met_p): For
90 AARCH64_MOD_LSL, move the range check on the shift amount before the
91 alignment check; change to call set_sft_amount_out_of_range_error
92 instead of set_imm_out_of_range_error.
93 * aarch64-tbl.h (QL_SIMD_IMM_B): Replace NIL with LSL.
94 (aarch64_opcode_table): Remove the OP enumerator from the asimdimm
95 8-bit MOVI entry; change the 2nd operand from SIMD_IMM to
98 2013-01-16 H.J. Lu <hongjiu.lu@intel.com>
100 * i386-gen.c (operand_type_init): Add OPERAND_TYPE_IMM32_64.
102 * i386-init.h: Regenerated.
103 * i386-tbl.h: Likewise.
105 2013-01-15 Nick Clifton <nickc@redhat.com>
107 * v850-dis.c (get_operand_value): Sign extend V850E_IMMEDIATE
109 * v850-opc.c (IMM16LO): Add V850_OPERAND_SIGNED attribute.
111 2013-01-14 Will Newton <will.newton@imgtec.com>
113 * metag-dis.c (REG_WIDTH): Increase to 64.
115 2013-01-10 Peter Bergner <bergner@vnet.ibm.com>
117 * ppc-dis.c (ppc_opts): Add "power8", "pwr8" and "htm" entries.
118 * ppc-opc.c (HTM_R, HTM_SI, XRTRB_MASK, XRTRARB_MASK, XRTLRARB_MASK,
119 XRTARARB_MASK, XRTBFRARB_MASK, XRCL, POWER8, PPCHTM): New defines.
121 <"tabort.", "tabortdc.", "tabortdci.", "tabortwc.",
122 "tabortwci.", "tbegin.", "tcheck", "tend.", "trechkpt.",
123 "treclaim.", "tsr.">: Add POWER8 HTM opcodes.
124 <"tendall.", "tresume.", "tsuspend.">: Add POWER8 HTM extended opcodes.
126 2013-01-10 Will Newton <will.newton@imgtec.com>
128 * Makefile.am: Add Meta.
129 * configure.in: Add Meta.
130 * disassemble.c: Add Meta support.
131 * metag-dis.c: New file.
132 * Makefile.in: Regenerate.
133 * configure: Regenerate.
135 2013-01-07 Kaushik Phatak <kaushik.phatak@kpitcummins.com>
137 * cr16-dis.c (make_instruction): Rename to cr16_make_instruction.
138 (match_opcode): Rename to cr16_match_opcode.
140 2013-01-04 Juergen Urban <JuergenUrban@gmx.de>
142 * mips-dis.c: Add names for CP0 registers of r5900.
143 * mips-opc.c: Add M_SQ_AB and M_LQ_AB to support larger range for
144 instructions sq and lq.
145 Add support for MIPS r5900 CPU.
146 Add support for 128 bit MMI (Multimedia Instructions).
147 Add support for EE instructions (Emotion Engine).
148 Disable unsupported floating point instructions (64 bit and
149 undefined compare operations).
150 Enable instructions of MIPS ISA IV which are supported by r5900.
151 Disable 64 bit co processor instructions.
152 Disable 64 bit multiplication and division instructions.
153 Disable instructions for co-processor 2 and 3, because these are
154 not supported (preparation for later VU0 support (Vector Unit)).
155 Disable cvt.w.s because this behaves like trunc.w.s and the
156 correct execution can't be ensured on r5900.
157 Add trunc.w.s using the opcode encoding of cvt.w.s on r5900. This
158 will confuse less developers and compilers.
160 2013-01-04 Yufeng Zhang <yufeng.zhang@arm.com>
162 * aarch64-opc.c (aarch64_print_operand): Change to print
163 AARCH64_OPND_IMM_MOV in hexadecimal in the instruction and in decimal
165 * aarch64-tbl.h (aarch64_opcode_table): Remove the 'F_PSEUDO' flag
166 from the opcode entries of OP_MOV_IMM_LOG, OP_MOV_IMM_WIDEN and
169 2013-01-04 Yufeng Zhang <yufeng.zhang@arm.com>
171 * aarch64-opc.c (aarch64_prfops): Update to support PLIL1KEEP,
172 PLIL1STRM, PLIL2KEEP, PLIL2STRM, PLIL3KEEP and PLIL3STRM.
174 2013-01-02 H.J. Lu <hongjiu.lu@intel.com>
176 * i386-gen.c (process_copyright): Update copyright year to 2013.
178 2013-01-02 Kaushik Phatak <kaushik.phatak@kpitcummins.com>
180 * cr16-dis.c (match_opcode,make_instruction): Remove static
182 (dwordU,wordU): Moved typedefs to opcode/cr16.h
183 (cr16_words,cr16_allWords,cr16_currInsn): Added prefix 'cr16_'.
185 For older changes see ChangeLog-2012
187 Copyright (C) 2013 Free Software Foundation, Inc.
189 Copying and distribution of this file, with or without modification,
190 are permitted in any medium without royalty provided the copyright
191 notice and this notice are preserved.
197 version-control: never