1 2005-08-13 John David Anglin <dave.anglin@nrc-cnrc.gc.ca>
3 * hppa-dis.c (print_insn_hppa): Don't print '%' before register names.
4 Use "rp" instead of "%r2" in "b,l" insns.
6 2005-08-12 Martin Schwidefsky <schwidefsky@de.ibm.com>
8 * s390-dis.c (print_insn_s390): Print unsigned operands with %u.
9 * s390-mkopc.c (s390_opcode_cpu_val): Add support for cpu type z9-109.
11 * s390-opc.c (I32_16, U32_16, M_16): Add defines 32 bit immediates
12 and 4 bit optional masks.
13 (INSTR_RIL_RI, INSTR_RIL_RU, INSTR_RRF_M0RR, INSTR_RSE_CCRD,
14 INSTR_RSY_CCRD, INSTR_SSF_RRDRD): Add new instruction formats.
15 (MASK_RIL_RI, MASK_RIL_RU, MASK_RRF_M0RR, MASK_RSE_CCRD,
16 MASK_RSY_CCRD, MASK_SSF_RRDRD): Likewise.
17 (s390_opformats): Likewise.
18 * s390-opc.txt: Add new instructions for cpu type z9-109.
20 2005-08-05 John David Anglin <dave.anglin@nrc-crnc.gc.ca>
22 * hppa-dis.c (print_insn_hppa): Prefix 21-bit values with "L%".
24 2005-07-29 Paul Brook <paul@codesourcery.com>
26 * arm-dis.c: Fix disassebly of thumb2 writeback addressing modes.
28 2005-07-29 Paul Brook <paul@codesourcery.com>
30 * arm-dis.c (thumb32_opc): Fix addressing mode for tbh.
31 (print_insn_thumb32): Fix decoding of thumb2 'I' operands.
33 2005-07-25 DJ Delorie <dj@redhat.com>
35 * m32c-asm.c Regenerate.
36 * m32c-dis.c Regenerate.
38 2005-07-20 DJ Delorie <dj@redhat.com>
40 * disassemble.c (disassemble_init_for_target): M32C ISAs are
41 enums, so convert them to bit masks, which attributes are.
43 2005-07-18 Nick Clifton <nickc@redhat.com>
45 * configure.in: Restore alpha ordering to list of arches.
46 * configure: Regenerate.
47 * disassemble.c: Restore alpha ordering to list of arches.
49 2005-07-18 Nick Clifton <nickc@redhat.com>
51 * m32c-asm.c: Regenerate.
52 * m32c-desc.c: Regenerate.
53 * m32c-desc.h: Regenerate.
54 * m32c-dis.c: Regenerate.
55 * m32c-ibld.h: Regenerate.
56 * m32c-opc.c: Regenerate.
57 * m32c-opc.h: Regenerate.
59 2005-07-18 H.J. Lu <hongjiu.lu@intel.com>
61 * i386-dis.c (PNI_Fixup): Update comment.
62 (VMX_Fixup): Properly handle the suffix check.
64 2005-07-16 John David Anglin <dave.anglin@nrc-cnrc.gc.ca>
66 * hppa-dis.c (print_insn_hppa): Add space after 'w' in wide-mode
69 2005-07-16 Alan Modra <amodra@bigpond.net.au>
71 * Makefile.am: Run "make dep-am".
72 (stamp-m32c): Fix cpu dependencies.
73 * Makefile.in: Regenerate.
74 * ip2k-dis.c: Regenerate.
76 2007-07-15 H.J. Lu <hongjiu.lu@intel.com>
78 * i386-dis.c (OP_VMX): New. Handle Intel VMX Instructions.
79 (VMX_Fixup): New. Fix up Intel VMX Instructions.
83 (dis386_twobyte): Updated entries 0x78 and 0x79.
84 (twobyte_has_modrm): Likewise.
85 (grps): Use OP_VMX in the "sgdtIQ" entry. Updated GRP9.
86 (OP_G): Handle m_mode.
88 2005-07-14 Jim Blandy <jimb@redhat.com>
90 Add support for the Renesas M32C and M16C.
91 * m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c, m32c-opc.c: New.
92 * m32c-desc.h, m32c-opc.h: New.
93 * Makefile.am (HFILES): List m32c-desc.h and m32c-opc.h.
94 (CFILES): List m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c,
96 (ALL_MACHINES): List m32c-asm.lo, m32c-desc.lo, m32c-dis.lo,
97 m32c-ibld.lo, m32c-opc.lo.
98 (CLEANFILES): List stamp-m32c.
99 (M32C_DEPS): List stamp-m32c, if CGEN_MAINT.
100 (CGEN_CPUS): Add m32c.
101 (m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c, m32c-opc.c)
102 (m32c-desc.h, m32c-opc.h): Depend on M32C_DEPS.
103 (m32c_opc_h): New variable.
104 (stamp-m32c, m32c-asm.lo, m32c-desc.lo, m32c-dis.lo, m32c-ibld.lo)
105 (m32c-opc.lo): New rules.
106 * Makefile.in: Regenerated.
107 * configure.in: Add case for bfd_m32c_arch.
108 * configure: Regenerated.
109 * disassemble.c (ARCH_m32c): New.
110 [ARCH_m32c]: #include "m32c-desc.h".
111 (disassembler) [ARCH_m32c]: Add case for bfd_arch_m32c.
112 (disassemble_init_for_target) [ARCH_m32c]: Same.
114 * cgen-ops.h, cgen-types.h: New files.
115 * Makefile.am (HFILES): List them.
116 * Makefile.in: Regenerated.
118 2005-07-07 Kaveh R. Ghazi <ghazi@caip.rutgers.edu>
120 * arc-dis.c, arm-dis.c, cris-dis.c, crx-dis.c, d10v-dis.c,
121 d30v-dis.c, fr30-dis.c, h8300-dis.c, h8500-dis.c, i860-dis.c,
122 ia64-dis.c, ip2k-dis.c, m10200-dis.c, m10300-dis.c,
123 m88k-dis.c, mcore-dis.c, mips-dis.c, ms1-dis.c, or32-dis.c,
124 ppc-dis.c, sh64-dis.c, sparc-dis.c, tic4x-dis.c, tic80-dis.c,
125 v850-dis.c: Fix format bugs.
126 * ia64-gen.c (fail, warn): Add format attribute.
127 * or32-opc.c (debug): Likewise.
129 2005-07-07 Khem Raj <kraj@mvista.com>
131 * arm-dis.c (opcode32 arm_opcodes): Fix ARM VFP fadds instruction
134 2005-07-06 Alan Modra <amodra@bigpond.net.au>
136 * Makefile.am (stamp-m32r): Fix path to cpu files.
137 (stamp-m32r, stamp-iq2000): Likewise.
138 * Makefile.in: Regenerate.
139 * m32r-asm.c: Regenerate.
140 * po/POTFILES.in: Remove arm-opc.h. Add ms1-asm.c, ms1-desc.c,
141 ms1-desc.h, ms1-dis.c, ms1-ibld.c, ms1-opc.c, ms1-opc.h.
143 2005-07-05 Nick Clifton <nickc@redhat.com>
145 * iq2000-asm.c: Regenerate.
146 * ms1-asm.c: Regenerate.
148 2005-07-05 Jan Beulich <jbeulich@novell.com>
150 * i386-dis.c (SVME_Fixup): New.
151 (grps): Use it for the lidt entry.
152 (PNI_Fixup): Call OP_M rather than OP_E.
153 (INVLPG_Fixup): Likewise.
155 2005-07-04 H.J. Lu <hongjiu.lu@intel.com>
157 * tic30-dis.c (cnvt_tmsfloat_ieee): Use HUGE_VALF if defined.
159 2005-07-01 Nick Clifton <nickc@redhat.com>
161 * a29k-dis.c: Update to ISO C90 style function declarations and
163 * alpha-opc.c: Likewise.
164 * arc-dis.c: Likewise.
165 * arc-opc.c: Likewise.
166 * avr-dis.c: Likewise.
167 * cgen-asm.in: Likewise.
168 * cgen-dis.in: Likewise.
169 * cgen-ibld.in: Likewise.
170 * cgen-opc.c: Likewise.
171 * cris-dis.c: Likewise.
172 * d10v-dis.c: Likewise.
173 * d30v-dis.c: Likewise.
174 * d30v-opc.c: Likewise.
175 * dis-buf.c: Likewise.
176 * dlx-dis.c: Likewise.
177 * h8300-dis.c: Likewise.
178 * h8500-dis.c: Likewise.
179 * hppa-dis.c: Likewise.
180 * i370-dis.c: Likewise.
181 * i370-opc.c: Likewise.
182 * m10200-dis.c: Likewise.
183 * m10300-dis.c: Likewise.
184 * m68k-dis.c: Likewise.
185 * m88k-dis.c: Likewise.
186 * mips-dis.c: Likewise.
187 * mmix-dis.c: Likewise.
188 * msp430-dis.c: Likewise.
189 * ns32k-dis.c: Likewise.
190 * or32-dis.c: Likewise.
191 * or32-opc.c: Likewise.
192 * pdp11-dis.c: Likewise.
193 * pj-dis.c: Likewise.
194 * s390-dis.c: Likewise.
195 * sh-dis.c: Likewise.
196 * sh64-dis.c: Likewise.
197 * sparc-dis.c: Likewise.
198 * sparc-opc.c: Likewise.
199 * sysdep.h: Likewise.
200 * tic30-dis.c: Likewise.
201 * tic4x-dis.c: Likewise.
202 * tic80-dis.c: Likewise.
203 * v850-dis.c: Likewise.
204 * v850-opc.c: Likewise.
205 * vax-dis.c: Likewise.
206 * w65-dis.c: Likewise.
207 * z8kgen.c: Likewise.
209 * fr30-*: Regenerate.
211 * ip2k-*: Regenerate.
212 * iq2000-*: Regenerate.
213 * m32r-*: Regenerate.
215 * openrisc-*: Regenerate.
216 * xstormy16-*: Regenerate.
218 2005-06-23 Ben Elliston <bje@gnu.org>
220 * m68k-dis.c: Use ISC C90.
221 * m68k-opc.c: Formatting fixes.
223 2005-06-16 David Ung <davidu@mips.com>
225 * mips16-opc.c (mips16_opcodes): Add the following MIPS16e
226 instructions to the table; seb/seh/sew/zeb/zeh/zew.
228 2005-06-15 Dave Brolley <brolley@redhat.com>
230 Contribute Morpho ms1 on behalf of Red Hat
231 * ms1-asm.c, ms1-desc.c, ms1-dis.c, ms1-ibld.c, ms1-opc.c,
232 ms1-opc.h: New files, Morpho ms1 target.
234 2004-05-14 Stan Cox <scox@redhat.com>
236 * disassemble.c (ARCH_ms1): Define.
237 (disassembler): Handle bfd_arch_ms1
239 2004-05-13 Michael Snyder <msnyder@redhat.com>
241 * Makefile.am, Makefile.in: Add ms1 target.
242 * configure.in: Ditto.
244 2005-06-08 Zack Weinberg <zack@codesourcery.com>
246 * arm-opc.h: Delete; fold contents into ...
247 * arm-dis.c: ... here. Move includes of internal COFF headers
248 next to includes of internal ELF headers.
249 (streq, WORD_ADDRESS, BDISP, BDISP23): Delete, unused.
250 (struct arm_opcode): Rename struct opcode32. Make 'assembler' const.
251 (struct thumb_opcode): Rename struct opcode16. Make 'assembler' const.
252 (arm_conditional, arm_fp_const, arm_shift, arm_regname, regnames)
253 (iwmmxt_wwnames, iwmmxt_wwssnames):
255 (regnames): Remove iWMMXt coprocessor register sets.
256 (iwmmxt_regnames, iwmmxt_cregnames): New statics.
257 (get_arm_regnames): Adjust fourth argument to match above changes.
258 (set_iwmmxt_regnames): Delete.
259 (print_insn_arm): Constify 'c'. Use ISO syntax for function
260 pointer calls. Expand sole use of BDISP. Use iwmmxt_regnames
261 and iwmmxt_cregnames, not set_iwmmxt_regnames.
262 (print_insn_thumb16, print_insn_thumb32): Constify 'c'. Use
263 ISO syntax for function pointer calls.
265 2005-06-07 Zack Weinberg <zack@codesourcery.com>
267 * arm-dis.c: Split up the comments describing the format codes, so
268 that the ARM and 16-bit Thumb opcode tables each have comments
269 preceding them that describe all the codes, and only the codes,
270 valid in those tables. (32-bit Thumb table is already like this.)
271 Reorder the lists in all three comments to match the order in
272 which the codes are implemented.
273 Remove all forward declarations of static functions. Convert all
274 function definitions to ISO C format.
275 (print_insn_arm, print_insn_thumb16, print_insn_thumb32):
277 (print_insn_thumb16): Remove unused case 'I'.
278 (print_insn): Update for changed calling convention of subroutines.
280 2005-05-25 Jan Beulich <jbeulich@novell.com>
282 * i386-dis.c (OP_E): In Intel mode, display 32-bit displacements in
283 hex (but retain it being displayed as signed). Remove redundant
284 checks. Add handling of displacements for 16-bit addressing in Intel
287 2005-05-25 Jan Beulich <jbeulich@novell.com>
289 * i386-dis.c (prefix_name): Remove pointless mode_64bit check.
290 (OP_E): Remove redundant REX_EXTZ handling. Remove pointless
291 masking of 'rm' in 16-bit memory address handling.
293 2005-05-19 Anton Blanchard <anton@samba.org>
295 * ppc-dis.c (powerpc_dialect): Handle "-Mpower5".
296 (print_ppc_disassembler_options): Document it.
297 * ppc-opc.c (SVC_LEV): Define.
298 (LEV): Allow optional operand.
300 (powerpc_opcodes): Extend "sc". Adjust "svc" and "svcl". Add
301 "hrfid", "popcntb", "fsqrtes", "fsqrtes.", "fre" and "fre.".
303 2005-05-19 Kelley Cook <kcook@gcc.gnu.org>
305 * Makefile.in: Regenerate.
307 2005-05-17 Zack Weinberg <zack@codesourcery.com>
309 * arm-dis.c (thumb_opcodes): Add disassembly for V6T2 16-bit
310 instructions. Adjust disassembly of some opcodes to match
312 (thumb32_opcodes): New table.
313 (print_insn_thumb): Rename print_insn_thumb16; don't handle
314 two-halfword branches here.
315 (print_insn_thumb32): New function.
316 (print_insn): Choose among print_insn_arm, print_insn_thumb16,
317 and print_insn_thumb32. Be consistent about order of
318 halfwords when printing 32-bit instructions.
320 2005-05-07 H.J. Lu <hongjiu.lu@intel.com>
323 * i386-dis.c (branch_v_mode): New.
324 (indirEv): Use branch_v_mode instead of v_mode.
325 (OP_E): Handle branch_v_mode.
327 2005-05-07 H.J. Lu <hongjiu.lu@intel.com>
329 * d10v-dis.c (dis_2_short): Support 64bit host.
331 2005-05-07 Nick Clifton <nickc@redhat.com>
333 * po/nl.po: Updated translation.
335 2005-05-07 Nick Clifton <nickc@redhat.com>
337 * Update the address and phone number of the FSF organization in
338 the GPL notices in the following files:
339 a29k-dis.c, aclocal.m4, alpha-dis.c, alpha-opc.c, arc-dis.c,
340 arc-dis.h, arc-ext.c, arc-ext.h, arc-opc.c, arm-dis.c, arm-opc.h,
341 avr-dis.c, cgen-asm.c, cgen-asm.in, cgen-dis.c, cgen-dis.in,
342 cgen-ibld.in, cgen-opc.c, cgen.sh, cris-dis.c, cris-opc.c,
343 crx-dis.c, crx-opc.c, d10v-dis.c, d10v-opc.c, d30v-dis.c,
344 d30v-opc.c, dis-buf.c, dis-init.c, disassemble.c, dlx-dis.c,
345 fr30-asm.c, fr30-desc.c, fr30-desc.h, fr30-dis.c, fr30-ibld.c,
346 fr30-opc.c, fr30-opc.h, frv-asm.c, frv-desc.c, frv-desc.h,
347 frv-dis.c, frv-ibld.c, frv-opc.c, frv-opc.h, h8300-dis.c,
348 h8500-dis.c, h8500-opc.h, hppa-dis.c, i370-dis.c, i370-opc.c,
349 i386-dis.c, i860-dis.c, i960-dis.c, ia64-asmtab.h, ia64-dis.c,
350 ia64-gen.c, ia64-opc-a.c, ia64-opc-b.c, ia64-opc-d.c,
351 ia64-opc-f.c, ia64-opc-i.c, ia64-opc-m.c, ia64-opc-x.c,
352 ia64-opc.c, ia64-opc.h, ip2k-asm.c, ip2k-desc.c, ip2k-desc.h,
353 ip2k-dis.c, ip2k-ibld.c, ip2k-opc.c, ip2k-opc.h, iq2000-asm.c,
354 iq2000-desc.c, iq2000-desc.h, iq2000-dis.c, iq2000-ibld.c,
355 iq2000-opc.c, iq2000-opc.h, m10200-dis.c, m10200-opc.c,
356 m10300-dis.c, m10300-opc.c, m32r-asm.c, m32r-desc.c, m32r-desc.h,
357 m32r-dis.c, m32r-ibld.c, m32r-opc.c, m32r-opc.h, m32r-opinst.c,
358 m68hc11-dis.c, m68hc11-opc.c, m68k-dis.c, m68k-opc.c, m88k-dis.c,
359 maxq-dis.c, mcore-dis.c, mcore-opc.h, mips-dis.c, mips-opc.c,
360 mips16-opc.c, mmix-dis.c, mmix-opc.c, msp430-dis.c, ns32k-dis.c,
361 openrisc-asm.c, openrisc-desc.c, openrisc-desc.h, openrisc-dis.c,
362 openrisc-ibld.c, openrisc-opc.c, openrisc-opc.h, opintl.h,
363 or32-dis.c, or32-opc.c, pdp11-dis.c, pdp11-opc.c, pj-dis.c,
364 pj-opc.c, ppc-dis.c, ppc-opc.c, s390-dis.c, s390-mkopc.c,
365 s390-opc.c, sh-dis.c, sh-opc.h, sh64-dis.c, sh64-opc.c,
366 sh64-opc.h, sparc-dis.c, sparc-opc.c, sysdep.h, tic30-dis.c,
367 tic4x-dis.c, tic54x-dis.c, tic54x-opc.c, tic80-dis.c, tic80-opc.c,
368 v850-dis.c, v850-opc.c, vax-dis.c, w65-dis.c, w65-opc.h,
369 xstormy16-asm.c, xstormy16-desc.c, xstormy16-desc.h,
370 xstormy16-dis.c, xstormy16-ibld.c, xstormy16-opc.c,
371 xstormy16-opc.h, xtensa-dis.c, z8k-dis.c, z8kgen.c
373 2005-05-05 James E Wilson <wilson@specifixinc.com>
375 * ia64-opc.c: Include sysdep.h before libiberty.h.
377 2005-05-05 Nick Clifton <nickc@redhat.com>
379 * configure.in (ALL_LINGUAS): Add vi.
380 * configure: Regenerate.
383 2005-04-26 Jerome Guitton <guitton@gnat.com>
385 * configure.in: Fix the check for basename declaration.
386 * configure: Regenerate.
388 2005-04-19 Alan Modra <amodra@bigpond.net.au>
390 * ppc-opc.c (RTO): Define.
391 (powerpc_opcodes <tlbsx, tlbsx., tlbre>): Combine PPC403 and BOOKE
392 entries to suit PPC440.
394 2005-04-18 Mark Kettenis <kettenis@gnu.org>
396 * i386-dis.c: Insert hyphens into selected VIA PadLock extensions.
399 2005-04-14 Nick Clifton <nickc@redhat.com>
401 * po/fi.po: New translation: Finnish.
402 * configure.in (ALL_LINGUAS): Add fi.
403 * configure: Regenerate.
405 2005-04-14 Alan Modra <amodra@bigpond.net.au>
407 * Makefile.am (NO_WERROR): Define.
408 * configure.in: Invoke AM_BINUTILS_WARNINGS.
409 * Makefile.in: Regenerate.
410 * aclocal.m4: Regenerate.
411 * configure: Regenerate.
413 2005-04-04 Nick Clifton <nickc@redhat.com>
415 * fr30-asm.c: Regenerate.
416 * frv-asm.c: Regenerate.
417 * iq2000-asm.c: Regenerate.
418 * m32r-asm.c: Regenerate.
419 * openrisc-asm.c: Regenerate.
421 2005-04-01 Jan Beulich <jbeulich@novell.com>
423 * i386-dis.c (PNI_Fixup): Neither mwait nor monitor have any
424 visible operands in Intel mode. The first operand of monitor is
427 2005-04-01 Jan Beulich <jbeulich@novell.com>
429 * i386-dis.c (INVLPG_Fixup): Decode rdtscp; change code to allow for
430 easier future additions.
432 2005-03-31 Jerome Guitton <guitton@gnat.com>
434 * configure.in: Check for basename.
435 * configure: Regenerate.
438 2005-03-29 H.J. Lu <hongjiu.lu@intel.com>
440 * i386-dis.c (SEG_Fixup): New.
442 (dis386): Use "Sv" for 0x8c and 0x8e.
444 2005-03-21 Jan-Benedict Glaw <jbglaw@lug-owl.de>
445 Nick Clifton <nickc@redhat.com>
447 * vax-dis.c: (entry_addr): New varible: An array of user supplied
448 function entry mask addresses.
449 (entry_addr_occupied_slots): New variable: The number of occupied
450 elements in entry_addr.
451 (entry_addr_total_slots): New variable: The total number of
452 elements in entry_addr.
453 (parse_disassembler_options): New function. Fills in the entry_addr
455 (free_entry_array): New function. Release the memory used by the
456 entry addr array. Suppressed because there is no way to call it.
457 (is_function_entry): Check if a given address is a function's
458 start address by looking at supplied entry mask addresses and
459 symbol information, if available.
460 (print_insn_vax): Use parse_disassembler_options and is_function_entry.
462 2005-03-23 H.J. Lu <hongjiu.lu@intel.com>
464 * cris-dis.c (print_with_operands): Use ~31L for long instead
467 2005-03-20 H.J. Lu <hongjiu.lu@intel.com>
469 * mmix-opc.c (O): Revert the last change.
472 2005-03-19 H.J. Lu <hongjiu.lu@intel.com>
474 * mmix-opc.c (O): Use 24UL instead of 24 for unsigned long.
477 2005-03-19 Hans-Peter Nilsson <hp@bitrange.com>
479 * mmix-opc.c (O, Z): Force expression as unsigned long.
481 2005-03-18 Nick Clifton <nickc@redhat.com>
483 * ip2k-asm.c: Regenerate.
484 * op/opcodes.pot: Regenerate.
486 2005-03-16 Nick Clifton <nickc@redhat.com>
487 Ben Elliston <bje@au.ibm.com>
489 * configure.in (werror): New switch: Add -Werror to the
490 compiler command line. Enabled by default. Disable via
492 * configure: Regenerate.
494 2005-03-16 Alan Modra <amodra@bigpond.net.au>
496 * ppc-dis.c (powerpc_dialect): Don't set PPC_OPCODE_ALTIVEC when
499 2005-03-15 Alan Modra <amodra@bigpond.net.au>
501 * po/es.po: Commit new Spanish translation.
503 * po/fr.po: Commit new French translation.
505 2005-03-14 Jan-Benedict Glaw <jbglaw@lug-owl.de>
507 * vax-dis.c: Fix spelling error
508 (print_insn_vax): Use ".word 0x0012 # Entry mask: r1 r2 >" instead
509 of just "Entry mask: < r1 ... >"
511 2005-03-12 Zack Weinberg <zack@codesourcery.com>
513 * arm-dis.c (arm_opcodes): Document %E and %V.
514 Add entries for v6T2 ARM instructions:
515 bfc bfi mls strht ldrht ldrsht ldrsbt movw movt rbit ubfx sbfx.
516 (print_insn_arm): Add support for %E and %V.
517 (thumb_opcodes): Add ARMv6K instructions nop, sev, wfe, wfi, yield.
519 2005-03-10 Jeff Baker <jbaker@qnx.com>
520 Alan Modra <amodra@bigpond.net.au>
522 * ppc-opc.c (insert_sprg, extract_sprg): New Functions.
523 (powerpc_operands <SPRG>): Call the above. Bit field is 5 bits.
525 (XSPRG_MASK): Mask off extra bits now part of sprg field.
526 (powerpc_opcodes): Asjust mfsprg and mtsprg to suit new mask. Move
527 mfsprg4..7 after msprg and consolidate.
529 2005-03-09 Jan-Benedict Glaw <jbglaw@lug-owl.de>
531 * vax-dis.c (entry_mask_bit): New array.
532 (print_insn_vax): Decode function entry mask.
534 2005-03-07 Aldy Hernandez <aldyh@redhat.com>
536 * ppc-opc.c (powerpc_opcodes): Fix encoding of efscfd.
538 2005-03-05 Alan Modra <amodra@bigpond.net.au>
540 * po/opcodes.pot: Regenerate.
542 2005-03-03 Ramana Radhakrishnan <ramana.radhakrishnan@codito.com>
544 * arc-dis.c (a4_decoding_class): New enum.
545 (dsmOneArcInst): Use the enum values for the decoding class.
546 Remove redundant case in the switch for decodingClass value 11.
548 2005-03-02 Jan Beulich <jbeulich@novell.com>
550 * i386-dis.c (print_insn): Suppress lock prefix printing for cr8...15
552 (OP_C): Consider lock prefix in non-64-bit modes.
554 2005-02-24 Alan Modra <amodra@bigpond.net.au>
556 * cris-dis.c (format_hex): Remove ineffective warning fix.
557 * crx-dis.c (make_instruction): Warning fix.
558 * frv-asm.c: Regenerate.
560 2005-02-23 Nick Clifton <nickc@redhat.com>
562 * cgen-dis.in: Use bfd_byte for buffers that are passed to
565 * ia64-opc.c (locate_opcode_ent): Initialise opval array.
567 * crx-dis.c (make_instruction): Move argument structure into inner
568 scope and ensure that all of its fields are initialised before
571 * fr30-asm.c: Regenerate.
572 * fr30-dis.c: Regenerate.
573 * frv-asm.c: Regenerate.
574 * frv-dis.c: Regenerate.
575 * ip2k-asm.c: Regenerate.
576 * ip2k-dis.c: Regenerate.
577 * iq2000-asm.c: Regenerate.
578 * iq2000-dis.c: Regenerate.
579 * m32r-asm.c: Regenerate.
580 * m32r-dis.c: Regenerate.
581 * openrisc-asm.c: Regenerate.
582 * openrisc-dis.c: Regenerate.
583 * xstormy16-asm.c: Regenerate.
584 * xstormy16-dis.c: Regenerate.
586 2005-02-22 Alan Modra <amodra@bigpond.net.au>
588 * arc-ext.c: Warning fixes.
589 * arc-ext.h: Likewise.
590 * cgen-opc.c: Likewise.
591 * ia64-gen.c: Likewise.
592 * maxq-dis.c: Likewise.
593 * ns32k-dis.c: Likewise.
594 * w65-dis.c: Likewise.
595 * ia64-asmtab.c: Regenerate.
597 2005-02-22 Alan Modra <amodra@bigpond.net.au>
599 * fr30-desc.c: Regenerate.
600 * fr30-desc.h: Regenerate.
601 * fr30-opc.c: Regenerate.
602 * fr30-opc.h: Regenerate.
603 * frv-desc.c: Regenerate.
604 * frv-desc.h: Regenerate.
605 * frv-opc.c: Regenerate.
606 * frv-opc.h: Regenerate.
607 * ip2k-desc.c: Regenerate.
608 * ip2k-desc.h: Regenerate.
609 * ip2k-opc.c: Regenerate.
610 * ip2k-opc.h: Regenerate.
611 * iq2000-desc.c: Regenerate.
612 * iq2000-desc.h: Regenerate.
613 * iq2000-opc.c: Regenerate.
614 * iq2000-opc.h: Regenerate.
615 * m32r-desc.c: Regenerate.
616 * m32r-desc.h: Regenerate.
617 * m32r-opc.c: Regenerate.
618 * m32r-opc.h: Regenerate.
619 * m32r-opinst.c: Regenerate.
620 * openrisc-desc.c: Regenerate.
621 * openrisc-desc.h: Regenerate.
622 * openrisc-opc.c: Regenerate.
623 * openrisc-opc.h: Regenerate.
624 * xstormy16-desc.c: Regenerate.
625 * xstormy16-desc.h: Regenerate.
626 * xstormy16-opc.c: Regenerate.
627 * xstormy16-opc.h: Regenerate.
629 2005-02-21 Alan Modra <amodra@bigpond.net.au>
631 * Makefile.am: Run "make dep-am"
632 * Makefile.in: Regenerate.
634 2005-02-15 Nick Clifton <nickc@redhat.com>
636 * cgen-dis.in (print_address): Add an ATTRIBUTE_UNUSED to prevent
637 compile time warnings.
638 (print_keyword): Likewise.
639 (default_print_insn): Likewise.
641 * fr30-desc.c: Regenerated.
642 * fr30-desc.h: Regenerated.
643 * fr30-dis.c: Regenerated.
644 * fr30-opc.c: Regenerated.
645 * fr30-opc.h: Regenerated.
646 * frv-desc.c: Regenerated.
647 * frv-dis.c: Regenerated.
648 * frv-opc.c: Regenerated.
649 * ip2k-asm.c: Regenerated.
650 * ip2k-desc.c: Regenerated.
651 * ip2k-desc.h: Regenerated.
652 * ip2k-dis.c: Regenerated.
653 * ip2k-opc.c: Regenerated.
654 * ip2k-opc.h: Regenerated.
655 * iq2000-desc.c: Regenerated.
656 * iq2000-dis.c: Regenerated.
657 * iq2000-opc.c: Regenerated.
658 * m32r-asm.c: Regenerated.
659 * m32r-desc.c: Regenerated.
660 * m32r-desc.h: Regenerated.
661 * m32r-dis.c: Regenerated.
662 * m32r-opc.c: Regenerated.
663 * m32r-opc.h: Regenerated.
664 * m32r-opinst.c: Regenerated.
665 * openrisc-desc.c: Regenerated.
666 * openrisc-desc.h: Regenerated.
667 * openrisc-dis.c: Regenerated.
668 * openrisc-opc.c: Regenerated.
669 * openrisc-opc.h: Regenerated.
670 * xstormy16-desc.c: Regenerated.
671 * xstormy16-desc.h: Regenerated.
672 * xstormy16-dis.c: Regenerated.
673 * xstormy16-opc.c: Regenerated.
674 * xstormy16-opc.h: Regenerated.
676 2005-02-14 H.J. Lu <hongjiu.lu@intel.com>
678 * dis-buf.c (perror_memory): Use sprintf_vma to print out
681 2005-02-11 Nick Clifton <nickc@redhat.com>
683 * iq2000-asm.c: Regenerate.
685 * frv-dis.c: Regenerate.
687 2005-02-07 Jim Blandy <jimb@redhat.com>
689 * Makefile.am (CGEN): Load guile.scm before calling the main
691 * Makefile.in: Regenerated.
692 * cgen.sh: Be prepared for the 'cgen' argument to contain spaces.
693 Simply pass the cgen-opc.scm path to ${cgen} as its first
694 argument; ${cgen} itself now contains the '-s', or whatever is
695 appropriate for the Scheme being used.
697 2005-01-31 Andrew Cagney <cagney@gnu.org>
699 * configure: Regenerate to track ../gettext.m4.
701 2005-01-31 Jan Beulich <jbeulich@novell.com>
703 * ia64-gen.c (NELEMS): Define.
704 (shrink): Generate alias with missing second predicate register when
705 opcode has two outputs and these are both predicates.
706 * ia64-opc-i.c (FULL17): Define.
707 (ia64_opcodes_i): Add mov-to-pr alias without second input. Use FULL17
708 here to generate output template.
709 (TBITCM, TNATCM): Undefine after use.
710 * ia64-opc-m.c (ia64_opcodes_i): Add alloc alias without ar.pfs as
711 first input. Add ld16 aliases without ar.csd as second output. Add
712 st16 aliases without ar.csd as second input. Add cmpxchg aliases
713 without ar.ccv as third input. Add cmp8xchg16 aliases without ar.csd/
714 ar.ccv as third/fourth inputs. Consolidate through...
715 (CMPXCHG_acq, CMPXCHG_rel, CMPXCHG_1, CMPXCHG_2, CMPXCHG_4, CMPXCHG_8,
716 CMPXCHGn, CMP8XCHG16, CMPXCHG_ALL): Define.
717 * ia64-asmtab.c: Regenerate.
719 2005-01-27 Andrew Cagney <cagney@gnu.org>
721 * configure: Regenerate to track ../gettext.m4 change.
723 2005-01-25 Alexandre Oliva <aoliva@redhat.com>
725 2004-11-10 Alexandre Oliva <aoliva@redhat.com>
726 * frv-asm.c: Rebuilt.
727 * frv-desc.c: Rebuilt.
728 * frv-desc.h: Rebuilt.
729 * frv-dis.c: Rebuilt.
730 * frv-ibld.c: Rebuilt.
731 * frv-opc.c: Rebuilt.
732 * frv-opc.h: Rebuilt.
734 2005-01-24 Andrew Cagney <cagney@gnu.org>
736 * configure: Regenerate, ../gettext.m4 was updated.
738 2005-01-21 Fred Fish <fnf@specifixinc.com>
740 * mips-opc.c: Change INSN_ALIAS to INSN2_ALIAS.
741 Change INSN_WRITE_MDMX_ACC to INSN2_WRITE_MDMX_ACC.
742 Change INSN_READ_MDMX_ACC to INSN2_READ_MDMX_ACC.
745 2005-01-20 Alan Modra <amodra@bigpond.net.au>
747 * ppc-opc.c (powerpc_opcodes): Add optional 'l' arg to tlbiel.
749 2005-01-19 Fred Fish <fnf@specifixinc.com>
751 * mips-dis.c (no_aliases): New disassembly option flag.
752 (set_default_mips_dis_options): Init no_aliases to zero.
753 (parse_mips_dis_option): Handle no-aliases option.
754 (print_insn_mips): Ignore table entries that are aliases
755 if no_aliases is set.
756 (print_insn_mips16): Ditto.
757 * mips-opc.c (mips_builtin_opcodes): Add initializer column for
758 new pinfo2 member and add INSN_ALIAS initializers as needed. Also
759 move WR_MACC and RD_MACC initializers from pinfo to pinfo2.
760 * mips16-opc.c (mips16_opcodes): Ditto.
762 2005-01-17 Andrew Stubbs <andrew.stubbs@st.com>
764 * sh-opc.h (arch_sh2a_or_sh3e,arch_sh2a_or_sh4): Correct definition.
765 (inheritance diagram): Add missing edge.
766 (arch_sh1_up): Rename arch_sh_up to match external name to make life
767 easier for the testsuite.
768 (arch_sh4_nofp_up): Likewise, rename arch_sh4_nofpu_up.
769 (arch_sh4a_nofp_up): Likewise, rename arch_sh4a_nofpu_up.
770 (arch_sh2a_nofpu_or_sh4_nommu_nofpu_up): Add missing
771 arch_sh2a_or_sh4_up child.
772 (sh_table): Do renaming as above.
773 Correct comment for ldc.l for gas testsuite to read.
774 Remove rogue mul.l from sh1 (duplicate of the one for sh2).
775 Correct comments for movy.w and movy.l for gas testsuite to read.
776 Correct comments for fmov.d and fmov.s for gas testsuite to read.
778 2005-01-12 H.J. Lu <hongjiu.lu@intel.com>
780 * i386-dis.c (OP_E): Don't ignore scale in SIB for 64 bit mode.
782 2005-01-12 H.J. Lu <hongjiu.lu@intel.com>
784 * i386-dis.c (OP_E): Ignore scale when index == 0x4 in SIB.
786 2005-01-10 Andreas Schwab <schwab@suse.de>
788 * disassemble.c (disassemble_init_for_target) <case
789 bfd_arch_ia64>: Set skip_zeroes to 16.
790 <case bfd_arch_tic4x>: Set skip_zeroes to 32.
792 2004-12-23 Tomer Levi <Tomer.Levi@nsc.com>
794 * crx-opc.c: Mark 'bcop' instruction as RELAXABLE.
796 2004-12-14 Svein E. Seldal <Svein.Seldal@solidas.com>
798 * avr-dis.c: Prettyprint. Added printing of symbol names in all
799 memory references. Convert avr_operand() to C90 formatting.
801 2004-12-05 Tomer Levi <Tomer.Levi@nsc.com>
803 * crx-dis.c (print_arg): Use 'info->print_address_func' for address printing.
805 2004-11-29 Tomer Levi <Tomer.Levi@nsc.com>
807 * crx-opc.c (crx_optab): Mark all rbase_disps* operands as signed.
808 (no_op_insn): Initialize array with instructions that have no
810 * crx-dis.c (make_instruction): Get rid of COP_BRANCH_INS operand swapping.
812 2004-11-29 Richard Earnshaw <rearnsha@arm.com>
814 * arm-dis.c: Correct top-level comment.
816 2004-11-27 Richard Earnshaw <rearnsha@arm.com>
818 * arm-opc.h (arm_opcode, thumb_opcode): Add extra field for the
819 architecuture defining the insn.
820 (arm_opcodes, thumb_opcodes): Delete. Move to ...
821 * arm-dis.c (arm_opcodes, thumb_opcodes): Here. Add architecutre
823 Also include opcode/arm.h.
824 * Makefile.am (arm-dis.lo): Update dependency list.
825 * Makefile.in: Regenerate.
827 2004-11-22 Ravi Ramaseshan <ravi.ramaseshan@codito.com>
829 * opcode/arc-opc.c (insert_base): Modify ls_operand[LS_OFFSET] to
830 reflect the change to the short immediate syntax.
832 2004-11-19 Alan Modra <amodra@bigpond.net.au>
834 * or32-opc.c (debug): Warning fix.
835 * po/POTFILES.in: Regenerate.
837 * maxq-dis.c: Formatting.
838 (print_insn): Warning fix.
840 2004-11-17 Daniel Jacobowitz <dan@codesourcery.com>
842 * arm-dis.c (WORD_ADDRESS): Define.
843 (print_insn): Use it. Correct big-endian end-of-section handling.
845 2004-11-08 Inderpreet Singh <inderpreetb@nioda.hcltech.com>
846 Vineet Sharma <vineets@noida.hcltech.com>
848 * maxq-dis.c: New file.
849 * disassemble.c (ARCH_maxq): Define.
850 (disassembler): Add 'print_insn_maxq_little' for handling maxq
852 * configure.in: Add case for bfd_maxq_arch.
853 * configure: Regenerate.
854 * Makefile.am: Add support for maxq-dis.c
855 * Makefile.in: Regenerate.
856 * aclocal.m4: Regenerate.
858 2004-11-05 Tomer Levi <Tomer.Levi@nsc.com>
860 * crx-opc.c (crx_optab): Rename 'arg_icr' to 'arg_idxr' for Index register
862 * crx-dis.c: Likewise.
864 2004-11-04 Hans-Peter Nilsson <hp@axis.com>
866 Generally, handle CRISv32.
867 * cris-dis.c (TRACE_CASE): Define as (disdata->trace_case).
868 (struct cris_disasm_data): New type.
869 (format_reg, format_hex, cris_constraint, print_flags)
870 (get_opcode_entry): Add struct cris_disasm_data * parameter. All
872 (format_sup_reg, print_insn_crisv32_with_register_prefix)
873 (print_insn_crisv32_without_register_prefix)
874 (print_insn_crisv10_v32_with_register_prefix)
875 (print_insn_crisv10_v32_without_register_prefix)
876 (cris_parse_disassembler_options): New functions.
877 (bytes_to_skip, cris_spec_reg): Add enum cris_disass_family
878 parameter. All callers changed.
879 (get_opcode_entry): Call malloc, not xmalloc. Return NULL on
881 (cris_constraint) <case 'Y', 'U'>: New cases.
882 (bytes_to_skip): Handle 'Y' and 'N' as 's'. Skip size is 4 bytes
884 (print_with_operands) <case 'Y'>: New case.
885 (print_with_operands) <case 'T', 'A', '[', ']', 'd', 'n', 'u'>
886 <case 'N', 'Y', 'Q'>: New cases.
887 (print_insn_cris_generic): Emit "bcc ." for zero and CRISv32.
888 (print_insn_cris_with_register_prefix)
889 (print_insn_cris_without_register_prefix): Call
890 cris_parse_disassembler_options.
891 * cris-opc.c (cris_spec_regs): Mention that this table isn't used
892 for CRISv32 and the size of immediate operands. New v32-only
893 entries for bz, pid, srs, wz, exs, eda, dz, ebp, erp, nrp, ccs and
894 spc. Add v32-only 4-byte entries for p2, p3, p5 and p6. Change
895 ccr, ibr, irp to be v0..v10. Change bar, dccr to be v8..v10.
896 Change brp to be v3..v10.
897 (cris_support_regs): New vector.
898 (cris_opcodes): Update head comment. New format characters '[',
899 ']', space, 'A', 'd', 'N', 'n', 'Q', 'T', 'u', 'U', 'Y'.
900 Add new opcodes for v32 and adjust existing opcodes to accommodate
901 differences to earlier variants.
902 (cris_cond15s): New vector.
904 2004-11-04 Jan Beulich <jbeulich@novell.com>
906 * i386-dis.c (Eq, Edqw, indirEp, Gdq, I1): Define.
908 (Mp): Use f_mode rather than none at all.
909 (t_mode, dq_mode, dqw_mode, f_mode, const_1_mode): Define. t_mode
910 replaces what previously was x_mode; x_mode now means 128-bit SSE
912 (dis386): Make far jumps and calls have an 'l' prefix only in AT&T
913 mode. movmskpX's, pextrw's, and pmovmskb's first operands are Gdq.
914 pinsrw's second operand is Edqw.
915 (grps): 1-bit shifts' and rotates' second operands are I1. cmpxchg8b's
916 operand is Eq. movntq's and movntdq's first operands are EM. s[gi]dt,
917 fldenv, frstor, fsave, fstenv all should also have suffixes in Intel
918 mode when an operand size override is present or always suffixing.
919 More instructions will need to be added to this group.
920 (putop): Handle new macro chars 'C' (short/long suffix selector),
921 'I' (Intel mode override for following macro char), and 'J' (for
922 adding the 'l' prefix to far branches in AT&T mode). When an
923 alternative was specified in the template, honor macro character when
924 specified for Intel mode.
925 (OP_E): Handle new *_mode values. Correct pointer specifications for
926 memory operands. Consolidate output of index register.
927 (OP_G): Handle new *_mode values.
928 (OP_I): Handle const_1_mode.
929 (OP_ESreg, OP_DSreg): Generate pointer specifications. Indicate
930 respective opcode prefix bits have been consumed.
931 (OP_EM, OP_EX): Provide some default handling for generating pointer
934 2004-10-28 Tomer Levi <Tomer.Levi@nsc.com>
936 * crx-opc.c (REV_COP_INST): New macro, reverse operand order of
939 2004-10-27 Tomer Levi <Tomer.Levi@nsc.com>
941 * crx-dis.c (enum REG_ARG_TYPE): New, replacing COP_ARG_TYPE.
942 (getregliststring): Support HI/LO and user registers.
943 * crx-opc.c (crx_instruction): Update data structure according to the
944 rearrangement done in CRX opcode header file.
945 (crx_regtab): Likewise.
946 (crx_optab): Likewise.
947 (crx_instruction): Reorder load/stor instructions, remove unsupported
949 support new Co-Processor instruction 'cpi'.
951 2004-10-27 Nick Clifton <nickc@redhat.com>
953 * opcodes/iq2000-asm.c: Regenerate.
954 * opcodes/iq2000-desc.c: Regenerate.
955 * opcodes/iq2000-desc.h: Regenerate.
956 * opcodes/iq2000-dis.c: Regenerate.
957 * opcodes/iq2000-ibld.c: Regenerate.
958 * opcodes/iq2000-opc.c: Regenerate.
959 * opcodes/iq2000-opc.h: Regenerate.
961 2004-10-21 Tomer Levi <Tomer.Levi@nsc.com>
963 * crx-opc.c (crx_instruction): Replace i3, i4, i5 with us3,
964 us4, us5 (respectively).
965 Remove unsupported 'popa' instruction.
966 Reverse operands order in store co-processor instructions.
968 2004-10-15 Alan Modra <amodra@bigpond.net.au>
970 * Makefile.am: Run "make dep-am"
971 * Makefile.in: Regenerate.
973 2004-10-12 Bob Wilson <bob.wilson@acm.org>
975 * xtensa-dis.c: Use ISO C90 formatting.
977 2004-10-09 Alan Modra <amodra@bigpond.net.au>
979 * ppc-opc.c: Revert 2004-09-09 change.
981 2004-10-07 Bob Wilson <bob.wilson@acm.org>
983 * xtensa-dis.c (state_names): Delete.
984 (fetch_data): Use xtensa_isa_maxlength.
985 (print_xtensa_operand): Replace operand parameter with opcode/operand
986 pair. Remove print_sr_name parameter. Use new xtensa-isa.h functions.
987 (print_insn_xtensa): Use new xtensa-isa.h functions. Handle multislot
988 instruction bundles. Use xmalloc instead of malloc.
990 2004-10-07 David Gibson <david@gibson.dropbear.id.au>
992 * ppc-opc.c: Replace literal "0"s with NULLs in pointer
995 2004-10-07 Tomer Levi <Tomer.Levi@nsc.com>
997 * crx-opc.c (crx_instruction): Support Co-processor insns.
998 * crx-dis.c (COP_ARG_TYPE): New enum for CO-Processor arguments.
999 (getregliststring): Change function to use the above enum.
1000 (print_arg): Handle CO-Processor insns.
1001 (crx_cinvs): Add 'b' option to invalidate the branch-target
1004 2004-10-06 Aldy Hernandez <aldyh@redhat.com>
1006 * ppc-opc.c (powerpc_opcodes): Add efscfd, efdabs, efdnabs,
1007 efdneg, efdadd, efdsub, efdmul, efddiv, efdcmpgt, efdcmplt,
1008 efdcmpeq, efdtstgt, efdtstlt, efdtsteq, efdcfsi, efdcfsid,
1009 efdcfui, efdcfuid, efdcfsf, efdcfuf, efdctsi, efdctsidz, efdctsiz,
1010 efdctui, efdctuidz, efdctuiz, efdctsf, efdctuf, efdctuf, efdcfs.
1012 2004-10-01 Bill Farmer <Bill@the-farmers.freeserve.co.uk>
1014 * pdp11-dis.c (print_insn_pdp11): Subtract the SOB's displacement
1017 2004-09-30 Paul Brook <paul@codesourcery.com>
1019 * arm-dis.c (print_insn_arm): Handle 'e' for SMI instruction.
1020 * arm-opc.h: Document %e. Add ARMv6ZK instructions.
1022 2004-09-17 H.J. Lu <hongjiu.lu@intel.com>
1024 * Makefile.am (AUTOMAKE_OPTIONS): Require 1.9.
1025 (CONFIG_STATUS_DEPENDENCIES): New.
1026 (Makefile): Removed.
1027 (config.status): Likewise.
1028 * Makefile.in: Regenerated.
1030 2004-09-17 Alan Modra <amodra@bigpond.net.au>
1032 * Makefile.am: Run "make dep-am".
1033 * Makefile.in: Regenerate.
1034 * aclocal.m4: Regenerate.
1035 * configure: Regenerate.
1036 * po/POTFILES.in: Regenerate.
1037 * po/opcodes.pot: Regenerate.
1039 2004-09-11 Andreas Schwab <schwab@suse.de>
1041 * configure: Rebuild.
1043 2004-09-09 Segher Boessenkool <segher@kernel.crashing.org>
1045 * ppc-opc.c (L): Make this field not optional.
1047 2004-09-03 Tomer Levi <Tomer.Levi@nsc.com>
1049 * opc-crx.c: Rename 'popma' to 'popa', remove 'pushma'.
1050 Fix parameter to 'm[t|f]csr' insns.
1052 2004-08-30 Nathanael Nerode <neroden@gcc.gnu.org>
1054 * configure.in: Autoupdate to autoconf 2.59.
1055 * aclocal.m4: Rebuild with aclocal 1.4p6.
1056 * configure: Rebuild with autoconf 2.59.
1057 * Makefile.in: Rebuild with automake 1.4p6 (picking up
1058 bfd changes for autoconf 2.59 on the way).
1059 * config.in: Rebuild with autoheader 2.59.
1061 2004-08-27 Richard Sandiford <rsandifo@redhat.com>
1063 * frv-desc.[ch], frv-opc.[ch]: Regenerated.
1065 2004-07-30 Michal Ludvig <mludvig@suse.cz>
1067 * i386-dis.c (GRPPADLCK): Renamed to GRPPADLCK1
1068 (GRPPADLCK2): New define.
1069 (twobyte_has_modrm): True for 0xA6.
1070 (grps): GRPPADLCK2 for opcode 0xA6.
1072 2004-07-29 Alexandre Oliva <aoliva@redhat.com>
1074 Introduce SH2a support.
1075 * sh-opc.h (arch_sh2a_base): Renumber.
1076 (arch_sh2a_nofpu_base): Remove.
1077 (arch_sh_base_mask): Adjust.
1078 (arch_opann_mask): New.
1079 (arch_sh2a, arch_sh2a_nofpu): Adjust.
1080 (arch_sh2a_up, arch_sh2a_nofpu_up): Likewise.
1081 (sh_table): Adjust whitespace.
1082 2004-02-24 Corinna Vinschen <vinschen@redhat.com>
1083 * sh-opc.h (arch_sh2a_nofpu_up): New. Use instead of arch_sh2a_up in
1084 instruction list throughout.
1085 (arch_sh2a_up): Redefine to include fpu instruction set. Use instead
1086 of arch_sh2a in instruction list throughout.
1087 (arch_sh2e_up): Accomodate above changes.
1088 (arch_sh2_up): Ditto.
1089 2004-02-20 Corinna Vinschen <vinschen@redhat.com>
1090 * sh-opc.h: Add arch_sh2a_nofpu to arch_sh2_up.
1091 2004-02-18 Corinna Vinschen <vinschen@redhat.com>
1092 * sh-dis.c (print_insn_sh): Add bfd_mach_sh2a_nofpu handling.
1093 * sh-opc.h (arch_sh2a_nofpu): New.
1094 (arch_sh2a_up): New, defines sh2a and sh2a_nofpu.
1095 (sh_table): Change all arch_sh2a to arch_sh2a_up unless FPU
1097 2004-01-20 DJ Delorie <dj@redhat.com>
1098 * sh-dis.c (print_insn_sh): SH2A does not have 'X' fp regs.
1099 2003-12-29 DJ Delorie <dj@redhat.com>
1100 * sh-opc.c (sh_nibble_type, sh_arg_type, arch_2a, arch_2e_up,
1101 sh_opcode_info, sh_table): Add sh2a support.
1102 (arch_op32): New, to tag 32-bit opcodes.
1103 * sh-dis.c (print_insn_sh): Support sh2a opcodes.
1104 2003-12-02 Michael Snyder <msnyder@redhat.com>
1105 * sh-opc.h (arch_sh2a): Add.
1106 * sh-dis.c (arch_sh2a): Handle.
1107 * sh-opc.h (arch_sh2_up): Fix up to include arch_sh2a.
1109 2004-07-27 Tomer Levi <Tomer.Levi@nsc.com>
1111 * crx-opc.c: Add popx,pushx insns. Indent code, fix comments.
1113 2004-07-22 Nick Clifton <nickc@redhat.com>
1116 * h8300-dis.c (bfd_h8_disassemble): Do not dump raw bytes for the
1117 insns - this is done by objdump itself.
1118 * h8500-dis.c (print_insn_h8500): Likewise.
1120 2004-07-21 Jan Beulich <jbeulich@novell.com>
1122 * i386-dis.c (OP_E): Show rip-relative addressing in 64-bit mode
1123 regardless of address size prefix in effect.
1124 (ptr_reg): Size or address registers does not depend on rex64, but
1125 on the presence of an address size override.
1126 (OP_MMX): Use rex.x only for xmm registers.
1127 (OP_EM): Use rex.z only for xmm registers.
1129 2004-07-20 Maciej W. Rozycki <macro@linux-mips.org>
1131 * mips-opc.c (mips_builtin_opcodes): Move coprocessor 2
1132 move/branch operations to the bottom so that VR5400 multimedia
1133 instructions take precedence in disassembly.
1135 2004-07-20 Maciej W. Rozycki <macro@linux-mips.org>
1137 * mips-opc.c (mips_builtin_opcodes): Remove the MIPS32
1138 ISA-specific "break" encoding.
1140 2004-07-13 Elvis Chiang <elvisfb@gmail.com>
1142 * arm-opc.h: Fix typo in comment.
1144 2004-07-11 Andreas Schwab <schwab@suse.de>
1146 * m68k-dis.c (m68k_valid_ea): Fix typos in last change.
1148 2004-07-09 Andreas Schwab <schwab@suse.de>
1150 * m68k-dis.c (m68k_valid_ea): Check validity of all codes.
1152 2004-07-07 Tomer Levi <Tomer.Levi@nsc.com>
1154 * Makefile.am (CFILES): Add crx-dis.c, crx-opc.c.
1155 (ALL_MACHINES): Add crx-dis.lo, crx-opc.lo.
1156 (crx-dis.lo): New target.
1157 (crx-opc.lo): Likewise.
1158 * Makefile.in: Regenerate.
1159 * configure.in: Handle bfd_crx_arch.
1160 * configure: Regenerate.
1161 * crx-dis.c: New file.
1162 * crx-opc.c: New file.
1163 * disassemble.c (ARCH_crx): Define.
1164 (disassembler): Handle ARCH_crx.
1166 2004-06-29 James E Wilson <wilson@specifixinc.com>
1168 * ia64-opc-a.c (ia64_opcodes_a): Delete mov immediate pseudo for adds.
1169 * ia64-asmtab.c: Regnerate.
1171 2004-06-28 Alan Modra <amodra@bigpond.net.au>
1173 * ppc-opc.c (insert_fxm): Handle mfocrf and mtocrf.
1174 (extract_fxm): Don't test dialect.
1175 (XFXFXM_MASK): Include the power4 bit.
1176 (XFXM): Add p4 param.
1177 (powerpc_opcodes): Add mfocrf and mtocrf. Adjust mtcr.
1179 2004-06-27 Alexandre Oliva <aoliva@redhat.com>
1181 2003-07-21 Richard Sandiford <rsandifo@redhat.com>
1182 * disassemble.c (disassembler): Handle bfd_mach_h8300sxn.
1184 2004-06-26 Alan Modra <amodra@bigpond.net.au>
1186 * ppc-opc.c (BH, XLBH_MASK): Define.
1187 (powerpc_opcodes): Allow BH field on bclr, bclrl, bcctr, bcctrl.
1189 2004-06-24 Alan Modra <amodra@bigpond.net.au>
1191 * i386-dis.c (x_mode): Comment.
1192 (two_source_ops): File scope.
1193 (float_mem): Correct fisttpll and fistpll.
1194 (float_mem_mode): New table.
1196 (OP_E): Correct intel mode PTR output.
1197 (ptr_reg): Use open_char and close_char.
1198 (PNI_Fixup): Handle possible suffix on sidt. Use op1out etc. for
1199 operands. Set two_source_ops.
1201 2004-06-15 Alan Modra <amodra@bigpond.net.au>
1203 * arc-ext.c (build_ARC_extmap): Use bfd_get_section_size
1204 instead of _raw_size.
1206 2004-06-08 Jakub Jelinek <jakub@redhat.com>
1208 * ia64-gen.c (in_iclass): Handle more postinc st
1210 * ia64-asmtab.c: Rebuilt.
1212 2004-06-01 Martin Schwidefsky <schwidefsky@de.ibm.com>
1214 * s390-opc.txt: Correct architecture mask for some opcodes.
1215 lrv, lrvh, strv, ml, dl, alc, slb rll and mvclu are available
1216 in the esa mode as well.
1218 2004-05-28 Andrew Stubbs <andrew.stubbs@superh.com>
1220 * sh-dis.c (target_arch): Make unsigned.
1221 (print_insn_sh): Replace (most of) switch with a call to
1222 sh_get_arch_from_bfd_mach(). Also use new architecture flags system.
1223 * sh-opc.h: Redefine architecture flags values.
1224 Add sh3-nommu architecture.
1225 Reorganise <arch>_up macros so they make more visual sense.
1226 (SH_MERGE_ARCH_SET): Define new macro.
1227 (SH_VALID_BASE_ARCH_SET): Likewise.
1228 (SH_VALID_MMU_ARCH_SET): Likewise.
1229 (SH_VALID_CO_ARCH_SET): Likewise.
1230 (SH_VALID_ARCH_SET): Likewise.
1231 (SH_MERGE_ARCH_SET_VALID): Likewise.
1232 (SH_ARCH_SET_HAS_FPU): Likewise.
1233 (SH_ARCH_SET_HAS_DSP): Likewise.
1234 (SH_ARCH_UNKNOWN_ARCH): Likewise.
1235 (sh_get_arch_from_bfd_mach): Add prototype.
1236 (sh_get_arch_up_from_bfd_mach): Likewise.
1237 (sh_get_bfd_mach_from_arch_set): Likewise.
1238 (sh_merge_bfd_arc): Likewise.
1240 2004-05-24 Peter Barada <peter@the-baradas.com>
1242 * m68k-dis.c(print_insn_m68k): Strip body of diassembly out
1243 into new match_insn_m68k function. Loop over canidate
1244 matches and select first that completely matches.
1245 * m68k-dis.c(print_insn_arg): Fix 'g' case to only extract 1 bit.
1246 * m68k-dis.c(print_insn_arg): Call new function m68k_valid_ea
1247 to verify addressing for MAC/EMAC.
1248 * m68k-dis.c(print_insn_arg): Use reg_half_names for MAC/EMAC
1249 reigster halves since 'fpu' and 'spl' look misleading.
1250 * m68k-dis.c(fetch_arg): Fix 'G', 'H', 'I', 'f', 'M', 'N' cases.
1251 * m68k-opc.c: Rearragne mac/emac cases to use longest for
1252 first, tighten up match masks.
1253 * m68k-opc.c: Add 'size' field to struct m68k_opcode. Produce
1254 'size' from special case code in print_insn_m68k to
1255 determine decode size of insns.
1257 2004-05-19 Alan Modra <amodra@bigpond.net.au>
1259 * ppc-opc.c (insert_fxm): Enable two operand mfcr when -many as
1260 well as when -mpower4.
1262 2004-05-13 Nick Clifton <nickc@redhat.com>
1264 * po/fr.po: Updated French translation.
1266 2004-05-05 Peter Barada <peter@the-baradas.com>
1268 * m68k-dis.c(print_insn_m68k): Add new chips, use core
1269 variants in arch_mask. Only set m68881/68851 for 68k chips.
1270 * m68k-op.c: Switch from ColdFire chips to core variants.
1272 2004-05-05 Alan Modra <amodra@bigpond.net.au>
1275 * ppc-opc.c (PPCVEC): Remove PPC_OPCODE_PPC.
1277 2004-04-29 Ben Elliston <bje@au.ibm.com>
1279 * ppc-opc.c (XCMPL): Renmame to XOPL. Update users.
1280 (powerpc_opcodes): Add "dbczl" instruction for PPC970.
1282 2004-04-22 Kaz Kojima <kkojima@rr.iij4u.or.jp>
1284 * sh-dis.c (print_insn_sh): Print the value in constant pool
1285 as a symbol if it looks like a symbol.
1287 2004-04-22 Peter Barada <peter@the-baradas.com>
1289 * m68k-dis.c(print_insn_m68k): Set mfcmac/mcfemac on
1290 appropriate ColdFire architectures.
1291 (print_insn_m68k): Handle EMAC, MAC/EMAC scalefactor, and MAC/EMAC
1293 Add EMAC instructions, fix MAC instructions. Remove
1294 macmw/macml/msacmw/msacml instructions since mask addressing now
1297 2004-04-20 Jakub Jelinek <jakub@redhat.com>
1299 * sparc-opc.c (fmoviccx, fmovfccx, fmovccx): Define.
1300 (fmovicc, fmovfcc, fmovcc): Remove fpsize argument, change opcode to
1301 suffix. Use fmov*x macros, create all 3 fpsize variants in one
1302 macro. Adjust all users.
1304 2004-04-15 Anil Paranjpe <anilp1@kpitcummins.com>
1306 * h8300-dis.c (bfd_h8_disassemble) : Treat "adds" & "subs"
1309 2004-03-30 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
1311 * m32r-asm.c: Regenerate.
1313 2004-03-29 Stan Shebs <shebs@apple.com>
1315 * mpw-config.in, mpw-make.sed: Remove MPW support files, no longer
1318 2004-03-19 Alan Modra <amodra@bigpond.net.au>
1320 * aclocal.m4: Regenerate.
1321 * config.in: Regenerate.
1322 * configure: Regenerate.
1323 * po/POTFILES.in: Regenerate.
1324 * po/opcodes.pot: Regenerate.
1326 2004-03-16 Alan Modra <amodra@bigpond.net.au>
1328 * ppc-dis.c (print_insn_powerpc): Don't print tabs. Handle
1330 * ppc-opc.c (RA0): Define.
1331 (RAQ, RAL, RAM, RAS, RSQ, RTQ, RSO): Use PPC_OPERAND_GPR_0.
1332 (RAOPT): Rename from RAO. Update all uses.
1333 (powerpc_opcodes): Use RA0 as appropriate.
1335 2004-03-15 Aldy Hernandez <aldyh@redhat.com>
1337 * ppc-opc.c (powerpc_opcodes): Add BOOKE versions of mfsprg.
1339 2004-03-15 Alan Modra <amodra@bigpond.net.au>
1341 * sparc-dis.c (print_insn_sparc): Update getword prototype.
1343 2004-03-12 Michal Ludvig <mludvig@suse.cz>
1345 * i386-dis.c (GRPPLOCK): Delete.
1346 (grps): Delete GRPPLOCK entry.
1348 2004-03-12 Alan Modra <amodra@bigpond.net.au>
1350 * i386-dis.c (OP_M, OP_0f0e, OP_0fae, NOP_Fixup): New functions.
1352 (None, PADLOCK_SPECIAL, PADLOCK_0): Delete.
1353 (GRPPADLCK): Define.
1354 (dis386): Use NOP_Fixup on "nop".
1355 (dis386_twobyte): Use GRPPADLCK on opcode 0xa7.
1356 (twobyte_has_modrm): Set for 0xa7.
1357 (padlock_table): Delete. Move to..
1358 (grps): ..here, using OP_0f07. Use OP_Ofae on lfence, mfence
1360 (print_insn): Revert PADLOCK_SPECIAL code.
1361 (OP_E): Delete sfence, lfence, mfence checks.
1363 2004-03-12 Jakub Jelinek <jakub@redhat.com>
1365 * i386-dis.c (grps): Use INVLPG_Fixup instead of OP_E for invlpg.
1366 (INVLPG_Fixup): New function.
1367 (PNI_Fixup): Remove ATTRIBUTE_UNUSED from sizeflag.
1369 2004-03-12 Michal Ludvig <mludvig@suse.cz>
1371 * i386-dis.c (PADLOCK_SPECIAL, PADLOCK_0): New defines.
1372 (dis386_twobyte): Opcode 0xa7 is PADLOCK_0.
1373 (padlock_table): New struct with PadLock instructions.
1374 (print_insn): Handle PADLOCK_SPECIAL.
1376 2004-03-12 Alan Modra <amodra@bigpond.net.au>
1378 * i386-dis.c (grps): Use clflush by default for 0x0fae/7.
1379 (OP_E): Twiddle clflush to sfence here.
1381 2004-03-08 Nick Clifton <nickc@redhat.com>
1383 * po/de.po: Updated German translation.
1385 2003-03-03 Andrew Stubbs <andrew.stubbs@superh.com>
1387 * sh-dis.c (print_insn_sh): Don't disassemble fp instructions in
1388 nofpu mode. Add BFD type bfd_mach_sh4_nommu_nofpu.
1389 * sh-opc.h: Add sh4_nommu_nofpu architecture and adjust instructions
1392 2004-03-01 Richard Sandiford <rsandifo@redhat.com>
1394 * frv-asm.c: Regenerate.
1395 * frv-desc.c: Regenerate.
1396 * frv-desc.h: Regenerate.
1397 * frv-dis.c: Regenerate.
1398 * frv-ibld.c: Regenerate.
1399 * frv-opc.c: Regenerate.
1400 * frv-opc.h: Regenerate.
1402 2004-03-01 Richard Sandiford <rsandifo@redhat.com>
1404 * frv-desc.c, frv-opc.c: Regenerate.
1406 2004-03-01 Richard Sandiford <rsandifo@redhat.com>
1408 * frv-desc.c, frv-opc.c, frv-opc.h: Regenerate.
1410 2004-02-26 Andrew Stubbs <andrew.stubbs@superh.com>
1412 * sh-opc.h: Move fsca and fsrra instructions from sh4a to sh4.
1413 Also correct mistake in the comment.
1415 2004-02-26 Andrew Stubbs <andrew.stubbs@superh.com>
1417 * sh-dis.c (print_insn_sh): Add REG_N_D nibble type to
1418 ensure that double registers have even numbers.
1419 Add REG_N_B01 for nn01 (binary 01) nibble to ensure
1420 that reserved instruction 0xfffd does not decode the same
1422 * sh-opc.h: Add REG_N_D nibble type and use it whereever
1423 REG_N refers to a double register.
1424 Add REG_N_B01 nibble type and use it instead of REG_NM
1426 Adjust the bit patterns in a few comments.
1428 2004-02-25 Aldy Hernandez <aldyh@redhat.com>
1430 * ppc-opc.c (powerpc_opcodes): Change mask for dcbt and dcbtst.
1432 2004-02-20 Aldy Hernandez <aldyh@redhat.com>
1434 * ppc-opc.c (powerpc_opcodes): Move mfmcsrr0 before mfdc_dat.
1436 2004-02-20 Aldy Hernandez <aldyh@redhat.com>
1438 * ppc-opc.c (powerpc_opcodes): Add m*ivor35.
1440 2004-02-20 Aldy Hernandez <aldyh@redhat.com>
1442 * ppc-opc.c (powerpc_opcodes): Add mfivor32, mfivor33, mfivor34,
1443 mtivor32, mtivor33, mtivor34.
1445 2004-02-19 Aldy Hernandez <aldyh@redhat.com>
1447 * ppc-opc.c (powerpc_opcodes): Add mfmcar.
1449 2004-02-10 Petko Manolov <petkan@nucleusys.com>
1451 * arm-opc.h Maverick accumulator register opcode fixes.
1453 2004-02-13 Ben Elliston <bje@wasabisystems.com>
1455 * m32r-dis.c: Regenerate.
1457 2004-01-27 Michael Snyder <msnyder@redhat.com>
1459 * sh-opc.h (sh_table): "fsrra", not "fssra".
1461 2004-01-23 Andrew Over <andrew.over@cs.anu.edu.au>
1463 * sparc-opc.c (fdtox, fstox, fqtox, fxtod, fxtos, fxtoq): Tighten
1466 2004-01-19 Andrew Over <andrew.over@cs.anu.edu.au>
1468 * sparc-opc.c (sparc_opcodes) <f[dsq]tox, fxto[dsq]>: Fix args.
1470 2004-01-19 Alan Modra <amodra@bigpond.net.au>
1472 * i386-dis.c (OP_E): Print scale factor on intel mode sib when not
1473 1. Don't print scale factor on AT&T mode when index missing.
1475 2004-01-16 Alexandre Oliva <aoliva@redhat.com>
1477 * m10300-opc.c (mov): 8- and 24-bit immediates are zero-extended
1478 when loaded into XR registers.
1480 2004-01-14 Richard Sandiford <rsandifo@redhat.com>
1482 * frv-desc.h: Regenerate.
1483 * frv-desc.c: Regenerate.
1484 * frv-opc.c: Regenerate.
1486 2004-01-13 Michael Snyder <msnyder@redhat.com>
1488 * sh-dis.c (print_insn_sh): Allocate 4 bytes for insn.
1490 2004-01-09 Paul Brook <paul@codesourcery.com>
1492 * arm-opc.h (arm_opcodes): Move generic mcrr after known
1495 2004-01-07 Daniel Jacobowitz <drow@mvista.com>
1497 * Makefile.am (libopcodes_la_DEPENDENCIES)
1498 (libopcodes_la_LIBADD): Revert 2003-05-17 change. Add explanatory
1499 comment about the problem.
1500 * Makefile.in: Regenerate.
1502 2004-01-06 Alexandre Oliva <aoliva@redhat.com>
1504 2003-12-19 Alexandre Oliva <aoliva@redhat.com>
1505 * frv-asm.c (parse_ulo16, parse_uhi16, parse_d12): Fix some
1506 cut&paste errors in shifting/truncating numerical operands.
1507 2003-08-04 Alexandre Oliva <aoliva@redhat.com>
1508 * frv-asm.c (parse_ulo16): Parse gotofflo and gotofffuncdesclo.
1509 (parse_uslo16): Likewise.
1510 (parse_uhi16): Parse gotoffhi and gotofffuncdeschi.
1511 (parse_d12): Parse gotoff12 and gotofffuncdesc12.
1512 (parse_s12): Likewise.
1513 2003-08-04 Alexandre Oliva <aoliva@redhat.com>
1514 * frv-asm.c (parse_ulo16): Parse gotlo and gotfuncdesclo.
1515 (parse_uslo16): Likewise.
1516 (parse_uhi16): Parse gothi and gotfuncdeschi.
1517 (parse_d12): Parse got12 and gotfuncdesc12.
1518 (parse_s12): Likewise.
1520 2004-01-02 Albert Bartoszko <albar@nt.kegel.com.pl>
1522 * msp430-dis.c (msp430_doubleoperand): Check for an 'add'
1523 instruction which looks similar to an 'rla' instruction.
1525 For older changes see ChangeLog-0203
1531 version-control: never