1 2012-10-04 Nick Clifton <nickc@redhat.com>
3 * v850-dis.c (disassemble): Place square parentheses around second
4 register operand of clr1, not1, set1 and tst1 instructions.
6 2012-10-04 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
8 * s390-mkopc.c: Support new option zEC12.
9 * s390-opc.c: Add new instruction formats.
10 * s390-opc.txt: Add new instructions for zEC12.
12 2012-09-27 Anthony Green <green@moxielogic.com>
14 * moxie-dis.c (print_insn_moxie): Print 'bad' instructions.
15 * moxie-opc.c: All 'bad' instructions have the itype MOXIE_BAD.
17 2012-09-25 Saravanan Ekanathan <saravanan.ekanathan@amd.com>
19 * i386-gen.c (cpu_flag_init): Add missing Cpu flags in
20 CPU_BDVER1_FLAGS, CPU_BDVER2_FLAGS, CPU_BTVER1_FLAGS
22 * i386-init.h: Regenerated.
24 2012-09-20 Michael Zolotukhin <michael.v.zolotukhin@intel.com>
26 * i386-gen.c (cpu_flag_init): Add CpuCX16 to CPU_NOCONA_FLAGS,
27 CPU_CORE_FLAGS, CPU_CORE2_FLAGS, CPU_COREI7_FLAGS,
28 CPU_BDVER1_FLAGS, CPU_BDVER2_FLAGS, CPU_BTVER1_FLAGS,
29 CPU_BTVER2_FLAGS. Add CPU_CX16_FLAGS.
30 (cpu_flags): Add CpuCX16.
31 * i386-opc.h (CpuCX16): New.
32 (i386_cpu_flags): Add cpucx16.
33 * i386-opc.tbl: Replace CpuSSE3 with CpuCX16 for cmpxchg16b.
34 * i386-tbl.h: Regenerate.
35 * i386-init.h: Likewise.
37 2012-09-18 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
39 * arm-dis.c: Changed ldra and strl-form mnemonics
42 2012-09-18 Chao-ying Fu <fu@mips.com>
44 * micromips-opc.c (micromips_opcodes): Correct the encoding of
45 the "swxc1" instruction.
47 2012-09-17 Yufeng Zhang <yufeng.zhang@arm.com>
49 * aarch64-asm.c (aarch64_ins_imm_half): Remove ATTRIBUTE_UNUSED from
51 (aarch64_ins_addr_simm): Add ATTRIBUTE_UNUSED to the parameter 'inst'.
52 (convert_mov_to_movewide): Change to assert (0) when
53 aarch64_wide_constant_p returns FALSE.
55 2012-09-14 David Edelsohn <dje.gcc@gmail.com>
57 * configure: Regenerate.
59 2012-09-14 Anthony Green <green@moxielogic.com>
61 * moxie-dis.c (print_insn_moxie): Branch targets are relative to
62 the address after the branch instruction.
64 2012-09-13 Anthony Green <green@moxielogic.com>
66 * moxie-dis.c (print_insn_moxie): Handle bi-endian encodings.
68 2012-09-10 Matthias Klose <doko@ubuntu.com>
70 * config.in: Disable sanity check for kfreebsd.
72 2012-09-10 H.J. Lu <hongjiu.lu@intel.com>
74 * configure: Regenerated.
76 2012-09-04 Sergey A. Guriev <sergey.a.guriev@intel.com>
78 * ia64-asmtab.h (completer_index): Extend bitfield to full uint.
79 * ia64-gen.c: Promote completer index type to longlong.
80 (irf_operand): Add new register recognition.
81 (in_iclass_mov_x): Add an entry for the new mov_* instruction type.
82 (lookup_specifier): Add new resource recognition.
83 (insert_bit_table_ent): Relax abort condition according to the
84 changed completer index type.
85 (print_dis_table): Fix printf format for completer index.
86 * ia64-ic.tbl: Add a new instruction class.
87 * ia64-opc-i.c (ia64_opcodes_i): Define new I-instructions.
88 * ia64-opc-m.c (ia64_opcodes_m): Define new M-instructions.
89 * ia64-opc.h: Define short names for new operand types.
90 * ia64-raw.tbl: Add new RAW resource for DAHR register.
91 * ia64-waw.tbl: Add new WAW resource for DAHR register.
92 * ia64-asmtab.c: Regenerate.
94 2012-08-29 Peter Bergner <bergner@vnet.ibm.com>
96 * ppc-opc.c (VXASHB_MASK): New define.
97 (powerpc_opcodes) <vsldoi>: Use VXASHB_MASK.
99 2012-08-28 Peter Bergner <bergner@vnet.ibm.com>
101 * ppc-opc.c (UIMM4, UIMM3, UIMM2, VXVA_MASK, VXVB_MASK, VXVAVB_MASK,
102 VXVDVA_MASK, VXUIMM4_MASK, VXUIMM3_MASK, VXUIMM2_MASK): New defines.
103 (powerpc_opcodes) <vexptefp, vlogefp, vrefp, vrfim, vrfin, vrfip,
104 vrfiz, vrsqrtefp, vupkhpx, vupkhsb, vupkhsh, vupklpx, vupklsb,
105 vupklsh>: Use VXVA_MASK.
106 <vspltisb, vspltish, vspltisw>: Use VXVB_MASK.
107 <mfvscr>: Use VXVAVB_MASK.
108 <mtvscr>: Use VXVDVA_MASK.
109 <vspltb>: Use VXUIMM4_MASK.
110 <vsplth>: Use VXUIMM3_MASK.
111 <vspltw>: Use VXUIMM2_MASK.
113 2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
115 * arm-dis.c (neon_opcodes): Add 2 operand sha instructions.
117 2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
119 * arm-dis.c (neon_opcodes): Add SHA 3-operand instructions.
121 2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
123 * arm-dis.c (neon_opcodes): Handle VMULL.P64.
125 2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
127 * arm-dis.c (neon_opcodes): Add support for AES instructions.
129 2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
131 * arm-dis.c (coprocessor_opcodes): Add support for HP/DP
134 2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
136 * arm-dis.c (coprocessor_opcodes): Add VRINT.
137 (neon_opcodes): Likewise.
139 2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
141 * arm-dis.c (coprocessor_opcodes): Add support for new VCVT
143 (neon_opcodes): Likewise.
145 2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
147 * arm-dis.c (coprocessor_opcodes): Add VMAXNM/VMINNM.
148 (neon_opcodes): Likewise.
150 2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
152 * arm-dis.c (coprocessor_opcodes): Add VSEL.
153 (print_insn_coprocessor): Add new %<>c bitfield format
156 2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
158 * arm-dis.c (arm_opcodes): Add LDRA/STRL instructions.
159 (thumb32_opcodes): Likewise.
160 (print_arm_insn): Add support for %<>T formatter.
162 2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
164 * arm-dis.c (arm_opcodes): Add HLT.
165 (thumb_opcodes): Likewise.
167 2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
169 * arm-dis.c (thumb32_opcodes): Add DCPS instruction.
171 2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
173 * arm-dis.c (arm_opcodes): Add SEVL.
174 (thumb_opcodes): Likewise.
175 (thumb32_opcodes): Likewise.
177 2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
179 * arm-dis.c (data_barrier_option): New function.
180 (print_insn_arm): Use data_barrier_option.
181 (print_insn_thumb32): Use data_barrier_option.
183 2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com
185 * arm-dis.c (COND_UNCOND): New constant.
186 (print_insn_coprocessor): Add support for %u format specifier.
187 (print_insn_neon): Likewise.
189 2012-08-21 David S. Miller <davem@davemloft.net>
191 * sparc-opc.c (4-argument crypto instructions): Fix encoding using
194 2012-08-20 Edmar Wienskoski <edmar@freescale.com>
196 * ppc-opc.c (powerpc_opcodes): Changed opcode for vabsdub,
197 vabsduh, vabsduw, mviwsplt.
199 2012-08-17 Nagajyothi Eggone <nagajyothi.eggone@amd.com>
201 * i386-gen.c (cpu_flag_init): Add CPU_BTVER1_FLAGS and
204 * i386-opc.h: Update CpuPRFCHW comment.
206 * i386-opc.tbl: Enable prefetch instruction for CpuPRFCHW.
207 * i386-init.h: Regenerated.
208 * i386-tbl.h: Likewise.
210 2012-08-17 Nick Clifton <nickc@redhat.com>
212 * po/uk.po: New Ukranian translation.
213 * configure.in (ALL_LINGUAS): Add uk.
214 * configure: Regenerate.
216 2012-08-16 Peter Bergner <bergner@vnet.ibm.com>
218 * ppc-opc.c (powerpc_opcodes) <"lswx">: Use RAX for the second and
219 RBX for the third operand.
220 <"lswi">: Use RAX for second and NBI for the third operand.
222 2012-08-15 DJ Delorie <dj@redhat.com>
224 * rl78-decode.opc (rl78_decode_opcode): Merge %e and %[01]
225 operands, so that data addresses can be corrected when not
227 * rl78-decode.c: Regenerate.
228 * rl78-dis.c (print_insn_rl78): Make order of modifiers
229 irrelevent. When the 'e' specifier is used on an operand and no
230 ES prefix is provided, adjust address to make it absolute.
232 2012-08-15 Peter Bergner <bergner@vnet.ibm.com>
234 * ppc-opc.c <RSQ, RTQ>: Use PPC_OPERAND_GPR.
236 2012-08-15 Peter Bergner <bergner@vnet.ibm.com>
238 * ppc-opc.c <xnop, yield, mdoio, mdoom>: New extended mnemonics.
240 2012-08-14 Maciej W. Rozycki <macro@codesourcery.com>
242 * mips-dis.c (print_insn_args): Add GET_OP and GET_OP_S local
243 macros, use local variables for info struct member accesses,
244 update the type of the variable used to hold the instruction
246 (print_insn_mips, print_mips16_insn_arg): Likewise.
247 (print_insn_mips16): Add GET_OP and GET_OP_S local macros, use
248 local variables for info struct member accesses.
249 (print_insn_micromips): Add GET_OP_S local macro.
250 (_print_insn_mips): Update the type of the variable used to hold
251 the instruction word.
253 2012-08-13 Ian Bolton <ian.bolton@arm.com>
254 Laurent Desnogues <laurent.desnogues@arm.com>
255 Jim MacArthur <jim.macarthur@arm.com>
256 Marcus Shawcroft <marcus.shawcroft@arm.com>
257 Nigel Stephens <nigel.stephens@arm.com>
258 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
259 Richard Earnshaw <rearnsha@arm.com>
260 Sofiane Naci <sofiane.naci@arm.com>
261 Tejas Belagod <tejas.belagod@arm.com>
262 Yufeng Zhang <yufeng.zhang@arm.com>
264 * Makefile.am: Add AArch64.
265 * Makefile.in: Regenerate.
266 * aarch64-asm.c: New file.
267 * aarch64-asm.h: New file.
268 * aarch64-dis.c: New file.
269 * aarch64-dis.h: New file.
270 * aarch64-gen.c: New file.
271 * aarch64-opc.c: New file.
272 * aarch64-opc.h: New file.
273 * aarch64-tbl.h: New file.
274 * configure.in: Add AArch64.
275 * configure: Regenerate.
276 * disassemble.c: Add AArch64.
277 * aarch64-asm-2.c: New file (automatically generated).
278 * aarch64-dis-2.c: New file (automatically generated).
279 * aarch64-opc-2.c: New file (automatically generated).
280 * po/POTFILES.in: Regenerate.
282 2012-08-13 Maciej W. Rozycki <macro@codesourcery.com>
284 * micromips-opc.c (micromips_opcodes): Update comment.
285 * mips-opc.c (mips_builtin_opcodes): Likewise. Mark coprocessor
286 instructions for IOCT as appropriate.
287 * mips-dis.c (print_insn_mips): Replace OPCODE_IS_MEMBER with
289 * configure.in: Substitute NO_WMISSING_FIELD_INITIALIZERS with
290 the result of a check for the -Wno-missing-field-initializers
292 * Makefile.am (NO_WMISSING_FIELD_INITIALIZERS): New variable.
293 (mips-opc.lo): Pass $(NO_WMISSING_FIELD_INITIALIZERS) to
295 (mips16-opc.lo): Likewise.
296 (micromips-opc.lo): Likewise.
297 * aclocal.m4: Regenerate.
298 * configure: Regenerate.
299 * Makefile.in: Regenerate.
301 2012-08-11 Saravanan Ekanathan <saravanan.ekanathan@amd.com>
304 * i386-gen.c (cpu_flag_init): Add CpuFMA in CPU_BDVER2_FLAGS.
305 * i386-init.h: Regenerated.
307 2012-08-09 Nick Clifton <nickc@redhat.com>
309 * po/vi.po: Updated Vietnamese translation.
311 2012-08-07 Roland McGrath <mcgrathr@google.com>
313 * i386-dis.c (reg_table): Fill out REG_0F0D table with
314 AMD-reserved cases as "prefetch".
315 (MOD_0F18_REG_4, MOD_0F18_REG_5): New enum constants.
316 (MOD_0F18_REG_6, MOD_0F18_REG_7): Likewise.
317 (reg_table): Use those under REG_0F18.
318 (mod_table): Add those cases as "nop/reserved".
320 2012-08-07 Jan Beulich <jbeulich@suse.com>
322 * i386-opc.tbl: Remove "FIXME" comments from SVME instructions.
324 2012-08-06 Roland McGrath <mcgrathr@google.com>
326 * i386-dis.c (print_insn): Print spaces between multiple excess
327 prefixes. Return actual number of excess prefixes consumed,
330 * i386-dis.c (OP_REG): Ignore REX_B for segment register cases.
332 2012-08-06 Roland McGrath <mcgrathr@google.com>
333 Victor Khimenko <khim@google.com>
334 H.J. Lu <hongjiu.lu@intel.com>
336 * i386-dis.c (OP_sI): In b_T_mode and v_mode, REX_W trumps DFLAG.
337 (putop): For 'T', 'U', and 'V', treat REX_W like DFLAG.
338 (intel_operand_size): For stack_v_mode, treat REX_W like DFLAG.
339 (OP_E_register): Likewise.
340 (OP_REG): For low 8 whole registers, treat REX_W like DFLAG.
342 2012-08-02 Jan-Benedict Glaw <jbglaw@lug-owl.de>
344 * configure.in: Formatting.
345 * configure: Regenerate.
347 2012-08-01 Alan Modra <amodra@gmail.com>
349 * h8300-dis.c: Fix printf arg warnings.
350 * i960-dis.c: Likewise.
351 * mips-dis.c: Likewise.
352 * pdp11-dis.c: Likewise.
353 * sh-dis.c: Likewise.
354 * v850-dis.c: Likewise.
355 * configure.in: Formatting.
356 * configure: Regenerate.
357 * rl78-decode.c: Regenerate.
358 * po/POTFILES.in: Regenerate.
360 2012-07-31 Chao-Ying Fu <fu@mips.com>
361 Catherine Moore <clm@codesourcery.com>
362 Maciej W. Rozycki <macro@codesourcery.com>
364 * micromips-opc.c (WR_a, RD_a, MOD_a): New macros.
365 (DSP_VOLA): Likewise.
366 (D32, D33): Likewise.
367 (micromips_opcodes): Add DSP ASE instructions.
368 * mips-dis.c (print_insn_micromips) <'2', '3'>: New cases.
369 <'4', '5', '6', '7', '8', '0', '^', '@'>: Likewise.
371 2012-07-31 Jan Beulich <jbeulich@suse.com>
373 * i386-opc.tbl (vmovntdqa): Move up into 256-bit integer AVX2
374 instruction group. Mark as requiring AVX2.
375 * i386-tbl.h: Re-generate.
377 2012-07-30 Nick Clifton <nickc@redhat.com>
379 * po/opcodes.pot: Updated template.
380 * po/es.po: Updated Spanish translation.
381 * po/fi.po: Updated Finnish translation.
383 2012-07-27 Mike Frysinger <vapier@gentoo.org>
385 * configure.in (BFD_VERSION): Run bfd/configure --version and
386 parse the output of that.
387 * configure: Regenerate.
389 2012-07-25 James Lemke <jwlemke@codesourcery.com>
391 * ppc-opc.c (powerpc_opcodes): Add/remove PPCVLE for some 32-bit insns.
393 2012-07-24 Stephan McCamant <smcc@cs.berkeley.edu>
394 Dr David Alan Gilbert <dave@treblig.org>
397 * arm-dis.c: Add necessary casts for printing integer values.
398 Use %s when printing string values.
399 * hppa-dis.c: Likewise.
400 * m68k-dis.c: Likewise.
401 * microblaze-dis.c: Likewise.
402 * mips-dis.c: Likewise.
403 * sparc-dis.c: Likewise.
405 2012-07-19 Michael Zolotukhin <michael.v.zolotukhin@intel.com>
408 * i386-dis.c (VEX_LEN_0FXOP_08_CC): New.
409 (VEX_LEN_0FXOP_08_CD): Likewise.
410 (VEX_LEN_0FXOP_08_CE): Likewise.
411 (VEX_LEN_0FXOP_08_CF): Likewise.
412 (VEX_LEN_0FXOP_08_EC): Likewise.
413 (VEX_LEN_0FXOP_08_ED): Likewise.
414 (VEX_LEN_0FXOP_08_EE): Likewise.
415 (VEX_LEN_0FXOP_08_EF): Likewise.
416 (xop_table): Fix entries for vpcomb, vpcomw, vpcomd, vpcomq,
417 vpcomub, vpcomuw, vpcomud, vpcomuq.
418 (vex_len_table): Add entries for VEX_LEN_0FXOP_08_CC,
419 VEX_LEN_0FXOP_08_CD, VEX_LEN_0FXOP_08_CE, VEX_LEN_0FXOP_08_CF,
420 VEX_LEN_0FXOP_08_EC, VEX_LEN_0FXOP_08_ED, VEX_LEN_0FXOP_08_EE,
423 2012-07-16 Michael Zolotukhin <michael.v.zolotukhin@intel.com>
425 * i386-dis.c (PREFIX_0F38F6): New.
426 (prefix_table): Add adcx, adox instructions.
427 (three_byte_table): Use PREFIX_0F38F6.
428 (mod_table): Add rdseed instruction.
429 * i386-gen.c (cpu_flag_init): Add CpuADX, CpuRDSEED, CpuPRFCHW.
430 (cpu_flags): Likewise.
431 * i386-opc.h: Add CpuADX, CpuRDSEED, CpuPRFCHW.
432 (i386_cpu_flags): Add fields cpurdseed, cpuadx, cpuprfchw.
433 * i386-opc.tbl: Add instrcutions adcx, adox, rdseed. Extend
435 * i386-tbl.h: Regenerate.
436 * i386-init.h: Likewise.
438 2012-07-05 Thomas Schwinge <thomas@codesourcery.com>
440 * mips-dis.c: Remove gratuitous newline.
442 2012-07-05 Sean Keys <skeys@ipdatasys.com>
444 * xgate-dis.c: Removed an IF statement that will
445 always be false due to overlapping operand masks.
446 * xgate-opc.c: Corrected 'com' opcode entry and
449 2012-07-02 Roland McGrath <mcgrathr@google.com>
451 * i386-opc.tbl: Add RepPrefixOk to nop.
452 * i386-tbl.h: Regenerate.
454 2012-06-28 Nick Clifton <nickc@redhat.com>
456 * po/vi.po: Updated Vietnamese translation.
458 2012-06-22 Roland McGrath <mcgrathr@google.com>
460 * i386-opc.tbl: Add RepPrefixOk to ret.
461 * i386-tbl.h: Regenerate.
463 * i386-opc.h (RepPrefixOk): New enum constant.
464 (i386_opcode_modifier): New bitfield 'repprefixok'.
465 * i386-gen.c (opcode_modifiers): Add RepPrefixOk.
466 * i386-opc.tbl: Add RepPrefixOk to bsf, bsr, and to all
467 instructions that have IsString.
468 * i386-tbl.h: Regenerate.
470 2012-06-11 Andreas Schwab <schwab@linux-m68k.org>
472 * ppc-opc.c (lvsl, lvebx, isellt, icbt, ldepx, lwepx, lvsr, lvehx)
473 (iselgt, lvewx, iseleq, isel, dcbst, dcbstep, dcbfl, dcbf, lbepx)
474 (lvx, dcbfep, dcbtstls, stvebx, dcbtstlse, stdepx, stwepx, dcbtls)
475 (stvehx, dcbtlse, stvewx, stbepx, icblc, stvx, dcbtstt, dcbtst)
476 (dcbtst, dcbtstep, dcbtt, dcbt, dcbt, lhepx, eciwx, dcbtep)
477 (dcread, lxvdsx, lvxl, dcblc, sthepx, ecowx, dcbi, dcread, icbtls)
478 (stvxl, lxsdx, lfdepx, stxsdx, stfdepx, dcba, dcbal, lxvw4x)
479 (tlbivax, lfdpx, lxvd2x, tlbsrx., stxvw4x, tlbsx, tlbsx., stfdpx)
480 (stfqx, stxvd2x, icbi, icbiep, icread, dcbzep): Change RA to RA0.
482 2012-05-19 Alan Modra <amodra@gmail.com>
484 * ppc-dis.c: Don't include elf32-ppc.h, do include elf/ppc.h.
485 (get_powerpc_dialect): Detect VLE sections from ELF sh_flags.
487 2012-05-18 Alan Modra <amodra@gmail.com>
489 * ia64-opc.c: Remove #include "ansidecl.h".
490 * z8kgen.c: Include sysdep.h first.
492 * arc-dis.c: Include sysdep.h first, remove some redundant includes.
493 * bfin-dis.c: Likewise.
494 * i860-dis.c: Likewise.
495 * ia64-dis.c: Likewise.
496 * ia64-gen.c: Likewise.
497 * m68hc11-dis.c: Likewise.
498 * mmix-dis.c: Likewise.
499 * msp430-dis.c: Likewise.
500 * or32-dis.c: Likewise.
501 * rl78-dis.c: Likewise.
502 * rx-dis.c: Likewise.
503 * tic4x-dis.c: Likewise.
504 * tilegx-opc.c: Likewise.
505 * tilepro-opc.c: Likewise.
506 * rx-decode.c: Regenerate.
508 2012-05-17 James Lemke <jwlemke@codesourcery.com>
510 * ppc-opc.c (powerpc_macros): Add entries for e_extlwi to e_clrlslwi.
512 2012-05-17 James Lemke <jwlemke@codesourcery.com>
514 * ppc-opc.c (extract_sprg): Use ALLOW8_SPRG to include VLE.
516 2012-05-17 Daniel Richard G. <skunk@iskunk.org>
517 Nick Clifton <nickc@redhat.com>
520 * configure.in: Add check that sysdep.h has been included before
521 any system header files.
522 * configure: Regenerate.
523 * config.in: Regenerate.
524 * sysdep.h: Generate an error if included before config.h.
525 * alpha-opc.c: Include sysdep.h before any other header file.
526 * alpha-dis.c: Likewise.
527 * avr-dis.c: Likewise.
528 * cgen-opc.c: Likewise.
529 * cr16-dis.c: Likewise.
530 * cris-dis.c: Likewise.
531 * crx-dis.c: Likewise.
532 * d10v-dis.c: Likewise.
533 * d10v-opc.c: Likewise.
534 * d30v-dis.c: Likewise.
535 * d30v-opc.c: Likewise.
536 * h8500-dis.c: Likewise.
537 * i370-dis.c: Likewise.
538 * i370-opc.c: Likewise.
539 * m10200-dis.c: Likewise.
540 * m10300-dis.c: Likewise.
541 * micromips-opc.c: Likewise.
542 * mips-opc.c: Likewise.
543 * mips61-opc.c: Likewise.
544 * moxie-dis.c: Likewise.
545 * or32-opc.c: Likewise.
546 * pj-dis.c: Likewise.
547 * ppc-dis.c: Likewise.
548 * ppc-opc.c: Likewise.
549 * s390-dis.c: Likewise.
550 * sh-dis.c: Likewise.
551 * sh64-dis.c: Likewise.
552 * sparc-dis.c: Likewise.
553 * sparc-opc.c: Likewise.
554 * spu-dis.c: Likewise.
555 * tic30-dis.c: Likewise.
556 * tic54x-dis.c: Likewise.
557 * tic80-dis.c: Likewise.
558 * tic80-opc.c: Likewise.
559 * tilegx-dis.c: Likewise.
560 * tilepro-dis.c: Likewise.
561 * v850-dis.c: Likewise.
562 * v850-opc.c: Likewise.
563 * vax-dis.c: Likewise.
564 * w65-dis.c: Likewise.
565 * xgate-dis.c: Likewise.
566 * xtensa-dis.c: Likewise.
567 * rl78-decode.opc: Likewise.
568 * rl78-decode.c: Regenerate.
569 * rx-decode.opc: Likewise.
570 * rx-decode.c: Regenerate.
572 2012-05-17 Alan Modra <amodra@gmail.com>
574 * ppc_dis.c: Don't include elf/ppc.h.
576 2012-05-16 Meador Inge <meadori@codesourcery.com>
578 * arm-dis.c (arm_opcodes): Don't disassemble STMFD/LDMIA sp!, {reg}
581 2012-05-15 James Murray <jsm@jsm-net.demon.co.uk>
582 Stephane Carrez <stcarrez@nerim.fr>
584 * configure.in: Add S12X and XGATE co-processor support to m68hc11
586 * disassemble.c: Likewise.
587 * configure: Regenerate.
588 * m68hc11-dis.c: Make objdump output more consistent, use hex
589 instead of decimal and use 0x prefix for hex.
590 * m68hc11-opc.c: Add S12X and XGATE opcodes.
592 2012-05-14 James Lemke <jwlemke@codesourcery.com>
594 * ppc-dis.c (get_powerpc_dialect): Use is_ppc_vle.
595 (PPC_OPCD_SEGS, VLE_OPCD_SEGS): New defines.
596 (vle_opcd_indices): New array.
597 (lookup_vle): New function.
598 (disassemble_init_powerpc): Revise for second (VLE) opcode table.
599 (print_insn_powerpc): Likewise.
600 * ppc-opc.c: Likewise.
602 2012-05-14 Catherine Moore <clm@codesourcery.com>
603 Maciej W. Rozycki <macro@codesourcery.com>
604 Rhonda Wittels <rhonda@codesourcery.com>
605 Nathan Froyd <froydnj@codesourcery.com>
607 * ppc-opc.c (insert_arx, extract_arx): New functions.
608 (insert_ary, extract_ary): New functions.
609 (insert_li20, extract_li20): New functions.
610 (insert_rx, extract_rx): New functions.
611 (insert_ry, extract_ry): New functions.
612 (insert_sci8, extract_sci8): New functions.
613 (insert_sci8n, extract_sci8n): New functions.
614 (insert_sd4h, extract_sd4h): New functions.
615 (insert_sd4w, extract_sd4w): New functions.
616 (insert_vlesi, extract_vlesi): New functions.
617 (insert_vlensi, extract_vlensi): New functions.
618 (insert_vleui, extract_vleui): New functions.
619 (insert_vleil, extract_vleil): New functions.
620 (BI_MASK, BB_MASK, BT): Use PPC_OPERAND_CR_BIT.
621 (BI16, BI32, BO32, B8): New.
622 (B15, B24, CRD32, CRS): New.
623 (CRD, OBF, BFA, CR, CRFS): Use PPC_OPERAND_CR_REG.
624 (DB, IMM20, RD, Rx, ARX, RY, RZ): New.
625 (ARY, SCLSCI8, SCLSCI8N, SE_SD, SE_SDH): New.
626 (SH6_MASK): Use PPC_OPSHIFT_INV.
627 (SI8, UI5, OIMM5, UI7, BO16): New.
628 (VLESIMM, VLENSIMM, VLEUIMM, VLEUIMML): New.
629 (XT6, XA6, XB6, XB6S, XC6): Use PPC_OPSHIFT_INV.
631 (insert_sprg, extract_sprg): Check ALLOW8_SPRG.
632 (OPVUP, OPVUP_MASK OPVUP): New
633 (BD8, BD8_MASK, BD8IO, BD8IO_MASK): New.
634 (EBD8IO, EBD8IO1_MASK, EBD8IO2_MASK, EBD8IO3_MASK): New.
635 (BD15, BD15_MASK, EBD15, EBD15_MASK, EBD15BI, EBD15BI_MASK): New.
636 (BD24,BD24_MASK, C_LK, C_LK_MASK, C, C_MASK): New.
637 (IA16, IA16_MASK, I16A, I16A_MASK, I16L, I16L_MASK): New.
638 (IM7, IM7_MASK, LI20, LI20_MASK, SCI8, SCI8_MASK): New.
639 (SCI8BF, SCI8BF_MASK, SD4, SD4_MASK): New.
640 (SE_IM5, SE_IM5_MASK): New.
641 (SE_R, SE_R_MASK, SE_RR, SE_RR_MASK): New.
642 (EX, EX_MASK, BO16F, BO16T, BO32F, BO32T): New.
643 (BO32DNZ, BO32DZ): New.
644 (NO371, PPCSPE, PPCISEL, PPCEFS, MULHW): Include PPC_OPCODE_VLE.
646 (powerpc_opcodes): Add new VLE instructions. Update existing
647 instruction to include PPCVLE if supported.
648 * ppc-dis.c (ppc_opts): Add vle entry.
649 (get_powerpc_dialect): New function.
650 (powerpc_init_dialect): VLE support.
651 (print_insn_big_powerpc): Call get_powerpc_dialect.
652 (print_insn_little_powerpc): Likewise.
653 (operand_value_powerpc): Handle negative shift counts.
654 (print_insn_powerpc): Handle 2-byte instruction lengths.
656 2012-05-11 Daniel Richard G. <skunk@iskunk.org>
659 * configure.in: Invoke ACX_HEADER_STRING.
660 * configure: Regenerate.
661 * config.in: Regenerate.
662 * sysdep.h: If STRINGS_WITH_STRING is defined then include both
663 string.h and strings.h.
665 2012-05-11 Nick Clifton <nickc@redhat.com>
668 * arm-dis.c (print_insn): Fix detection of instruction mode in
669 files containing multiple executable sections.
671 2012-05-03 Sean Keys <skeys@ipdatasys.com>
673 * Makefile.in, configure: regenerate
674 * disassemble.c (disassembler): Recognize ARCH_XGATE.
675 * xgate-dis.c (read_memory, print_insn, print_insn_xgate):
677 * configure.in: Recognize xgate.
678 * xgate-dis.c, xgate-opc.c: New files for support of xgate
679 * Makefile.am (CFILES, ALL_MACHINES): New files for disassembly
680 and opcode generation for xgate.
682 2012-04-30 DJ Delorie <dj@redhat.com>
684 * rx-decode.opc (MOV): Do not sign-extend immediates which are
685 already the maximum bit size.
686 * rx-decode.c: Regenerate.
688 2012-04-27 David S. Miller <davem@davemloft.net>
690 * sparc-dis.c (v9a_asr_reg_names): Add 'cfr'.
691 * sparc-opc.c (sparc_opcodes): Add rd/wr cases for %cfr.
693 * sparc-opc.c (sparc_opcodes): Add 'wr X, %pause' and 'pause'.
694 * sparc-dis.c (v9a_asr_reg_names): Add 'pause'.
696 * sparc-opc.c (CBCOND): New define.
697 (CBCOND_XCC): Likewise.
698 (cbcond): New helper macro.
699 (sparc_opcodes): Add compare-and-branch instructions.
701 * sparc-dis.c (print_insn_sparc): Handle ')'.
702 * sparc-opc.c (sparc_opcodes): Add crypto instructions.
704 * sparc-opc.c (sparc_opcodes): Rework table to put HWCAP values
705 into new struct sparc_opcode 'hwcaps' field instead of 'flags'.
707 2012-04-12 David S. Miller <davem@davemloft.net>
709 * sparc-dis.c (X_DISP10): Define.
710 (print_insn_sparc): Handle '='.
712 2012-04-01 Mike Frysinger <vapier@gentoo.org>
714 * bfin-dis.c (fmtconst): Replace decimal handling with a single
715 sprintf call and the '*' field width.
717 2012-03-23 Maxim Kuvyrkov <maxim@codesourcery.com>
719 * mips-dis.c (mips_arch_choices): Add entry for Broadcom XLP.
721 2012-03-16 Alan Modra <amodra@gmail.com>
723 * ppc-dis.c (PPC_OPC_SEGS, PPC_OP_TO_SEG): Delete.
724 (powerpc_opcd_indices): Bump array size.
725 (disassemble_init_powerpc): Set powerpc_opcd_indices entries
726 corresponding to unused opcodes to following entry.
727 (lookup_powerpc): New function, extracted and optimised from..
728 (print_insn_powerpc): ..here.
730 2012-03-15 Alan Modra <amodra@gmail.com>
731 James Lemke <jwlemke@codesourcery.com>
733 * disassemble.c (disassemble_init_for_target): Handle ppc init.
734 * ppc-dis.c (private): New var.
735 (powerpc_init_dialect): Don't return calloc failure, instead use
737 (PPC_OPCD_SEGS, PPC_OP_TO_SEG): Define.
738 (powerpc_opcd_indices): New array.
739 (disassemble_init_powerpc): New function.
740 (print_insn_big_powerpc): Don't init dialect here.
741 (print_insn_little_powerpc): Likewise.
742 (print_insn_powerpc): Start search using powerpc_opcd_indices.
744 2012-03-10 Edmar Wienskoski <edmar@freescale.com>
746 * ppc-dis.c (ppc_opts): Add entries for "e5500" and "e6500".
747 * ppc-opc.c (insert_ls, TMR, ESYNC, XSYNCLE_MASK): New.
748 (PPCVEC2, PPCTMR, E6500): New short names.
749 (powerpc_opcodes): Add vabsdub, vabsduh, vabsduw, dni, mvidsplt,
750 mviwsplt, icblq., mftmr, mttmr, dcblq., miso, lvexbx, lvexhx,
751 lvexwx, stvexbx, stvexhx, stvexwx, lvepx, lvepxl, stvepx, stvepxl,
752 lvtrx, lvtrxl, lvtlx, lvtlxl, stvfrx, stvfrxl, stvflx, stvflxl,
753 lvswx, lvswxl, stvswx, stvswxl, lvsm mnemonics. Accept LS, ESYNC
754 optional operands on sync instruction for E6500 target.
756 2012-03-08 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
758 * s390-opc.txt: Set instruction type of pku to SS_L2RDRD.
760 2012-02-27 Alan Modra <amodra@gmail.com>
762 * mt-dis.c: Regenerate.
764 2012-02-27 Alan Modra <amodra@gmail.com>
766 * v850-opc.c (extract_v8): Rearrange to make it obvious this
767 is the inverse of corresponding insert function.
768 (extract_d22, extract_u9, extract_r4): Likewise.
769 (extract_d9): Correct sign extension.
770 (extract_d16_15): Don't assume "long" is 32 bits, and don't
771 rely on implementation defined behaviour for shift right of
773 (extract_d16_16, extract_d17_16, extract_i9): Likewise.
774 (extract_d23): Likewise, and correct mask.
776 2012-02-27 Alan Modra <amodra@gmail.com>
778 * crx-dis.c (print_arg): Mask constant to 32 bits.
779 * crx-opc.c (cst4_map): Use int array.
781 2012-02-27 Alan Modra <amodra@gmail.com>
783 * arc-dis.c (BITS): Don't use shifts to mask off bits.
784 (FIELDD): Sign extend with xor,sub.
786 2012-02-25 Walter Lee <walt@tilera.com>
788 * tilegx-opc.c: Handle TILEGX_OPC_LD4S_TLS and TILEGX_OPC_LD_TLS.
789 * tilepro-opc.c: Handle TILEPRO_OPC_LW_TLS and
790 TILEPRO_OPC_LW_TLS_SN.
792 2012-02-21 H.J. Lu <hongjiu.lu@intel.com>
794 * i386-opc.h (HLEPrefixNone): New.
795 (HLEPrefixLock): Likewise.
796 (HLEPrefixAny): Likewise.
797 (HLEPrefixRelease): Likewise.
799 2012-02-08 H.J. Lu <hongjiu.lu@intel.com>
801 * i386-dis.c (HLE_Fixup1): New.
802 (HLE_Fixup2): Likewise.
803 (HLE_Fixup3): Likewise.
810 (MOD_C6_REG_7): Likewise.
811 (MOD_C7_REG_7): Likewise.
812 (RM_C6_REG_7): Likewise.
813 (RM_C7_REG_7): Likewise.
814 (XACQUIRE_PREFIX): Likewise.
815 (XRELEASE_PREFIX): Likewise.
816 (dis386): Use Ebh1/Evh1 on add, adc, and, btc, btr, bts,
817 cmpxchg, dec, inc, neg, not, or, sbb, sub, xor and xadd. Use
818 Ebh2/Evh2 on xchg. Use Ebh3/Evh3 on mov.
819 (reg_table): Use Ebh1/Evh1 on add, adc, and, dec, inc, neg,
820 not, or, sbb, sub and xor. Use Ebh3/Evh3 on mov. Use
821 MOD_C6_REG_7 and MOD_C7_REG_7.
822 (mod_table): Add MOD_C6_REG_7 and MOD_C7_REG_7.
823 (rm_table): Add RM_C6_REG_7 and RM_C7_REG_7. Add xend and
825 (prefix_name): Handle XACQUIRE_PREFIX and XRELEASE_PREFIX.
826 (CMPXCHG8B_Fixup): Handle HLE prefix on cmpxchg8b.
828 * i386-gen.c (cpu_flag_init): Add CPU_HLE_FLAGS and
830 (cpu_flags): Add CpuHLE and CpuRTM.
831 (opcode_modifiers): Add HLEPrefixOk.
833 * i386-opc.h (CpuHLE): New.
835 (HLEPrefixOk): Likewise.
836 (i386_cpu_flags): Add cpuhle and cpurtm.
837 (i386_opcode_modifier): Add hleprefixok.
839 * i386-opc.tbl: Add HLEPrefixOk=3 to mov. Add HLEPrefixOk to
840 add, adc, and, btc, btr, bts, cmpxchg, dec, inc, neg, not, or,
841 sbb, sub, xor and xadd. Add HLEPrefixOk=2 to xchg with memory
842 operand. Add xacquire, xrelease, xabort, xbegin, xend and
844 * i386-init.h: Regenerated.
845 * i386-tbl.h: Likewise.
847 2012-01-24 DJ Delorie <dj@redhat.com>
849 * rl78-decode.opc (rl78_decode_opcode): Add NOT1.
850 * rl78-decode.c: Regenerate.
852 2012-01-17 James Murray <jsm@jsm-net.demon.co.uk>
855 * cr16-dis.c (print_arg): Test symtab_size not num_symbols.
857 2012-01-17 Andreas Schwab <schwab@linux-m68k.org>
859 * m68k-opc.c (m68k_opcodes): Fix entries for pmove with BADx/BACx
860 register and move them after pmove with PSR/PCSR register.
862 2012-01-13 H.J. Lu <hongjiu.lu@intel.com>
864 * i386-dis.c (mod_table): Add vmfunc.
866 * i386-gen.c (cpu_flag_init): Add CPU_VMFUNC_FLAGS.
867 (cpu_flags): CpuVMFUNC.
869 * i386-opc.h (CpuVMFUNC): New.
870 (i386_cpu_flags): Add cpuvmfunc.
872 * i386-opc.tbl: Add vmfunc.
873 * i386-init.h: Regenerated.
874 * i386-tbl.h: Likewise.
876 For older changes see ChangeLog-2011
882 version-control: never