1 2016-04-12 Claudiu Zissulescu <claziss@synopsys.com>
3 * arc-dis.c (find_format): Check for extension flags.
4 (print_flags): New function.
5 (print_insn_arc): Update for .extCondCode, .extCoreRegister and
7 * arc-ext.c (arcExtMap_coreRegName): Use
8 LAST_EXTENSION_CORE_REGISTER.
9 (arcExtMap_coreReadWrite): Likewise.
10 (dump_ARC_extmap): Update printing.
11 * arc-opc.c (arc_flag_classes): Add F_CLASS_EXTEND flag.
12 (arc_aux_regs): Add cpu field.
13 * arc-regs.h: Add cpu field, lower case name aux registers.
15 2016-04-12 Claudiu Zissulescu <claziss@synopsys.com>
17 * arc-tbl.h: Add rtsc, sleep with no arguments.
19 2016-04-12 Claudiu Zissulescu <claziss@synopsys.com>
21 * arc-opc.c (flags_none, flags_f, flags_cc, flags_ccf):
23 (arg_none, arg_32bit_rarbrc, arg_32bit_zarbrc, arg_32bit_rbrbrc)
24 (arg_32bit_rarbu6, arg_32bit_zarbu6, arg_32bit_rbrbu6)
25 (arg_32bit_rbrbs12, arg_32bit_ralimmrc, arg_32bit_rarblimm)
26 (arg_32bit_zalimmrc, arg_32bit_zarblimm, arg_32bit_rbrblimm)
27 (arg_32bit_ralimmu6, arg_32bit_zalimmu6, arg_32bit_zalimms12)
28 (arg_32bit_ralimmlimm, arg_32bit_zalimmlimm, arg_32bit_rbrc)
29 (arg_32bit_zarc, arg_32bit_rbu6, arg_32bit_zau6, arg_32bit_rblimm)
30 (arg_32bit_zalimm, arg_32bit_limmrc, arg_32bit_limmu6)
31 (arg_32bit_limms12, arg_32bit_limmlimm): Likewise.
32 (arc_opcode arc_opcodes): Null terminate the array.
33 (arc_num_opcodes): Remove.
34 * arc-ext.h (INSERT_XOP): Define.
35 (extInstruction_t): Likewise.
36 (arcExtMap_instName): Delete.
37 (arcExtMap_insn): New function.
38 (arcExtMap_genOpcode): Likewise.
39 * arc-ext.c (ExtInstruction): Remove.
40 (create_map): Zero initialize instruction fields.
41 (arcExtMap_instName): Remove.
42 (arcExtMap_insn): New function.
43 (dump_ARC_extmap): More info while debuging.
44 (arcExtMap_genOpcode): New function.
45 * arc-dis.c (find_format): New function.
46 (print_insn_arc): Use find_format.
47 (arc_get_disassembler): Enable dump_ARC_extmap only when
50 2016-04-11 Maciej W. Rozycki <macro@imgtec.com>
52 * mips-dis.c (print_mips16_insn_arg): Mask unused extended
55 2016-04-07 Andrew Burgess <andrew.burgess@embecosm.com>
57 * arc-nps400-tbl.h: Add schd, sync, and hwschd instructions.
58 * arc-opc.c (arc_flag_operands): Add new flags.
59 (arc_flag_classes): Add new classes.
61 2016-04-07 Andrew Burgess <andrew.burgess@embecosm.com>
63 * arc-opc.c (arc_opcodes): Extend comment to discus table layout.
65 2016-04-05 Andrew Burgess <andrew.burgess@embecosm.com>
67 * arc-nps400-tbl.h: Add movbi, decode1, fbset, fbclear, encode0,
68 encode1, rflt, crc16, and crc32 instructions.
69 * arc-opc.c (arc_flag_operands): Add F_NPS_R.
70 (arc_flag_classes): Add C_NPS_R.
71 (insert_nps_bitop_size_2b): New function.
72 (extract_nps_bitop_size_2b): Likewise.
73 (insert_nps_bitop_uimm8): Likewise.
74 (extract_nps_bitop_uimm8): Likewise.
75 (arc_operands): Add new operand entries.
77 2016-04-05 Claudiu Zissulescu <claziss@synopsys.com>
79 * arc-regs.h: Add a new subclass field. Add double assist
80 accumulator register values.
81 * arc-tbl.h: Use DPA subclass to mark the double assist
82 instructions. Use DPX/SPX subclas to mark the FPX instructions.
83 * arc-opc.c (RSP): Define instead of SP.
84 (arc_aux_regs): Add the subclass field.
86 2016-04-05 Jiong Wang <jiong.wang@arm.com>
88 * arm-dis.c: Support FP16 vmul, vmla, vmls (by scalar).
90 2016-03-31 Andrew Burgess <andrew.burgess@embecosm.com>
92 * arc-opc.c (arc_operands): Fix operand flags for NPS_R_DST, and
95 2016-03-30 Andrew Burgess <andrew.burgess@embecosm.com>
97 * arc-nps400-tbl.h: Add a header comment, and fix some whitespace
98 issues. No functional changes.
100 2016-03-30 Claudiu Zissulescu <claziss@synopsys.com>
102 * arc-regs.h (IC_RAM_ADDRESS, IC_TAG, IC_WP, IC_DATA, CONTROL0)
103 (AX2, AY2, MX2, MY2, AY0, AY1, DC_RAM_ADDR, DC_TAG, CONTROL1)
104 (RTT): Remove duplicate.
105 (LCDINSTR, LCDDATA, LCDSTAT, CC_*, PCT_COUNT*, PCT_SNAP*)
106 (PCT_CONFIG*): Remove.
107 (D1L, D1H, D2H, D2L): Define.
109 2016-03-29 Claudiu Zissulescu <claziss@synopsys.com>
111 * arc-ext-tbl.h (dsp_fp_i2flt): Fix typo.
113 2016-03-29 Claudiu Zissulescu <claziss@synopsys.com>
115 * arc-tbl.h (invld07): Remove.
116 * arc-ext-tbl.h: New file.
117 * arc-dis.c (FIELDA, FIELDB, FIELDC): Remove.
118 * arc-opc.c (arc_opcodes): Add ext-tbl include.
120 2016-03-24 Jan Kratochvil <jan.kratochvil@redhat.com>
122 Fix -Wstack-usage warnings.
123 * aarch64-dis.c (print_operands): Substitute size.
124 * aarch64-opc.c (print_register_offset_address): Substitute tblen.
126 2016-03-22 Jose E. Marchesi <jose.marchesi@oracle.com>
128 * sparc-opc.c (sparc_opcodes): Reorder entries for `rd' in order
129 to get a proper diagnostic when an invalid ASR register is used.
131 2016-03-22 Nick Clifton <nickc@redhat.com>
133 * configure: Regenerate.
135 2016-03-21 Andrew Burgess <andrew.burgess@embecosm.com>
137 * arc-nps400-tbl.h: New file.
138 * arc-opc.c: Add top level comment.
139 (insert_nps_3bit_dst): New function.
140 (extract_nps_3bit_dst): New function.
141 (insert_nps_3bit_src2): New function.
142 (extract_nps_3bit_src2): New function.
143 (insert_nps_bitop_size): New function.
144 (extract_nps_bitop_size): New function.
145 (arc_flag_operands): Add nps400 entries.
146 (arc_flag_classes): Add nps400 entries.
147 (arc_operands): Add nps400 entries.
148 (arc_opcodes): Add nps400 include.
150 2016-03-21 Andrew Burgess <andrew.burgess@embecosm.com>
152 * arc-opc.c (arc_flag_classes): Convert all flag classes to use
153 the new class enum values.
155 2016-03-21 Andrew Burgess <andrew.burgess@embecosm.com>
157 * arc-dis.c (print_insn_arc): Handle nps400.
159 2016-03-21 Andrew Burgess <andrew.burgess@embecosm.com>
161 * arc-opc.c (BASE): Delete.
163 2016-03-18 Nick Clifton <nickc@redhat.com>
166 * aarch64-tbl.h (aarch64_opcode_table): Fix type of second operand
167 of MOV insn that aliases an ORR insn.
169 2016-03-16 Jiong Wang <jiong.wang@arm.com>
171 * arm-dis.c (neon_opcodes): Support new FP16 instructions.
173 2016-03-07 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
175 * mcore-opc.h: Add const qualifiers.
176 * microblaze-opc.h (struct op_code_struct): Likewise.
177 * sh-opc.h: Likewise.
178 * tic4x-dis.c (tic4x_print_indirect): Likewise.
179 (tic4x_print_op): Likewise.
181 2016-03-02 Alan Modra <amodra@gmail.com>
183 * or1k-desc.h: Regenerate.
184 * fr30-ibld.c: Regenerate.
185 * rl78-decode.c: Regenerate.
187 2016-03-01 Nick Clifton <nickc@redhat.com>
190 * rl78-dis.c (print_insn_rl78_common): Fix typo.
192 2016-02-24 Renlin Li <renlin.li@arm.com>
194 * arm-dis.c (coprocessor_opcodes): Add fp16 instruction entries.
195 (print_insn_coprocessor): Support fp16 instructions.
197 2016-02-24 Renlin Li <renlin.li@arm.com>
199 * arm-dis.c (print_insn_coprocessor): Fix mask for vsel, vmaxnm,
202 2016-02-24 Renlin Li <renlin.li@arm.com>
204 * arm-dis.c (print_insn_coprocessor): Check co-processor number for
205 cpd/cpd2, mcr/mcr2, mrc/mrc2, ldc/ldc2, stc/stc2.
207 2016-02-15 H.J. Lu <hongjiu.lu@intel.com>
209 * i386-dis.c (print_insn): Parenthesize expression to prevent
213 2016-02-10 Claudiu Zissulescu <claziss@synopsys.com>
214 Janek van Oirschot <jvanoirs@synopsys.com>
216 * arc-opc.c (arc_relax_opcodes, arc_num_relax_opcodes): New
219 2016-02-04 Nick Clifton <nickc@redhat.com>
222 * msp430-dis.c (print_insn_msp430): Add a special case for
223 decoding an RRC instruction with the ZC bit set in the extension
226 2016-02-02 Andrew Burgess <andrew.burgess@embecosm.com>
228 * cgen-ibld.in (insert_normal): Rework calculation of shift.
229 * epiphany-ibld.c: Regenerate.
230 * fr30-ibld.c: Regenerate.
231 * frv-ibld.c: Regenerate.
232 * ip2k-ibld.c: Regenerate.
233 * iq2000-ibld.c: Regenerate.
234 * lm32-ibld.c: Regenerate.
235 * m32c-ibld.c: Regenerate.
236 * m32r-ibld.c: Regenerate.
237 * mep-ibld.c: Regenerate.
238 * mt-ibld.c: Regenerate.
239 * or1k-ibld.c: Regenerate.
240 * xc16x-ibld.c: Regenerate.
241 * xstormy16-ibld.c: Regenerate.
243 2016-02-02 Andrew Burgess <andrew.burgess@embecosm.com>
245 * epiphany-dis.c: Regenerated from latest cpu files.
247 2016-02-01 Michael McConville <mmcco@mykolab.com>
249 * cgen-dis.c (count_decodable_bits): Use unsigned value for mask
252 2016-01-25 Renlin Li <renlin.li@arm.com>
254 * arm-dis.c (mapping_symbol_for_insn): New function.
255 (find_ifthen_state): Call mapping_symbol_for_insn().
257 2016-01-20 Matthew Wahab <matthew.wahab@arm.com>
259 * aarch64-opc.c (operand_general_constraint_met_p): Check validity
260 of MSR UAO immediate operand.
262 2016-01-18 Maciej W. Rozycki <macro@imgtec.com>
264 * mips-dis.c (print_insn_micromips): Remove 48-bit microMIPS
267 2016-01-17 Alan Modra <amodra@gmail.com>
269 * configure: Regenerate.
271 2016-01-14 Nick Clifton <nickc@redhat.com>
273 * rl78-decode.opc (rl78_decode_opcode): Add 's' operand to movw
274 instructions that can support stack pointer operations.
275 * rl78-decode.c: Regenerate.
276 * rl78-dis.c: Fix display of stack pointer in MOVW based
279 2016-01-14 Matthew Wahab <matthew.wahab@arm.com>
281 * aarch64-opc.c (aarch64_sys_reg_supported_p): Merge conditionals
282 testing for RAS support. Add checks for erxfr_el1, erxctlr_el1,
283 erxtatus_el1 and erxaddr_el1.
285 2016-01-12 Matthew Wahab <matthew.wahab@arm.com>
287 * arm-dis.c (arm_opcodes): Add "esb".
288 (thumb_opcodes): Likewise.
290 2016-01-11 Peter Bergner <bergner@vnet.ibm.com>
292 * ppc-opc.c <xscmpnedp>: Delete.
293 <xvcmpnedp>: Likewise.
294 <xvcmpnedp.>: Likewise.
295 <xvcmpnesp>: Likewise.
296 <xvcmpnesp.>: Likewise.
298 2016-01-08 Andreas Schwab <schwab@linux-m68k.org>
301 * m68k-opc.c (moveb, movew): For ISA_B/C only allow #,d(An) in
304 2016-01-01 Alan Modra <amodra@gmail.com>
306 Update year range in copyright notice of all files.
308 For older changes see ChangeLog-2015
310 Copyright (C) 2016 Free Software Foundation, Inc.
312 Copying and distribution of this file, with or without modification,
313 are permitted in any medium without royalty provided the copyright
314 notice and this notice are preserved.
320 version-control: never