3 * Magnus Lilja <lilja.magnus@gmail.com>
6 * Maxim Artamonov, <scn1874 at yandex.ru>
8 * (C) Copyright 2006-2008
9 * Stefan Roese, DENX Software Engineering, sr at denx.de.
11 * This program is free software; you can redistribute it and/or
12 * modify it under the terms of the GNU General Public License as
13 * published by the Free Software Foundation; either version 2 of
14 * the License, or (at your option) any later version.
16 * This program is distributed in the hope that it will be useful,
17 * but WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 * GNU General Public License for more details.
21 * You should have received a copy of the GNU General Public License
22 * along with this program; if not, write to the Free Software
23 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
29 #include <asm/arch/imx-regs.h>
33 static struct fsl_nfc_regs *const nfc = (void *)NFC_BASE_ADDR;
35 static void nfc_wait_ready(void)
39 while (!(readw(&nfc->nand_flash_config2) & NFC_INT))
42 /* Reset interrupt flag */
43 tmp = readw(&nfc->nand_flash_config2);
45 writew(tmp, &nfc->nand_flash_config2);
48 void nfc_nand_init(void)
50 #if defined(MXC_NFC_V1_1)
51 int ecc_per_page = CONFIG_SYS_NAND_PAGE_SIZE / 512;
54 writew(CONFIG_SYS_NAND_SPARE_SIZE / 2, &nfc->spare_area_size);
56 /* unlocking RAM Buff */
57 writew(0x2, &nfc->configuration);
59 /* hardware ECC checking and correct */
60 config1 = readw(&nfc->nand_flash_config1) | NFC_ECC_EN | 0x800;
62 * if spare size is larger that 16 bytes per 512 byte hunk
63 * then use 8 symbol correction instead of 4
65 if ((CONFIG_SYS_NAND_SPARE_SIZE / ecc_per_page) > 16)
66 config1 &= ~NFC_4_8N_ECC;
68 config1 |= NFC_4_8N_ECC;
69 writew(config1, &nfc->nand_flash_config1);
70 #elif defined(MXC_NFC_V1)
71 /* unlocking RAM Buff */
72 writew(0x2, &nfc->configuration);
74 /* hardware ECC checking and correct */
75 writew(NFC_ECC_EN, &nfc->nand_flash_config1);
79 static void nfc_nand_command(unsigned short command)
81 writew(command, &nfc->flash_cmd);
82 writew(NFC_CMD, &nfc->nand_flash_config2);
86 static void nfc_nand_page_address(unsigned int page_address)
88 unsigned int page_count;
90 writew(0x00, &nfc->flash_add);
91 writew(NFC_ADDR, &nfc->nand_flash_config2);
94 /* code only for large page flash */
95 if (CONFIG_SYS_NAND_PAGE_SIZE > 512) {
96 writew(0x00, &nfc->flash_add);
97 writew(NFC_ADDR, &nfc->nand_flash_config2);
101 page_count = CONFIG_SYS_NAND_SIZE / CONFIG_SYS_NAND_PAGE_SIZE;
103 if (page_address <= page_count) {
104 page_count--; /* transform 0x01000000 to 0x00ffffff */
106 writew(page_address & 0xff, &nfc->flash_add);
107 writew(NFC_ADDR, &nfc->nand_flash_config2);
109 page_address = page_address >> 8;
110 page_count = page_count >> 8;
111 } while (page_count);
114 writew(0x00, &nfc->flash_add);
115 writew(NFC_ADDR, &nfc->nand_flash_config2);
119 static void nfc_nand_data_output(void)
121 int config1 = readw(&nfc->nand_flash_config1);
122 #ifdef NAND_MXC_2K_MULTI_CYCLE
126 config1 |= NFC_ECC_EN | NFC_INT_MSK;
127 writew(config1, &nfc->nand_flash_config1);
128 writew(0, &nfc->buffer_address);
129 writew(NFC_OUTPUT, &nfc->nand_flash_config2);
131 #ifdef NAND_MXC_2K_MULTI_CYCLE
133 * This NAND controller requires multiple input commands
134 * for pages larger than 512 bytes.
136 for (i = 1; i < (CONFIG_SYS_NAND_PAGE_SIZE / 512); i++) {
137 config1 = readw(&nfc->nand_flash_config1);
138 config1 |= NFC_ECC_EN | NFC_INT_MSK;
139 writew(config1, &nfc->nand_flash_config1);
140 writew(i, &nfc->buffer_address);
141 writew(NFC_OUTPUT, &nfc->nand_flash_config2);
147 static int nfc_nand_check_ecc(void)
149 return readw(&nfc->ecc_status_result);
152 static int nfc_read_page(unsigned int page_address, unsigned char *buf)
158 writew(0, &nfc->buffer_address); /* read in first 0 buffer */
159 nfc_nand_command(NAND_CMD_READ0);
160 nfc_nand_page_address(page_address);
162 if (CONFIG_SYS_NAND_PAGE_SIZE > 512)
163 nfc_nand_command(NAND_CMD_READSTART);
165 nfc_nand_data_output(); /* fill the main buffer 0 */
167 if (nfc_nand_check_ecc())
170 src = &nfc->main_area[0][0];
173 /* main copy loop from NAND-buffer to SDRAM memory */
174 for (i = 0; i < (CONFIG_SYS_NAND_PAGE_SIZE / 4); i++) {
175 writel(readl(src), dst);
183 static int is_badblock(int pagenumber)
185 int page = pagenumber;
189 /* Check the first two pages for bad block markers */
190 for (page = pagenumber; page < pagenumber + 2; page++) {
191 writew(0, &nfc->buffer_address); /* read in first 0 buffer */
192 nfc_nand_command(NAND_CMD_READ0);
193 nfc_nand_page_address(page);
195 if (CONFIG_SYS_NAND_PAGE_SIZE > 512)
196 nfc_nand_command(NAND_CMD_READSTART);
198 nfc_nand_data_output(); /* fill the main buffer 0 */
200 src = &nfc->spare_area[0][0];
203 * IMPORTANT NOTE: The nand flash controller uses a non-
204 * standard layout for large page devices. This can
205 * affect the position of the bad block marker.
207 /* Get the bad block marker */
208 badblock = readl(&src[CONFIG_SYS_NAND_BAD_BLOCK_POS / 4]);
209 badblock >>= 8 * (CONFIG_SYS_NAND_BAD_BLOCK_POS % 4);
212 /* bad block marker verify */
213 if (badblock != 0xff)
214 return 1; /* potential bad block */
220 static int nand_load(unsigned int from, unsigned int size, unsigned char *buf)
224 unsigned int maxpages = CONFIG_SYS_NAND_SIZE /
225 CONFIG_SYS_NAND_PAGE_SIZE;
229 /* Convert to page number */
230 page = from / CONFIG_SYS_NAND_PAGE_SIZE;
233 while (i < (size / CONFIG_SYS_NAND_PAGE_SIZE)) {
234 if (nfc_read_page(page, buf) < 0)
239 buf = buf + CONFIG_SYS_NAND_PAGE_SIZE;
242 * Check if we have crossed a block boundary, and if so
243 * check for bad block.
245 if (!(page % CONFIG_SYS_NAND_PAGE_COUNT)) {
247 * Yes, new block. See if this block is good. If not,
248 * loop until we find a good block.
250 while (is_badblock(page)) {
251 page = page + CONFIG_SYS_NAND_PAGE_COUNT;
252 /* Check i we've reached the end of flash. */
253 if (page >= maxpages)
262 #if defined(CONFIG_ARM)
263 void board_init_f (ulong bootflag)
265 relocate_code (CONFIG_SYS_TEXT_BASE - TOTAL_MALLOC_LEN, NULL,
266 CONFIG_SYS_TEXT_BASE);
271 * The main entry for NAND booting. It's necessary that SDRAM is already
272 * configured and available since this code loads the main U-Boot image
273 * from NAND into SDRAM and starts it from there.
277 __attribute__((noreturn)) void (*uboot)(void);
280 * CONFIG_SYS_NAND_U_BOOT_OFFS and CONFIG_SYS_NAND_U_BOOT_SIZE must
281 * be aligned to full pages
283 if (!nand_load(CONFIG_SYS_NAND_U_BOOT_OFFS, CONFIG_SYS_NAND_U_BOOT_SIZE,
284 (uchar *)CONFIG_SYS_NAND_U_BOOT_DST)) {
285 /* Copy from NAND successful, start U-boot */
286 uboot = (void *)CONFIG_SYS_NAND_U_BOOT_START;
289 /* Unrecoverable error when copying from NAND */
295 * Called in case of an exception.