3 * Magnus Lilja <lilja.magnus@gmail.com>
6 * Maxim Artamonov, <scn1874 at yandex.ru>
8 * (C) Copyright 2006-2008
9 * Stefan Roese, DENX Software Engineering, sr at denx.de.
11 * This program is free software; you can redistribute it and/or
12 * modify it under the terms of the GNU General Public License as
13 * published by the Free Software Foundation; either version 2 of
14 * the License, or (at your option) any later version.
16 * This program is distributed in the hope that it will be useful,
17 * but WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 * GNU General Public License for more details.
21 * You should have received a copy of the GNU General Public License
22 * along with this program; if not, write to the Free Software
23 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
30 #include <asm/arch/mx31-regs.h>
32 #include <asm/arch/imx-regs.h>
37 static struct fsl_nfc_regs *const nfc = (void *)NFC_BASE_ADDR;
39 static void nfc_wait_ready(void)
43 while (!(readw(&nfc->nand_flash_config2) & NFC_INT))
46 /* Reset interrupt flag */
47 tmp = readw(&nfc->nand_flash_config2);
49 writew(tmp, &nfc->nand_flash_config2);
52 void nfc_nand_init(void)
54 #if defined(MXC_NFC_V1_1)
55 int ecc_per_page = CONFIG_SYS_NAND_PAGE_SIZE / 512;
58 writew(CONFIG_SYS_NAND_SPARE_SIZE / 2, &nfc->spare_area_size);
60 /* unlocking RAM Buff */
61 writew(0x2, &nfc->configuration);
63 /* hardware ECC checking and correct */
64 config1 = readw(&nfc->nand_flash_config1) | NFC_ECC_EN | 0x800;
66 * if spare size is larger that 16 bytes per 512 byte hunk
67 * then use 8 symbol correction instead of 4
69 if ((CONFIG_SYS_NAND_SPARE_SIZE / ecc_per_page) > 16)
70 config1 &= ~NFC_4_8N_ECC;
72 config1 |= NFC_4_8N_ECC;
73 writew(config1, &nfc->nand_flash_config1);
74 #elif defined(MXC_NFC_V1)
75 /* unlocking RAM Buff */
76 writew(0x2, &nfc->configuration);
78 /* hardware ECC checking and correct */
79 writew(NFC_ECC_EN, &nfc->nand_flash_config1);
83 static void nfc_nand_command(unsigned short command)
85 writew(command, &nfc->flash_cmd);
86 writew(NFC_CMD, &nfc->nand_flash_config2);
90 static void nfc_nand_page_address(unsigned int page_address)
92 unsigned int page_count;
94 writew(0x00, &nfc->flash_add);
95 writew(NFC_ADDR, &nfc->nand_flash_config2);
98 /* code only for large page flash */
99 if (CONFIG_SYS_NAND_PAGE_SIZE > 512) {
100 writew(0x00, &nfc->flash_add);
101 writew(NFC_ADDR, &nfc->nand_flash_config2);
105 page_count = CONFIG_SYS_NAND_SIZE / CONFIG_SYS_NAND_PAGE_SIZE;
107 if (page_address <= page_count) {
108 page_count--; /* transform 0x01000000 to 0x00ffffff */
110 writew(page_address & 0xff, &nfc->flash_add);
111 writew(NFC_ADDR, &nfc->nand_flash_config2);
113 page_address = page_address >> 8;
114 page_count = page_count >> 8;
115 } while (page_count);
118 writew(0x00, &nfc->flash_add);
119 writew(NFC_ADDR, &nfc->nand_flash_config2);
123 static void nfc_nand_data_output(void)
125 int config1 = readw(&nfc->nand_flash_config1);
126 #ifdef NAND_MXC_2K_MULTI_CYCLE
130 config1 |= NFC_ECC_EN | NFC_INT_MSK;
131 writew(config1, &nfc->nand_flash_config1);
132 writew(0, &nfc->buffer_address);
133 writew(NFC_OUTPUT, &nfc->nand_flash_config2);
135 #ifdef NAND_MXC_2K_MULTI_CYCLE
137 * This NAND controller requires multiple input commands
138 * for pages larger than 512 bytes.
140 for (i = 1; i < (CONFIG_SYS_NAND_PAGE_SIZE / 512); i++) {
141 config1 = readw(&nfc->nand_flash_config1);
142 config1 |= NFC_ECC_EN | NFC_INT_MSK;
143 writew(config1, &nfc->nand_flash_config1);
144 writew(i, &nfc->buffer_address);
145 writew(NFC_OUTPUT, &nfc->nand_flash_config2);
151 static int nfc_nand_check_ecc(void)
153 return readw(&nfc->ecc_status_result);
156 static int nfc_read_page(unsigned int page_address, unsigned char *buf)
162 writew(0, &nfc->buffer_address); /* read in first 0 buffer */
163 nfc_nand_command(NAND_CMD_READ0);
164 nfc_nand_page_address(page_address);
166 if (CONFIG_SYS_NAND_PAGE_SIZE > 512)
167 nfc_nand_command(NAND_CMD_READSTART);
169 nfc_nand_data_output(); /* fill the main buffer 0 */
171 if (nfc_nand_check_ecc())
174 src = &nfc->main_area[0][0];
177 /* main copy loop from NAND-buffer to SDRAM memory */
178 for (i = 0; i < (CONFIG_SYS_NAND_PAGE_SIZE / 4); i++) {
179 writel(readl(src), dst);
187 static int is_badblock(int pagenumber)
189 int page = pagenumber;
193 /* Check the first two pages for bad block markers */
194 for (page = pagenumber; page < pagenumber + 2; page++) {
195 writew(0, &nfc->buffer_address); /* read in first 0 buffer */
196 nfc_nand_command(NAND_CMD_READ0);
197 nfc_nand_page_address(page);
199 if (CONFIG_SYS_NAND_PAGE_SIZE > 512)
200 nfc_nand_command(NAND_CMD_READSTART);
202 nfc_nand_data_output(); /* fill the main buffer 0 */
204 src = &nfc->spare_area[0][0];
207 * IMPORTANT NOTE: The nand flash controller uses a non-
208 * standard layout for large page devices. This can
209 * affect the position of the bad block marker.
211 /* Get the bad block marker */
212 badblock = readl(&src[CONFIG_SYS_NAND_BAD_BLOCK_POS / 4]);
213 badblock >>= 8 * (CONFIG_SYS_NAND_BAD_BLOCK_POS % 4);
216 /* bad block marker verify */
217 if (badblock != 0xff)
218 return 1; /* potential bad block */
224 static int nand_load(unsigned int from, unsigned int size, unsigned char *buf)
228 unsigned int maxpages = CONFIG_SYS_NAND_SIZE /
229 CONFIG_SYS_NAND_PAGE_SIZE;
233 /* Convert to page number */
234 page = from / CONFIG_SYS_NAND_PAGE_SIZE;
237 while (i < (size / CONFIG_SYS_NAND_PAGE_SIZE)) {
238 if (nfc_read_page(page, buf) < 0)
243 buf = buf + CONFIG_SYS_NAND_PAGE_SIZE;
246 * Check if we have crossed a block boundary, and if so
247 * check for bad block.
249 if (!(page % CONFIG_SYS_NAND_PAGE_COUNT)) {
251 * Yes, new block. See if this block is good. If not,
252 * loop until we find a good block.
254 while (is_badblock(page)) {
255 page = page + CONFIG_SYS_NAND_PAGE_COUNT;
256 /* Check i we've reached the end of flash. */
257 if (page >= maxpages)
266 #if defined(CONFIG_ARM) && !defined(CONFIG_SYS_ARM_WITHOUT_RELOC)
267 void board_init_f (ulong bootflag)
269 relocate_code (CONFIG_SYS_TEXT_BASE - TOTAL_MALLOC_LEN, NULL,
270 CONFIG_SYS_TEXT_BASE);
275 * The main entry for NAND booting. It's necessary that SDRAM is already
276 * configured and available since this code loads the main U-Boot image
277 * from NAND into SDRAM and starts it from there.
281 __attribute__((noreturn)) void (*uboot)(void);
284 * CONFIG_SYS_NAND_U_BOOT_OFFS and CONFIG_SYS_NAND_U_BOOT_SIZE must
285 * be aligned to full pages
287 if (!nand_load(CONFIG_SYS_NAND_U_BOOT_OFFS, CONFIG_SYS_NAND_U_BOOT_SIZE,
288 (uchar *)CONFIG_SYS_NAND_U_BOOT_DST)) {
289 /* Copy from NAND successful, start U-boot */
290 uboot = (void *)CONFIG_SYS_NAND_U_BOOT_START;
293 /* Unrecoverable error when copying from NAND */
299 * Called in case of an exception.