nand_spl/nand_boot_fsl_nfc.c

   1 /*
   2  * (C) Copyright 2009
   3  * Magnus Lilja <lilja.magnus@gmail.com>
   4  *
   5  * (C) Copyright 2008
   6  * Maxim Artamonov, <scn1874 at yandex.ru>
   7  *
   8  * (C) Copyright 2006-2008
   9  * Stefan Roese, DENX Software Engineering, sr at denx.de.
  10  *
  11  * This program is free software; you can redistribute it and/or
  12  * modify it under the terms of the GNU General Public License as
  13  * published by the Free Software Foundation; either version 2 of
  14  * the License, or (at your option) any later version.
  15  *
  16  * This program is distributed in the hope that it will be useful,
  17  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  18  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  19  * GNU General Public License for more details.
  20  *
  21  * You should have received a copy of the GNU General Public License
  22  * along with this program; if not, write to the Free Software
  23  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  24  * MA 02111-1307 USA
  25  */
  26
  27 #include <common.h>
  28 #include <nand.h>
  29 #include <asm/arch/imx-regs.h>
  30 #include <asm/io.h>
  31 #include <fsl_nfc.h>
  32
  33 static struct fsl_nfc_regs *const nfc = (void *)NFC_BASE_ADDR;
  34
  35 static void nfc_wait_ready(void)
  36 {
  37         uint32_t tmp;
  38
  39         while (!(readw(&nfc->config2) & NFC_INT))
  40                 ;
  41
  42         /* Reset interrupt flag */
  43         tmp = readw(&nfc->config2);
  44         tmp &= ~NFC_INT;
  45         writew(tmp, &nfc->config2);
  46 }
  47
  48 static void nfc_nand_init(void)
  49 {
  50 #if defined(MXC_NFC_V1_1)
  51         int ecc_per_page = CONFIG_SYS_NAND_PAGE_SIZE / 512;
  52         int config1;
  53
  54         writew(CONFIG_SYS_NAND_SPARE_SIZE / 2, &nfc->spare_area_size);
  55
  56         /* unlocking RAM Buff */
  57         writew(0x2, &nfc->config);
  58
  59         /* hardware ECC checking and correct */
  60         config1 = readw(&nfc->config1) | NFC_ECC_EN | NFC_INT_MSK | NFC_FP_INT;
  61         /*
  62          * if spare size is larger that 16 bytes per 512 byte hunk
  63          * then use 8 symbol correction instead of 4
  64          */
  65         if (CONFIG_SYS_NAND_SPARE_SIZE / ecc_per_page > 16)
  66                 config1 &= ~NFC_4_8N_ECC;
  67         else
  68                 config1 |= NFC_4_8N_ECC;
  69         writew(config1, &nfc->config1);
  70 #elif defined(MXC_NFC_V1)
  71         /* unlocking RAM Buff */
  72         writew(0x2, &nfc->config);
  73
  74         /* hardware ECC checking and correct */
  75         writew(NFC_ECC_EN | NFC_INT_MSK, &nfc->config1);
  76 #endif
  77 }
  78
  79 static void nfc_nand_command(unsigned short command)
  80 {
  81         writew(command, &nfc->flash_cmd);
  82         writew(NFC_CMD, &nfc->config2);
  83         nfc_wait_ready();
  84 }
  85
  86 static void nfc_nand_address(unsigned short address)
  87 {
  88         writew(address, &nfc->flash_addr);
  89         writew(NFC_ADDR, &nfc->config2);
  90         nfc_wait_ready();
  91 }
  92
  93 static void nfc_nand_page_address(unsigned int page_address)
  94 {
  95         unsigned int page_count;
  96
  97         nfc_nand_address(0x00);
  98
  99         /* code only for large page flash */
 100         if (CONFIG_SYS_NAND_PAGE_SIZE > 512)
 101                 nfc_nand_address(0x00);
 102
 103         page_count = CONFIG_SYS_NAND_SIZE / CONFIG_SYS_NAND_PAGE_SIZE;
 104
 105         if (page_address <= page_count) {
 106                 page_count--; /* transform 0x01000000 to 0x00ffffff */
 107                 do {
 108                         nfc_nand_address(page_address & 0xff);
 109                         page_address = page_address >> 8;
 110                         page_count = page_count >> 8;
 111                 } while (page_count);
 112         }
 113
 114         nfc_nand_address(0x00);
 115 }
 116
 117 static void nfc_nand_data_output(void)
 118 {
 119 #ifdef NAND_MXC_2K_MULTI_CYCLE
 120         int i;
 121 #endif
 122
 123         writew(0, &nfc->buf_addr);
 124         writew(NFC_OUTPUT, &nfc->config2);
 125         nfc_wait_ready();
 126 #ifdef NAND_MXC_2K_MULTI_CYCLE
 127         /*
 128          * This NAND controller requires multiple input commands
 129          * for pages larger than 512 bytes.
 130          */
 131         for (i = 1; i < CONFIG_SYS_NAND_PAGE_SIZE / 512; i++) {
 132                 writew(i, &nfc->buf_addr);
 133                 writew(NFC_OUTPUT, &nfc->config2);
 134                 nfc_wait_ready();
 135         }
 136 #endif
 137 }
 138
 139 static int nfc_nand_check_ecc(void)
 140 {
 141         return readw(&nfc->ecc_status_result);
 142 }
 143
 144 static void nfc_nand_read_page(unsigned int page_address)
 145 {
 146         writew(0, &nfc->buf_addr); /* read in first 0 buffer */
 147         nfc_nand_command(NAND_CMD_READ0);
 148         nfc_nand_page_address(page_address);
 149
 150         if (CONFIG_SYS_NAND_PAGE_SIZE > 512)
 151                 nfc_nand_command(NAND_CMD_READSTART);
 152
 153         nfc_nand_data_output(); /* fill the main buffer 0 */
 154 }
 155
 156 static int nfc_read_page(unsigned int page_address, unsigned char *buf)
 157 {
 158         int i;
 159         u32 *src;
 160         u32 *dst;
 161
 162         nfc_nand_read_page(page_address);
 163
 164         if (nfc_nand_check_ecc())
 165                 return -1;
 166
 167         src = (u32 *)&nfc->main_area[0][0];
 168         dst = (u32 *)buf;
 169
 170         /* main copy loop from NAND-buffer to SDRAM memory */
 171         for (i = 0; i < CONFIG_SYS_NAND_PAGE_SIZE / 4; i++) {
 172                 writel(readl(src), dst);
 173                 src++;
 174                 dst++;
 175         }
 176
 177         return 0;
 178 }
 179
 180 static int is_badblock(int pagenumber)
 181 {
 182         int page = pagenumber;
 183         u32 badblock;
 184         u32 *src;
 185
 186         /* Check the first two pages for bad block markers */
 187         for (page = pagenumber; page < pagenumber + 2; page++) {
 188                 nfc_nand_read_page(page);
 189
 190                 src = (u32 *)&nfc->spare_area[0][0];
 191
 192                 /*
 193                  * IMPORTANT NOTE: The nand flash controller uses a non-
 194                  * standard layout for large page devices. This can
 195                  * affect the position of the bad block marker.
 196                  */
 197                 /* Get the bad block marker */
 198                 badblock = readl(&src[CONFIG_SYS_NAND_BAD_BLOCK_POS / 4]);
 199                 badblock >>= 8 * (CONFIG_SYS_NAND_BAD_BLOCK_POS % 4);
 200                 badblock &= 0xff;
 201
 202                 /* bad block marker verify */
 203                 if (badblock != 0xff)
 204                         return 1; /* potential bad block */
 205         }
 206
 207         return 0;
 208 }
 209
 210 static int nand_load(unsigned int from, unsigned int size, unsigned char *buf)
 211 {
 212         int i;
 213         unsigned int page;
 214         unsigned int maxpages = CONFIG_SYS_NAND_SIZE /
 215                                 CONFIG_SYS_NAND_PAGE_SIZE;
 216
 217         nfc_nand_init();
 218
 219         /* Convert to page number */
 220         page = from / CONFIG_SYS_NAND_PAGE_SIZE;
 221         i = 0;
 222
 223         while (i < size / CONFIG_SYS_NAND_PAGE_SIZE) {
 224                 if (nfc_read_page(page, buf) < 0)
 225                         return -1;
 226
 227                 page++;
 228                 i++;
 229                 buf = buf + CONFIG_SYS_NAND_PAGE_SIZE;
 230
 231                 /*
 232                  * Check if we have crossed a block boundary, and if so
 233                  * check for bad block.
 234                  */
 235                 if (!(page % CONFIG_SYS_NAND_PAGE_COUNT)) {
 236                         /*
 237                          * Yes, new block. See if this block is good. If not,
 238                          * loop until we find a good block.
 239                          */
 240                         while (is_badblock(page)) {
 241                                 page = page + CONFIG_SYS_NAND_PAGE_COUNT;
 242                                 /* Check i we've reached the end of flash. */
 243                                 if (page >= maxpages)
 244                                         return -1;
 245                         }
 246                 }
 247         }
 248
 249         return 0;
 250 }
 251
 252 #if defined(CONFIG_ARM)
 253 void board_init_f (ulong bootflag)
 254 {
 255         relocate_code (CONFIG_SYS_TEXT_BASE - TOTAL_MALLOC_LEN, NULL,
 256                        CONFIG_SYS_TEXT_BASE);
 257 }
 258 #endif
 259
 260 /*
 261  * The main entry for NAND booting. It's necessary that SDRAM is already
 262  * configured and available since this code loads the main U-Boot image
 263  * from NAND into SDRAM and starts it from there.
 264  */
 265 void nand_boot(void)
 266 {
 267         __attribute__((noreturn)) void (*uboot)(void);
 268
 269         /*
 270          * CONFIG_SYS_NAND_U_BOOT_OFFS and CONFIG_SYS_NAND_U_BOOT_SIZE must
 271          * be aligned to full pages
 272          */
 273         if (!nand_load(CONFIG_SYS_NAND_U_BOOT_OFFS, CONFIG_SYS_NAND_U_BOOT_SIZE,
 274                        (uchar *)CONFIG_SYS_NAND_U_BOOT_DST)) {
 275                 /* Copy from NAND successful, start U-boot */
 276                 uboot = (void *)CONFIG_SYS_NAND_U_BOOT_START;
 277                 uboot();
 278         } else {
 279                 /* Unrecoverable error when copying from NAND */
 280                 hang();
 281         }
 282 }
 283
 284 /*
 285  * Called in case of an exception.
 286  */
 287 void hang(void)
 288 {
 289         /* Loop forever */
 290         while (1) ;
 291 }