2 * (C) Copyright 2006-2008
3 * Stefan Roese, DENX Software Engineering, sr@denx.de.
5 * This program is free software; you can redistribute it and/or
6 * modify it under the terms of the GNU General Public License as
7 * published by the Free Software Foundation; either version 2 of
8 * the License, or (at your option) any later version.
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
25 #define CONFIG_SYS_NAND_READ_DELAY \
26 { volatile int dummy; int i; for (i=0; i<10000; i++) dummy = i; }
28 static int nand_ecc_pos[] = CONFIG_SYS_NAND_ECCPOS;
30 #if (CONFIG_SYS_NAND_PAGE_SIZE <= 512)
32 * NAND command for small page NAND devices (512)
34 static int nand_command(struct mtd_info *mtd, int block, int page, int offs, u8 cmd)
36 struct nand_chip *this = mtd->priv;
37 int page_addr = page + block * CONFIG_SYS_NAND_PAGE_COUNT;
40 while (!this->dev_ready(mtd))
43 CONFIG_SYS_NAND_READ_DELAY;
45 /* Begin command latch cycle */
46 this->cmd_ctrl(mtd, cmd, NAND_CTRL_CLE | NAND_CTRL_CHANGE);
47 /* Set ALE and clear CLE to start address cycle */
49 this->cmd_ctrl(mtd, offs, NAND_CTRL_ALE | NAND_CTRL_CHANGE);
50 this->cmd_ctrl(mtd, page_addr & 0xff, NAND_CTRL_ALE); /* A[16:9] */
51 this->cmd_ctrl(mtd, (page_addr >> 8) & 0xff,
52 NAND_CTRL_ALE); /* A[24:17] */
53 #ifdef CONFIG_SYS_NAND_4_ADDR_CYCLE
54 /* One more address cycle for devices > 32MiB */
55 this->cmd_ctrl(mtd, (page_addr >> 16) & 0x0f,
56 NAND_CTRL_ALE); /* A[28:25] */
58 /* Latch in address */
59 this->cmd_ctrl(mtd, NAND_CMD_NONE, NAND_NCE | NAND_CTRL_CHANGE);
62 * Wait a while for the data to be ready
65 while (!this->dev_ready(mtd))
68 CONFIG_SYS_NAND_READ_DELAY;
74 * NAND command for large page NAND devices (2k)
76 static int nand_command(struct mtd_info *mtd, int block, int page, int offs, u8 cmd)
78 struct nand_chip *this = mtd->priv;
79 int page_addr = page + block * CONFIG_SYS_NAND_PAGE_COUNT;
80 void (*hwctrl)(struct mtd_info *mtd, int cmd,
81 unsigned int ctrl) = this->cmd_ctrl;
84 while (!this->dev_ready(mtd))
87 CONFIG_SYS_NAND_READ_DELAY;
89 /* Emulate NAND_CMD_READOOB */
90 if (cmd == NAND_CMD_READOOB) {
91 offs += CONFIG_SYS_NAND_PAGE_SIZE;
95 /* Shift the offset from byte addressing to word addressing. */
96 if (this->options & NAND_BUSWIDTH_16)
99 /* Begin command latch cycle */
100 hwctrl(mtd, cmd, NAND_CTRL_CLE | NAND_CTRL_CHANGE);
101 /* Set ALE and clear CLE to start address cycle */
103 hwctrl(mtd, offs & 0xff,
104 NAND_CTRL_ALE | NAND_CTRL_CHANGE); /* A[7:0] */
105 hwctrl(mtd, (offs >> 8) & 0xff, NAND_CTRL_ALE); /* A[11:9] */
107 hwctrl(mtd, (page_addr & 0xff), NAND_CTRL_ALE); /* A[19:12] */
108 hwctrl(mtd, ((page_addr >> 8) & 0xff),
109 NAND_CTRL_ALE); /* A[27:20] */
110 #ifdef CONFIG_SYS_NAND_5_ADDR_CYCLE
111 /* One more address cycle for devices > 128MiB */
112 hwctrl(mtd, (page_addr >> 16) & 0x0f,
113 NAND_CTRL_ALE); /* A[31:28] */
115 /* Latch in address */
116 hwctrl(mtd, NAND_CMD_READSTART,
117 NAND_CTRL_CLE | NAND_CTRL_CHANGE);
118 hwctrl(mtd, NAND_CMD_NONE, NAND_NCE | NAND_CTRL_CHANGE);
121 * Wait a while for the data to be ready
124 while (!this->dev_ready(mtd))
127 CONFIG_SYS_NAND_READ_DELAY;
133 static int nand_is_bad_block(struct mtd_info *mtd, int block)
135 struct nand_chip *this = mtd->priv;
137 nand_command(mtd, block, 0, CONFIG_SYS_NAND_BAD_BLOCK_POS, NAND_CMD_READOOB);
142 if (readb(this->IO_ADDR_R) != 0xff)
148 static int nand_read_page(struct mtd_info *mtd, int block, int page, uchar *dst)
150 struct nand_chip *this = mtd->priv;
155 int eccsize = CONFIG_SYS_NAND_ECCSIZE;
156 int eccbytes = CONFIG_SYS_NAND_ECCBYTES;
157 int eccsteps = CONFIG_SYS_NAND_ECCSTEPS;
161 nand_command(mtd, block, page, 0, NAND_CMD_READ0);
163 /* No malloc available for now, just use some temporary locations
166 ecc_calc = (u_char *)(CONFIG_SYS_SDRAM_BASE + 0x10000);
167 ecc_code = ecc_calc + 0x100;
168 oob_data = ecc_calc + 0x200;
170 for (i = 0; eccsteps; eccsteps--, i += eccbytes, p += eccsize) {
171 this->ecc.hwctl(mtd, NAND_ECC_READ);
172 this->read_buf(mtd, p, eccsize);
173 this->ecc.calculate(mtd, p, &ecc_calc[i]);
175 this->read_buf(mtd, oob_data, CONFIG_SYS_NAND_OOBSIZE);
177 /* Pick the ECC bytes out of the oob data */
178 for (i = 0; i < CONFIG_SYS_NAND_ECCTOTAL; i++)
179 ecc_code[i] = oob_data[nand_ecc_pos[i]];
181 eccsteps = CONFIG_SYS_NAND_ECCSTEPS;
184 for (i = 0 ; eccsteps; eccsteps--, i += eccbytes, p += eccsize) {
185 /* No chance to do something with the possible error message
186 * from correct_data(). We just hope that all possible errors
187 * are corrected by this routine.
189 stat = this->ecc.correct(mtd, p, &ecc_code[i], &ecc_calc[i]);
195 static int nand_load(struct mtd_info *mtd, unsigned int offs,
196 unsigned int uboot_size, uchar *dst)
198 unsigned int block, lastblock;
202 * offs has to be aligned to a page address!
204 block = offs / CONFIG_SYS_NAND_BLOCK_SIZE;
205 lastblock = (offs + uboot_size - 1) / CONFIG_SYS_NAND_BLOCK_SIZE;
206 page = (offs % CONFIG_SYS_NAND_BLOCK_SIZE) / CONFIG_SYS_NAND_PAGE_SIZE;
208 while (block <= lastblock) {
209 if (!nand_is_bad_block(mtd, block)) {
213 while (page < CONFIG_SYS_NAND_PAGE_COUNT) {
214 nand_read_page(mtd, block, page, dst);
215 dst += CONFIG_SYS_NAND_PAGE_SIZE;
231 * The main entry for NAND booting. It's necessary that SDRAM is already
232 * configured and available since this code loads the main U-Boot image
233 * from NAND into SDRAM and starts it from there.
237 struct nand_chip nand_chip;
238 nand_info_t nand_info;
240 __attribute__((noreturn)) void (*uboot)(void);
243 * Init board specific nand support
245 nand_chip.select_chip = NULL;
246 nand_info.priv = &nand_chip;
247 nand_chip.IO_ADDR_R = nand_chip.IO_ADDR_W = (void __iomem *)CONFIG_SYS_NAND_BASE;
248 nand_chip.dev_ready = NULL; /* preset to NULL */
249 nand_chip.options = 0;
250 board_nand_init(&nand_chip);
252 if (nand_chip.select_chip)
253 nand_chip.select_chip(&nand_info, 0);
256 * Load U-Boot image from NAND into RAM
258 ret = nand_load(&nand_info, CONFIG_SYS_NAND_U_BOOT_OFFS, CONFIG_SYS_NAND_U_BOOT_SIZE,
259 (uchar *)CONFIG_SYS_NAND_U_BOOT_DST);
261 #ifdef CONFIG_NAND_ENV_DST
262 nand_load(&nand_info, CONFIG_ENV_OFFSET, CONFIG_ENV_SIZE,
263 (uchar *)CONFIG_NAND_ENV_DST);
265 #ifdef CONFIG_ENV_OFFSET_REDUND
266 nand_load(&nand_info, CONFIG_ENV_OFFSET_REDUND, CONFIG_ENV_SIZE,
267 (uchar *)CONFIG_NAND_ENV_DST + CONFIG_ENV_SIZE);
271 if (nand_chip.select_chip)
272 nand_chip.select_chip(&nand_info, -1);
275 * Jump to U-Boot image
277 uboot = (void *)CONFIG_SYS_NAND_U_BOOT_START;