2 * armboot - Startup Code for ARM926EJS CPU-core
4 * Copyright (c) 2003 Texas Instruments
6 * ----- Adapted for OMAP1610 OMAP730 from ARM925t code ------
8 * Copyright (c) 2001 Marius Gröger <mag@sysgo.de>
9 * Copyright (c) 2002 Alex Züpke <azu@sysgo.de>
10 * Copyright (c) 2002 Gary Jennejohn <garyj@denx.de>
11 * Copyright (c) 2003 Richard Woodruff <r-woodruff2@ti.com>
12 * Copyright (c) 2003 Kshitij <kshitij@ti.com>
14 * See file CREDITS for list of people who contributed to this
17 * This program is free software; you can redistribute it and/or
18 * modify it under the terms of the GNU General Public License as
19 * published by the Free Software Foundation; either version 2 of
20 * the License, or (at your option) any later version.
22 * This program is distributed in the hope that it will be useful,
23 * but WITHOUT ANY WARRANTY; without even the implied warranty of
24 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
25 * GNU General Public License for more details.
27 * You should have received a copy of the GNU General Public License
28 * along with this program; if not, write to the Free Software
29 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
38 #if defined CONFIG_SC8825 || defined CONFIG_SC8830 || defined(CONFIG_SC9630)
39 #define FDL2_STACK 0x81000000
41 #ifdef PLATFORM_SC8800G
42 #define BIGEND_PROT_REG 0x20900290
43 #define AHB_CTRL5_REG 0x20900230
44 #define FDL2_STACK 0x31000000
47 #define BIGEND_PROT_REG 0x20900290
48 #define AHB_CTRL5_REG 0x20900230
49 #define FDL2_STACK 0x1000000
53 *************************************************************************
55 * Jump vector table as in table 3.1 in [1]
57 *************************************************************************
65 *************************************************************************
67 * Startup Code (reset vector)
69 * do important init only if we don't start from memory!
70 * setup Memory and board specific bits prior to relocation.
71 * relocate armboot to ram
74 *************************************************************************
78 * These are defined in the board-specific linker script.
88 .global _armboot_start
93 * the actual reset code
98 * set the cpu to SVC32 mode
102 time: subs r0,r0,#0x1
112 #ifdef CHIP_ENDIAN_BIG
118 BIC r0,r0,#1 /*disable MMU*/
120 BIC r0,r0,r1 /*disable cache*/
121 /*LDR r1,=0x1000*/ /* use mmu.c and mmu_asm.S, so richard feng remove it */
122 /*ORR r0,r0,r1*/ /* use mmu.c and mmu_asm.S, so richard feng remove it */
126 /*set endian regs of sc8800g*/
127 #if defined(CHIP_ENDIAN_BIG) && (defined(PLATFORM_SC8800G) || defined(CONFIG_SC8810))
128 LDR R0, =BIGEND_PROT_REG
133 LDR R2, =AHB_CTRL5_REG
142 #if defined(CONFIG_SC8830) || defined(CONFIG_SC9630)
144 * Enable coherent requested to the processor.
146 mrc p15, 0, r0, c1, c0, 1
148 mcr p15, 0, r0, c1, c0, 1 @write aux control register
150 /*set stack limit to 0*/
154 ldr r0, _bss_start /* find start of bss segment */
155 ldr r1, _bss_end /* stop here */
156 mov r2, #0x00000000 /* clear */
158 clbss_l:str r2, [r0] /* clear loop... */