1 dnl x86-64 mpn_add_n/mpn_sub_n optimized for Pentium 4.
3 dnl Copyright 2007, 2008 Free Software Foundation, Inc.
5 dnl This file is part of the GNU MP Library.
7 dnl The GNU MP Library is free software; you can redistribute it and/or modify
8 dnl it under the terms of the GNU Lesser General Public License as published
9 dnl by the Free Software Foundation; either version 3 of the License, or (at
10 dnl your option) any later version.
12 dnl The GNU MP Library is distributed in the hope that it will be useful, but
13 dnl WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
14 dnl or FITNESS FOR A PARTICULAR PURPOSE. See the GNU Lesser General Public
15 dnl License for more details.
17 dnl You should have received a copy of the GNU Lesser General Public License
18 dnl along with the GNU MP Library. If not, see http://www.gnu.org/licenses/.
20 include(`../config.m4')
27 C P6-15: 3.6-5 (fluctuating)
37 ifdef(`OPERATION_add_n', `
39 define(func, mpn_add_n)
40 define(func_nc, mpn_add_nc)')
41 ifdef(`OPERATION_sub_n', `
43 define(func, mpn_sub_n)
44 define(func_nc, mpn_sub_nc)')
46 MULFUNC_PROLOGUE(mpn_add_n mpn_add_nc mpn_sub_n mpn_sub_nc)
66 jne L(n00) C n = 0, 4, 8, ...
67 mov R32(%r8), R32(%rbx)
76 L(n00): cmp $2, R32(%rax)
77 jnc L(n01) C n = 1, 5, 9, ...
79 mov R32(%r8), R32(%rax)
80 xor R32(%rbx), R32(%rbx)
89 L(gt1): mov 8(up), %r8
98 L(n01): jne L(n10) C n = 2, 6, 10, ...
100 mov R32(%r8), R32(%rbx)
110 L(n10): mov (up), %r10 C n = 3, 7, 11, ...
111 mov R32(%r8), R32(%rax)
112 xor R32(%rbx), R32(%rbx)
122 L(c0): mov $1, R8(%rbx)
124 L(c1): mov $1, R8(%rax)
126 L(c2): mov $1, R8(%rbx)
128 L(c3): mov $1, R8(%rax)
132 L(top): mov (up), %r8 C not on critical path
133 ADDSUB %r9, %r11 C not on critical path
134 mov (vp), %r9 C not on critical path
135 setc R8(%rbx) C save carry out
137 L(L01): ADDSUB %rax, %r11 C apply previous carry out
138 jc L(c0) C jump if ripple
139 L(rc0): mov 8(up), %r10
144 L(L00): ADDSUB %rbx, %r8
146 L(rc1): mov 16(up), %r12
151 L(L11): ADDSUB %rax, %r10
153 L(rc2): mov 24(up), %r11
160 L(L10): ADDSUB %rbx, %r12
162 L(rc3): lea 32(rp), rp
166 L(end): ADDSUB %r9, %r11
172 L(1): mov %r11, 8(rp)
174 L(ret): mov R32(%rbx), R32(%rax)