1 dnl Intel P6 mpn_modexact_1_odd -- exact division style remainder.
3 dnl Copyright 2001, 2002, 2007 Free Software Foundation, Inc.
5 dnl This file is part of the GNU MP Library.
7 dnl The GNU MP Library is free software; you can redistribute it and/or
8 dnl modify it under the terms of the GNU Lesser General Public License as
9 dnl published by the Free Software Foundation; either version 3 of the
10 dnl License, or (at your option) any later version.
12 dnl The GNU MP Library is distributed in the hope that it will be useful,
13 dnl but WITHOUT ANY WARRANTY; without even the implied warranty of
14 dnl MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
15 dnl Lesser General Public License for more details.
17 dnl You should have received a copy of the GNU Lesser General Public License
18 dnl along with the GNU MP Library. If not, see http://www.gnu.org/licenses/.
20 include(`../config.m4')
24 C P6: 10.0 12.0 cycles/limb
27 C void mpn_divexact_1 (mp_ptr dst, mp_srcptr src, mp_size_t size,
30 C The odd case is basically the same as mpn_modexact_1_odd, just with an
31 C extra store, and it runs at the same 10 cycles which is the dependent
34 C The shifts for the even case aren't on the dependent chain so in principle
35 C it could run the same too, but nothing running at 10 has been found.
36 C Perhaps there's too many uops (an extra 4 over the odd case).
38 defframe(PARAM_DIVISOR,16)
39 defframe(PARAM_SIZE, 12)
40 defframe(PARAM_SRC, 8)
41 defframe(PARAM_DST, 4)
43 defframe(SAVE_EBX, -4)
44 defframe(SAVE_ESI, -8)
45 defframe(SAVE_EDI, -12)
46 defframe(SAVE_EBP, -16)
47 defframe(VAR_INVERSE, -20)
48 deflit(STACK_SPACE, 20)
53 PROLOGUE(mpn_divexact_1)
56 movl PARAM_DIVISOR, %eax
57 subl $STACK_SPACE, %esp FRAME_subl_esp(STACK_SPACE)
65 bsfl %eax, %ecx C trailing twos
69 shrl %cl, %eax C d without twos
72 shrl %eax C d/2 without twos
74 movl %edx, PARAM_DIVISOR
78 LEA( binvert_limb_table, %ebp)
79 movzbl (%eax,%ebp), %ebp C inv 8 bits
81 movzbl binvert_limb_table(%eax), %ebp C inv 8 bits
84 leal (%ebp,%ebp), %eax C 2*inv
86 imull %ebp, %ebp C inv*inv
91 leal (%esi,%ebx,4), %esi C src end
93 imull PARAM_DIVISOR, %ebp C inv*inv*d
95 subl %ebp, %eax C inv = 2*inv - inv*inv*d
96 leal (%eax,%eax), %ebp C 2*inv
98 imull %eax, %eax C inv*inv
100 leal (%edi,%ebx,4), %edi C dst end
105 imull PARAM_DIVISOR, %eax C inv*inv*d
107 subl %eax, %ebp C inv = 2*inv - inv*inv*d
109 ASSERT(e,` C d*inv == 1 mod 2^GMP_LIMB_BITS
110 movl PARAM_DIVISOR, %eax
114 movl %ebp, VAR_INVERSE
115 movl (%esi,%ebx,4), %eax C src[0]
120 C ecx initial carry is zero
124 C The dependent chain here is
128 C mull PARAM_DIVISOR 5
132 C and this is the measured speed. No special scheduling is necessary, out
133 C of order execution hides the load latency.
136 C eax scratch (src limb)
137 C ebx counter, limbs, negative
139 C edx carry limb, high of last product
146 movl (%esi,%ebx,4), %eax
155 imull VAR_INVERSE, %eax
157 movl %eax, (%edi,%ebx,4)
171 addl $STACK_SPACE, %esp
178 C ebx counter, limbs, negative
185 xorl %ebp, %ebp C initial carry bit
186 xorl %edx, %edx C initial carry limb (for size==1)
191 movl (%esi,%ebx,4), %edi C src[1]
193 shrdl( %cl, %edi, %eax)
200 C ebx counter, limbs, negative
204 C edi &dst[size] and scratch
207 movl (%esi,%ebx,4), %edi
211 movl -4(%esi,%ebx,4), %eax
212 shrdl( %cl, %edi, %eax)
222 imull VAR_INVERSE, %eax
227 movl %eax, -4(%edi,%ebx,4)
247 imull VAR_INVERSE, %eax
251 addl $STACK_SPACE, %esp