1 dnl Intel P6 mpn_copyd -- copy limb vector backwards.
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20 include(`../config.m4')
23 C P6: 1.75 cycles/limb, or 0.75 if no overlap
26 C void mpn_copyd (mp_ptr dst, mp_srcptr src, mp_size_t size);
28 C An explicit loop is used because a decrementing rep movsl is a bit slow at
29 C 2.4 c/l. That rep movsl also has about a 40 cycle startup time, and the
30 C code here stands a chance of being faster if the branches predict well.
32 C The slightly strange loop form seems necessary for the claimed speed.
33 C Maybe load/store ordering affects it.
35 C The source and destination are checked to see if they're actually
36 C overlapping, since it might be possible to use an incrementing rep movsl
37 C at 0.75 c/l. (It doesn't suffer the bad startup time of the decrementing
42 C Top speed for an all-integer copy is probably 1.0 c/l, being one load and
43 C one store each cycle. Unrolling the loop below would approach 1.0, but
44 C it'd be good to know why something like store/load/subl + store/load/jnz
45 C doesn't already run at 1.0 c/l. It looks like it should decode in 2
46 C cycles, but doesn't run that way.
48 defframe(PARAM_SIZE,12)
49 defframe(PARAM_SRC, 8)
50 defframe(PARAM_DST, 4)
52 dnl re-using parameter space
53 define(SAVE_ESI,`PARAM_SIZE')
54 define(SAVE_EDI,`PARAM_SRC')
73 movl (%esi,%ecx,4), %eax C src[size-1]
76 movl -4(%esi,%ecx,4), %edx C src[size-2]
78 jbe L(done_loop) C 2 or 3 limbs only
81 C The usual overlap is
84 C +------------------+
86 C +------------------+
87 C +------------------+
89 C +------------------+
91 C We can use an incrementing copy in the following circumstances.
93 C src+4*size<=dst, since then the regions are disjoint
95 C src==dst, clearly (though this shouldn't occur normally)
97 C src>dst, since in that case it's a requirement of the
98 C parameters that src>=dst+size*4, and hence the
99 C regions are disjoint
102 leal (%edi,%ecx,4), %edx
104 jae L(use_movsl) C src >= dst
107 movl 4(%esi,%ecx,4), %edx C src[size-2] again
108 jbe L(use_movsl) C src+4*size <= dst
114 C ecx counter, size-3 down to 0 or -1, inclusive, by 2s
120 movl %eax, 8(%edi,%ecx,4)
121 movl (%esi,%ecx,4), %eax
123 movl %edx, 4(%edi,%ecx,4)
124 movl -4(%esi,%ecx,4), %edx
131 movl %eax, 8(%edi,%ecx,4)
132 movl %edx, 4(%edi,%ecx,4)
134 C copy low limb (needed if size was odd, but will already have been
135 C done in the loop if size was even)
156 cld C better safe than sorry, see mpn/x86/README