1 dnl PowerPC-32 mpn_mod_34lsub1 -- mpn remainder mod 2^24-1.
3 dnl Copyright 2002, 2003, 2005 Free Software Foundation, Inc.
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20 include(`../config.m4')
32 C mp_limb_t mpn_mod_34lsub1 (mp_srcptr src, mp_size_t size)
34 C There seems no need to schedule the loads back, the code is still 3.0 c/l
35 C on 750/7400 no matter where they're placed.
39 C Fetching half words would allow add instead for accumulating, instead of
40 C adde and its serialization. An outer loop would be required though, since
41 C 2^16 halfwords can overflow. lhz+add would be 2.0 c/l, but if there's
42 C also a bdz or bdnz for each and a pointer update say every three limbs
43 C then the total would be 2.67 c/l which isn't much faster than the current
47 PROLOGUE(mpn_mod_34lsub1)
53 addic r6, r3, 8 C &src[2], and clear CA
55 lwz r3, 0(r3) C acc0 = src[0]
58 lwz r4, -4(r6) C acc1 = src[1]
61 lwz r5, 0(r6) C acc2 = src[2]
62 lis r7, 0 C no carry if just three limbs
65 lis r7, 1 C 0x10000 carry pos
71 C r6 src, incrementing
91 subfe r0, r0, r0 C -1 if not CA
93 andc r7, r7, r0 C final carry, 0x10000, 0x100, 1 or 0
95 rlwinm r6, r3, 0,8,31 C acc0 low
98 rlwinm r6, r3, 8,24,31 C acc0 high
101 rlwinm r6, r4, 8,8,23 C acc1 low
104 rlwinm r6, r4, 16,16,31 C acc1 high
107 rlwinm r6, r5, 16,8,15 C acc2 low
110 rlwinm r6, r5, 24,8,31 C acc2 high
121 rlwinm r5, r3, 8,24,31 C acc0 high
122 rlwinm r3, r3, 0,8,31 C acc0 low
124 add r3, r3, r5 C acc0 high + low
125 rlwinm r5, r4, 16,16,31 C acc1 high
127 add r3, r3, r5 C add acc1 high
128 rlwinm r5, r4, 8,8,23 C acc1 low
130 add r3, r3, r5 C add acc1 low