1 Copyright 2001, 2003, 2004 Free Software Foundation, Inc.
3 This file is part of the GNU MP Library.
5 The GNU MP Library is free software; you can redistribute it and/or modify
6 it under the terms of the GNU Lesser General Public License as published by
7 the Free Software Foundation; either version 3 of the License, or (at your
8 option) any later version.
10 The GNU MP Library is distributed in the hope that it will be useful, but
11 WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
12 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU Lesser General Public
13 License for more details.
15 You should have received a copy of the GNU Lesser General Public License
16 along with the GNU MP Library. If not, see http://www.gnu.org/licenses/.
25 This directory contains mpn functions for various m68k family chips.
30 m68k m68000, m68010, m68060
31 m68k/mc68020 m68020, m68030, m68040, and CPU32
34 The m5200 "coldfire", which is m68000 less a few instructions, currently has
35 no assembler code support.
40 The code herein is old and poorly maintained. If somebody really cared, it
41 could be optimized substantially. For example,
43 * mpn_add_n and mpn_sub_n could, with more unrolling be improved from 6 to
44 close to 4 c/l (on m68040).
46 * The multiplication loops could be sped up by using the FPU.
48 * mpn_lshift by 31 should use the special-case mpn_rshift by 1 code, and
49 vice versa mpn_rshift by 31 use the special lshift by 1, when operand
52 * On 68000, mpn_mul_1, mpn_addmul_1 and mpn_submul_1 could check for a
53 16-bit multiplier and use two multiplies per limb, not four.
55 Similarly various other _1 operations like mpn_mod_1, mpn_divrem_1,
56 mpn_divexact_1, mpn_modexact_1c_odd.
58 * On 68000, mpn_lshift and mpn_rshift could use a roll and mask instead of
59 lsrl and lsll. This promises to be a speedup, effectively trading a 6+2*n
60 shift for one or two 4 cycle masks. Suggested by Jean-Charles Meyrignac.
62 * config.guess detects 68000, 68010, CPU32 and 68020 by running some code,
63 but relies on system information for 030, 040 and 060. Can they be
64 identified by running some code? Currently this only makes a difference
65 to the compiler options selected, since we have no specific asm code for
68 One novel idea for 68000 would be to use a 16-bit limb instead of 32-bits.
69 This would suit the native 16x16 multiply, but might make it difficult to
70 get full value from the native 32x32 add/sub/etc. This would be an ABI
71 option, and would select "__GMP_SHORT_LIMB" in gmp.h.
73 Naturally an entirely new set of asm subroutines would be needed for a
74 16-bit limb. Also there's various places in the C code assuming limb>=long,
75 which would need to be updated, eg. mpz_set_ui. Some of the nails changes
76 may have helped cover some of this.
81 The .asm files are put through m4 for macro processing, and with the help of
82 configure give either MIT or Motorola syntax. The generic mpn/asm-defs.m4
83 is used, together with mpn/m68k/m68k-defs.m4. See comments in those files.
85 Not all possible syntax variations are covered. GCC config/m68k for
86 instance has things like $ for immediates on CRDS or reversed cmp order for
87 AT&T SGS. These could probably be handled if anyone really needs it.
92 The SVR4 standard has an int of 32 bits, and all parameters 32-bit aligned
95 PalmOS and perhaps various embedded systems intended for 68000 however use
96 an int of 16 bits and parameters only 16-bit aligned on the stack. This is
97 generated by "gcc -mshort" (and is the default for the PalmOS gcc port, we
100 The asm files adapt to these two ABIs by checking sizeof(unsigned), coming
101 through config.m4 as SIZEOF_UNSIGNED. Only mpn_lshift and mpn_rshift are
102 affected, all other routines take longs and pointers, which are 32-bits in
105 Strictly speaking the size of an int doesn't determine the stack padding
106 convention. But if int is 16 bits then we can definitely say the host
107 system is not SVR4, and therefore may as well assume we're in 16-bit stack
113 "Motorola M68000 Family Programmer's Reference Manual", available online,
115 http://e-www.motorola.com/brdata/PDFDB/docs/M68000PM.pdf
117 "System V Application Binary Interface: Motorola 68000 Processor Family
118 Supplement", AT&T, 1990, ISBN 0-13-877553-6. Has details of calling
119 conventions and ELF style PIC coding.