meta: fix refactor to a better layout
[scm/bb/meta-tizen.git] / meta-tizen-adaptation / meta / recipes-extended / libaio / libaio / 00_arches.patch
1 Upstream-Status: Inappropriate [embedded specific]
2
3 from openembedded, added by Qing He <qing.he@intel.com>
4
5 Index: libaio-0.3.110/src/syscall-m68k.h
6 ===================================================================
7 --- /dev/null
8 +++ libaio-0.3.110/src/syscall-m68k.h
9 @@ -0,0 +1,78 @@
10 +#define __NR_io_setup          241
11 +#define __NR_io_destroy                242
12 +#define __NR_io_getevents      243
13 +#define __NR_io_submit         244
14 +#define __NR_io_cancel         245
15 +
16 +#define io_syscall1(type,fname,sname,atype,a) \
17 +type fname(atype a) \
18 +{ \
19 +register long __res __asm__ ("%d0") = __NR_##sname; \
20 +register long __a __asm__ ("%d1") = (long)(a); \
21 +__asm__ __volatile__ ("trap  #0" \
22 +                     : "+d" (__res) \
23 +                     : "d" (__a)  ); \
24 +return (type) __res; \
25 +}
26 +
27 +#define io_syscall2(type,fname,sname,atype,a,btype,b) \
28 +type fname(atype a,btype b) \
29 +{ \
30 +register long __res __asm__ ("%d0") = __NR_##sname; \
31 +register long __a __asm__ ("%d1") = (long)(a); \
32 +register long __b __asm__ ("%d2") = (long)(b); \
33 +__asm__ __volatile__ ("trap  #0" \
34 +                     : "+d" (__res) \
35 +                     : "d" (__a), "d" (__b) \
36 +                    ); \
37 +return (type) __res; \
38 +}
39 +
40 +#define io_syscall3(type,fname,sname,atype,a,btype,b,ctype,c) \
41 +type fname(atype a,btype b,ctype c) \
42 +{ \
43 +register long __res __asm__ ("%d0") = __NR_##sname; \
44 +register long __a __asm__ ("%d1") = (long)(a); \
45 +register long __b __asm__ ("%d2") = (long)(b); \
46 +register long __c __asm__ ("%d3") = (long)(c); \
47 +__asm__ __volatile__ ("trap  #0" \
48 +                     : "+d" (__res) \
49 +                     : "d" (__a), "d" (__b), \
50 +                       "d" (__c) \
51 +                    ); \
52 +return (type) __res; \
53 +}
54 +
55 +#define io_syscall4(type,fname,sname,atype,a,btype,b,ctype,c,dtype,d) \
56 +type fname (atype a, btype b, ctype c, dtype d) \
57 +{ \
58 +register long __res __asm__ ("%d0") = __NR_##sname; \
59 +register long __a __asm__ ("%d1") = (long)(a); \
60 +register long __b __asm__ ("%d2") = (long)(b); \
61 +register long __c __asm__ ("%d3") = (long)(c); \
62 +register long __d __asm__ ("%d4") = (long)(d); \
63 +__asm__ __volatile__ ("trap  #0" \
64 +                     : "+d" (__res) \
65 +                     : "d" (__a), "d" (__b), \
66 +                       "d" (__c), "d" (__d)  \
67 +                    ); \
68 +return (type) __res; \
69 +}
70 +
71 +#define io_syscall5(type,fname,sname,atype,a,btype,b,ctype,c,dtype,d,etype,e) \
72 +type fname (atype a,btype b,ctype c,dtype d,etype e) \
73 +{ \
74 +register long __res __asm__ ("%d0") = __NR_##sname; \
75 +register long __a __asm__ ("%d1") = (long)(a); \
76 +register long __b __asm__ ("%d2") = (long)(b); \
77 +register long __c __asm__ ("%d3") = (long)(c); \
78 +register long __d __asm__ ("%d4") = (long)(d); \
79 +register long __e __asm__ ("%d5") = (long)(e); \
80 +__asm__ __volatile__ ("trap  #0" \
81 +                     : "+d" (__res) \
82 +                     : "d" (__a), "d" (__b), \
83 +                       "d" (__c), "d" (__d), "d" (__e)  \
84 +                    ); \
85 +return (type) __res; \
86 +}
87 +
88 Index: libaio-0.3.110/src/syscall.h
89 ===================================================================
90 --- libaio-0.3.110.orig/src/syscall.h
91 +++ libaio-0.3.110/src/syscall.h
92 @@ -28,6 +28,12 @@
93  #include "syscall-sparc.h"
94  #elif defined(__aarch64__)
95  #include "syscall-arm64.h"
96 +#elif defined(__m68k__)
97 +#include "syscall-m68k.h"
98 +#elif defined(__hppa__)
99 +#include "syscall-parisc.h"
100 +#elif defined(__mips__)
101 +#include "syscall-mips.h"
102  #else
103  #warning "using generic syscall method"
104  #include "syscall-generic.h"
105 Index: libaio-0.3.110/src/syscall-mips.h
106 ===================================================================
107 --- /dev/null
108 +++ libaio-0.3.110/src/syscall-mips.h
109 @@ -0,0 +1,223 @@
110 +/*
111 + * This file is subject to the terms and conditions of the GNU General Public
112 + * License.  See the file "COPYING" in the main directory of this archive
113 + * for more details.
114 + *
115 + * Copyright (C) 1995, 96, 97, 98, 99, 2000 by Ralf Baechle
116 + * Copyright (C) 1999, 2000 Silicon Graphics, Inc.
117 + *
118 + * Changed system calls macros _syscall5 - _syscall7 to push args 5 to 7 onto
119 + * the stack. Robin Farine for ACN S.A, Copyright (C) 1996 by ACN S.A
120 + */
121 +
122 +#ifndef _MIPS_SIM_ABI32
123 +#define _MIPS_SIM_ABI32                        1
124 +#define _MIPS_SIM_NABI32               2
125 +#define _MIPS_SIM_ABI64                        3
126 +#endif
127 +
128 +#if _MIPS_SIM == _MIPS_SIM_ABI32
129 +
130 +/*
131 + * Linux o32 style syscalls are in the range from 4000 to 4999.
132 + */
133 +#define __NR_Linux                     4000
134 +#define __NR_io_setup                  (__NR_Linux + 241)
135 +#define __NR_io_destroy                        (__NR_Linux + 242)
136 +#define __NR_io_getevents              (__NR_Linux + 243)
137 +#define __NR_io_submit                 (__NR_Linux + 244)
138 +#define __NR_io_cancel                 (__NR_Linux + 245)
139 +
140 +#endif /* _MIPS_SIM == _MIPS_SIM_ABI32 */
141 +
142 +#if _MIPS_SIM == _MIPS_SIM_ABI64
143 +
144 +/*
145 + * Linux 64-bit syscalls are in the range from 5000 to 5999.
146 + */
147 +#define __NR_Linux                     5000
148 +#define __NR_io_setup                  (__NR_Linux + 200)
149 +#define __NR_io_destroy                        (__NR_Linux + 201)
150 +#define __NR_io_getevents              (__NR_Linux + 202)
151 +#define __NR_io_submit                 (__NR_Linux + 203)
152 +#define __NR_io_cancel                 (__NR_Linux + 204)
153 +#endif /* _MIPS_SIM == _MIPS_SIM_ABI64 */
154 +
155 +#if _MIPS_SIM == _MIPS_SIM_NABI32
156 +
157 +/*
158 + * Linux N32 syscalls are in the range from 6000 to 6999.
159 + */
160 +#define __NR_Linux                     6000
161 +#define __NR_io_setup                  (__NR_Linux + 200)
162 +#define __NR_io_destroy                        (__NR_Linux + 201)
163 +#define __NR_io_getevents              (__NR_Linux + 202)
164 +#define __NR_io_submit                 (__NR_Linux + 203)
165 +#define __NR_io_cancel                 (__NR_Linux + 204)
166 +#endif /* _MIPS_SIM == _MIPS_SIM_NABI32 */
167 +
168 +#define io_syscall1(type,fname,sname,atype,a) \
169 +type fname(atype a) \
170 +{ \
171 +       register unsigned long __a0 asm("$4") = (unsigned long) a; \
172 +       register unsigned long __a3 asm("$7"); \
173 +       unsigned long __v0; \
174 +       \
175 +       __asm__ volatile ( \
176 +       ".set\tnoreorder\n\t" \
177 +       "li\t$2, %3\t\t\t# " #fname "\n\t" \
178 +       "syscall\n\t" \
179 +       "move\t%0, $2\n\t" \
180 +       ".set\treorder" \
181 +       : "=&r" (__v0), "=r" (__a3) \
182 +       : "r" (__a0), "i" (__NR_##sname) \
183 +       : "$2", "$8", "$9", "$10", "$11", "$12", "$13", "$14", "$15", "$24", \
184 +         "memory"); \
185 +       \
186 +       if (__a3 == 0) \
187 +               return (type) __v0; \
188 +       return (type) -1; \
189 +}
190 +
191 +#define io_syscall2(type,fname,sname,atype,a,btype,b) \
192 +type fname(atype a, btype b) \
193 +{ \
194 +       register unsigned long __a0 asm("$4") = (unsigned long) a; \
195 +       register unsigned long __a1 asm("$5") = (unsigned long) b; \
196 +       register unsigned long __a3 asm("$7"); \
197 +       unsigned long __v0; \
198 +       \
199 +       __asm__ volatile ( \
200 +       ".set\tnoreorder\n\t" \
201 +       "li\t$2, %4\t\t\t# " #fname "\n\t" \
202 +       "syscall\n\t" \
203 +       "move\t%0, $2\n\t" \
204 +       ".set\treorder" \
205 +       : "=&r" (__v0), "=r" (__a3) \
206 +       : "r" (__a0), "r" (__a1), "i" (__NR_##sname) \
207 +       : "$2", "$8", "$9", "$10", "$11", "$12", "$13", "$14", "$15", "$24", \
208 +         "memory"); \
209 +       \
210 +       if (__a3 == 0) \
211 +               return (type) __v0; \
212 +       return (type) -1; \
213 +}
214 +
215 +#define io_syscall3(type,fname,sname,atype,a,btype,b,ctype,c) \
216 +type fname(atype a, btype b, ctype c) \
217 +{ \
218 +       register unsigned long __a0 asm("$4") = (unsigned long) a; \
219 +       register unsigned long __a1 asm("$5") = (unsigned long) b; \
220 +       register unsigned long __a2 asm("$6") = (unsigned long) c; \
221 +       register unsigned long __a3 asm("$7"); \
222 +       unsigned long __v0; \
223 +       \
224 +       __asm__ volatile ( \
225 +       ".set\tnoreorder\n\t" \
226 +       "li\t$2, %5\t\t\t# " #fname "\n\t" \
227 +       "syscall\n\t" \
228 +       "move\t%0, $2\n\t" \
229 +       ".set\treorder" \
230 +       : "=&r" (__v0), "=r" (__a3) \
231 +       : "r" (__a0), "r" (__a1), "r" (__a2), "i" (__NR_##sname) \
232 +       : "$2", "$8", "$9", "$10", "$11", "$12", "$13", "$14", "$15", "$24", \
233 +         "memory"); \
234 +       \
235 +       if (__a3 == 0) \
236 +               return (type) __v0; \
237 +       return (type) -1; \
238 +}
239 +
240 +#define io_syscall4(type,fname,sname,atype,a,btype,b,ctype,c,dtype,d) \
241 +type fname(atype a, btype b, ctype c, dtype d) \
242 +{ \
243 +       register unsigned long __a0 asm("$4") = (unsigned long) a; \
244 +       register unsigned long __a1 asm("$5") = (unsigned long) b; \
245 +       register unsigned long __a2 asm("$6") = (unsigned long) c; \
246 +       register unsigned long __a3 asm("$7") = (unsigned long) d; \
247 +       unsigned long __v0; \
248 +       \
249 +       __asm__ volatile ( \
250 +       ".set\tnoreorder\n\t" \
251 +       "li\t$2, %5\t\t\t# " #fname "\n\t" \
252 +       "syscall\n\t" \
253 +       "move\t%0, $2\n\t" \
254 +       ".set\treorder" \
255 +       : "=&r" (__v0), "+r" (__a3) \
256 +       : "r" (__a0), "r" (__a1), "r" (__a2), "i" (__NR_##sname) \
257 +       : "$2", "$8", "$9", "$10", "$11", "$12", "$13", "$14", "$15", "$24", \
258 +         "memory"); \
259 +       \
260 +       if (__a3 == 0) \
261 +               return (type) __v0; \
262 +       return (type) -1; \
263 +}
264 +
265 +#if (_MIPS_SIM == _MIPS_SIM_ABI32)
266 +
267 +/*
268 + * Using those means your brain needs more than an oil change ;-)
269 + */
270 +
271 +#define io_syscall5(type,fname,sname,atype,a,btype,b,ctype,c,dtype,d,etype,e) \
272 +type fname(atype a, btype b, ctype c, dtype d, etype e) \
273 +{ \
274 +       register unsigned long __a0 asm("$4") = (unsigned long) a; \
275 +       register unsigned long __a1 asm("$5") = (unsigned long) b; \
276 +       register unsigned long __a2 asm("$6") = (unsigned long) c; \
277 +       register unsigned long __a3 asm("$7") = (unsigned long) d; \
278 +       unsigned long __v0; \
279 +       \
280 +       __asm__ volatile ( \
281 +       ".set\tnoreorder\n\t" \
282 +       "lw\t$2, %6\n\t" \
283 +       "subu\t$29, 32\n\t" \
284 +       "sw\t$2, 16($29)\n\t" \
285 +       "li\t$2, %5\t\t\t# " #fname "\n\t" \
286 +       "syscall\n\t" \
287 +       "move\t%0, $2\n\t" \
288 +       "addiu\t$29, 32\n\t" \
289 +       ".set\treorder" \
290 +       : "=&r" (__v0), "+r" (__a3) \
291 +       : "r" (__a0), "r" (__a1), "r" (__a2), "i" (__NR_##sname), \
292 +         "m" ((unsigned long)e) \
293 +       : "$2", "$8", "$9", "$10", "$11", "$12", "$13", "$14", "$15", "$24", \
294 +         "memory"); \
295 +       \
296 +       if (__a3 == 0) \
297 +               return (type) __v0; \
298 +       return (type) -1; \
299 +}
300 +
301 +#endif /* (_MIPS_SIM == _MIPS_SIM_ABI32) */
302 +
303 +#if (_MIPS_SIM == _MIPS_SIM_NABI32) || (_MIPS_SIM == _MIPS_SIM_ABI64)
304 +
305 +#define io_syscall5(type,fname,sname,atype,a,btype,b,ctype,c,dtype,d,etype,e) \
306 +type fname (atype a,btype b,ctype c,dtype d,etype e) \
307 +{ \
308 +       register unsigned long __a0 asm("$4") = (unsigned long) a; \
309 +       register unsigned long __a1 asm("$5") = (unsigned long) b; \
310 +       register unsigned long __a2 asm("$6") = (unsigned long) c; \
311 +       register unsigned long __a3 asm("$7") = (unsigned long) d; \
312 +       register unsigned long __a4 asm("$8") = (unsigned long) e; \
313 +       unsigned long __v0; \
314 +       \
315 +       __asm__ volatile ( \
316 +       ".set\tnoreorder\n\t" \
317 +       "li\t$2, %6\t\t\t# " #fname "\n\t" \
318 +       "syscall\n\t" \
319 +       "move\t%0, $2\n\t" \
320 +       ".set\treorder" \
321 +       : "=&r" (__v0), "+r" (__a3) \
322 +       : "r" (__a0), "r" (__a1), "r" (__a2), "r" (__a4), "i" (__NR_##sname) \
323 +       : "$2", "$9", "$10", "$11", "$12", "$13", "$14", "$15", "$24", \
324 +         "memory"); \
325 +       \
326 +       if (__a3 == 0) \
327 +               return (type) __v0; \
328 +       return (type) -1; \
329 +}
330 +
331 +#endif /* (_MIPS_SIM == _MIPS_SIM_NABI32) || (_MIPS_SIM == _MIPS_SIM_ABI64) */
332 +
333 Index: libaio-0.3.110/src/syscall-parisc.h
334 ===================================================================
335 --- /dev/null
336 +++ libaio-0.3.110/src/syscall-parisc.h
337 @@ -0,0 +1,146 @@
338 +/*
339 + * Linux system call numbers.
340 + *
341 + * Cary Coutant says that we should just use another syscall gateway
342 + * page to avoid clashing with the HPUX space, and I think he's right:
343 + * it will would keep a branch out of our syscall entry path, at the
344 + * very least.  If we decide to change it later, we can ``just'' tweak
345 + * the LINUX_GATEWAY_ADDR define at the bottom and make __NR_Linux be
346 + * 1024 or something.  Oh, and recompile libc. =)
347 + *
348 + * 64-bit HPUX binaries get the syscall gateway address passed in a register
349 + * from the kernel at startup, which seems a sane strategy.
350 + */
351 +
352 +#define __NR_Linux                0
353 +#define __NR_io_setup           (__NR_Linux + 215)
354 +#define __NR_io_destroy         (__NR_Linux + 216)
355 +#define __NR_io_getevents       (__NR_Linux + 217)
356 +#define __NR_io_submit          (__NR_Linux + 218)
357 +#define __NR_io_cancel          (__NR_Linux + 219)
358 +
359 +#define SYS_ify(syscall_name)   __NR_##syscall_name
360 +
361 +/* Assume all syscalls are done from PIC code just to be
362 + * safe. The worst case scenario is that you lose a register
363 + * and save/restore r19 across the syscall. */
364 +#define PIC
365 +
366 +/* Definition taken from glibc 2.3.3
367 + * sysdeps/unix/sysv/linux/hppa/sysdep.h
368 + */
369 +
370 +#ifdef PIC
371 +/* WARNING: CANNOT BE USED IN A NOP! */
372 +# define K_STW_ASM_PIC "       copy %%r19, %%r4\n"
373 +# define K_LDW_ASM_PIC "       copy %%r4, %%r19\n"
374 +# define K_USING_GR4   "%r4",
375 +#else
376 +# define K_STW_ASM_PIC " \n"
377 +# define K_LDW_ASM_PIC " \n"
378 +# define K_USING_GR4
379 +#endif
380 +
381 +/* GCC has to be warned that a syscall may clobber all the ABI
382 +   registers listed as "caller-saves", see page 8, Table 2
383 +   in section 2.2.6 of the PA-RISC RUN-TIME architecture
384 +   document. However! r28 is the result and will conflict with
385 +   the clobber list so it is left out. Also the input arguments
386 +   registers r20 -> r26 will conflict with the list so they
387 +   are treated specially. Although r19 is clobbered by the syscall
388 +   we cannot say this because it would violate ABI, thus we say
389 +   r4 is clobbered and use that register to save/restore r19
390 +   across the syscall. */
391 +
392 +#define K_CALL_CLOB_REGS "%r1", "%r2", K_USING_GR4 \
393 +                        "%r20", "%r29", "%r31"
394 +
395 +#undef K_INLINE_SYSCALL
396 +#define K_INLINE_SYSCALL(name, nr, args...)    ({                      \
397 +       long __sys_res;                                                 \
398 +       {                                                               \
399 +               register unsigned long __res __asm__("r28");            \
400 +               K_LOAD_ARGS_##nr(args)                                  \
401 +               /* FIXME: HACK stw/ldw r19 around syscall */            \
402 +               __asm__ volatile(                                       \
403 +                       K_STW_ASM_PIC                                   \
404 +                       "       ble  0x100(%%sr2, %%r0)\n"              \
405 +                       "       ldi %1, %%r20\n"                        \
406 +                       K_LDW_ASM_PIC                                   \
407 +                       : "=r" (__res)                                  \
408 +                       : "i" (SYS_ify(name)) K_ASM_ARGS_##nr           \
409 +                       : "memory", K_CALL_CLOB_REGS K_CLOB_ARGS_##nr   \
410 +               );                                                      \
411 +               __sys_res = (long)__res;                                \
412 +       }                                                               \
413 +       __sys_res;                                                      \
414 +})
415 +
416 +#define K_LOAD_ARGS_0()
417 +#define K_LOAD_ARGS_1(r26)                                     \
418 +       register unsigned long __r26 __asm__("r26") = (unsigned long)(r26);   \
419 +       K_LOAD_ARGS_0()
420 +#define K_LOAD_ARGS_2(r26,r25)                                 \
421 +       register unsigned long __r25 __asm__("r25") = (unsigned long)(r25);   \
422 +       K_LOAD_ARGS_1(r26)
423 +#define K_LOAD_ARGS_3(r26,r25,r24)                             \
424 +       register unsigned long __r24 __asm__("r24") = (unsigned long)(r24);   \
425 +       K_LOAD_ARGS_2(r26,r25)
426 +#define K_LOAD_ARGS_4(r26,r25,r24,r23)                         \
427 +       register unsigned long __r23 __asm__("r23") = (unsigned long)(r23);   \
428 +       K_LOAD_ARGS_3(r26,r25,r24)
429 +#define K_LOAD_ARGS_5(r26,r25,r24,r23,r22)                     \
430 +       register unsigned long __r22 __asm__("r22") = (unsigned long)(r22);   \
431 +       K_LOAD_ARGS_4(r26,r25,r24,r23)
432 +#define K_LOAD_ARGS_6(r26,r25,r24,r23,r22,r21)                 \
433 +       register unsigned long __r21 __asm__("r21") = (unsigned long)(r21);   \
434 +       K_LOAD_ARGS_5(r26,r25,r24,r23,r22)
435 +
436 +/* Even with zero args we use r20 for the syscall number */
437 +#define K_ASM_ARGS_0
438 +#define K_ASM_ARGS_1 K_ASM_ARGS_0, "r" (__r26)
439 +#define K_ASM_ARGS_2 K_ASM_ARGS_1, "r" (__r25)
440 +#define K_ASM_ARGS_3 K_ASM_ARGS_2, "r" (__r24)
441 +#define K_ASM_ARGS_4 K_ASM_ARGS_3, "r" (__r23)
442 +#define K_ASM_ARGS_5 K_ASM_ARGS_4, "r" (__r22)
443 +#define K_ASM_ARGS_6 K_ASM_ARGS_5, "r" (__r21)
444 +
445 +/* The registers not listed as inputs but clobbered */
446 +#define K_CLOB_ARGS_6
447 +#define K_CLOB_ARGS_5 K_CLOB_ARGS_6, "%r21"
448 +#define K_CLOB_ARGS_4 K_CLOB_ARGS_5, "%r22"
449 +#define K_CLOB_ARGS_3 K_CLOB_ARGS_4, "%r23"
450 +#define K_CLOB_ARGS_2 K_CLOB_ARGS_3, "%r24"
451 +#define K_CLOB_ARGS_1 K_CLOB_ARGS_2, "%r25"
452 +#define K_CLOB_ARGS_0 K_CLOB_ARGS_1, "%r26"
453 +
454 +#define io_syscall1(type,fname,sname,type1,arg1)                       \
455 +type fname(type1 arg1)                                                 \
456 +{                                                                      \
457 +    return K_INLINE_SYSCALL(sname, 1, arg1);                           \
458 +}
459 +
460 +#define io_syscall2(type,fname,sname,type1,arg1,type2,arg2)            \
461 +type fname(type1 arg1, type2 arg2)                                     \
462 +{                                                                      \
463 +    return K_INLINE_SYSCALL(sname, 2, arg1, arg2);                     \
464 +}
465 +
466 +#define io_syscall3(type,fname,sname,type1,arg1,type2,arg2,type3,arg3) \
467 +type fname(type1 arg1, type2 arg2, type3 arg3)                         \
468 +{                                                                      \
469 +    return K_INLINE_SYSCALL(sname, 3, arg1, arg2, arg3);               \
470 +}
471 +
472 +#define io_syscall4(type,fname,sname,type1,arg1,type2,arg2,type3,arg3,type4,arg4) \
473 +type fname(type1 arg1, type2 arg2, type3 arg3, type4 arg4)             \
474 +{                                                                      \
475 +    return K_INLINE_SYSCALL(sname, 4, arg1, arg2, arg3, arg4);         \
476 +}
477 +
478 +#define io_syscall5(type,fname,sname,type1,arg1,type2,arg2,type3,arg3,type4,arg4,type5,arg5) \
479 +type fname(type1 arg1, type2 arg2, type3 arg3, type4 arg4, type5 arg5) \
480 +{                                                                      \
481 +    return K_INLINE_SYSCALL(sname, 5, arg1, arg2, arg3, arg4, arg5);   \
482 +}
483 +
484 Index: libaio-0.3.110/src/syscall-arm.h
485 ===================================================================
486 --- libaio-0.3.110.orig/src/syscall-arm.h
487 +++ libaio-0.3.110/src/syscall-arm.h
488 @@ -114,3 +114,119 @@ type fname(type1 arg1, type2 arg2, type3
489    return (type) __res_r0;                                              \
490  }
491  
492 +/*
493 + *  linux/include/asm-arm/unistd.h
494 + *
495 + *  Copyright (C) 2001-2005 Russell King
496 + *
497 + * This program is free software; you can redistribute it and/or modify
498 + * it under the terms of the GNU General Public License version 2 as
499 + * published by the Free Software Foundation.
500 + *
501 + * Please forward _all_ changes to this file to rmk@arm.linux.org.uk,
502 + * no matter what the change is.  Thanks!
503 + */
504 +
505 +#define __NR_OABI_SYSCALL_BASE 0x900000
506 +
507 +#if defined(__thumb__) || defined(__ARM_EABI__)
508 +#define __NR_SYSCALL_BASE      0
509 +#else
510 +#define __NR_SYSCALL_BASE      __NR_OABI_SYSCALL_BASE
511 +#endif
512 +
513 +#define __NR_io_setup                  (__NR_SYSCALL_BASE+243)
514 +#define __NR_io_destroy                        (__NR_SYSCALL_BASE+244)
515 +#define __NR_io_getevents              (__NR_SYSCALL_BASE+245)
516 +#define __NR_io_submit                 (__NR_SYSCALL_BASE+246)
517 +#define __NR_io_cancel                 (__NR_SYSCALL_BASE+247)
518 +
519 +#define __sys2(x) #x
520 +#define __sys1(x) __sys2(x)
521 +
522 +#if defined(__thumb__) || defined(__ARM_EABI__)
523 +#define __SYS_REG(name) register long __sysreg __asm__("r7") = __NR_##name;
524 +#define __SYS_REG_LIST(regs...) "r" (__sysreg) , ##regs
525 +#define __syscall(name) "swi\t0"
526 +#else
527 +#define __SYS_REG(name)
528 +#define __SYS_REG_LIST(regs...) regs
529 +#define __syscall(name) "swi\t" __sys1(__NR_##name) ""
530 +#endif
531 +
532 +#define io_syscall1(type,fname,sname,type1,arg1)                       \
533 +type fname(type1 arg1) {                                               \
534 +  __SYS_REG(sname)                                                     \
535 +  register long __r0 __asm__("r0") = (long)arg1;                       \
536 +  register long __res_r0 __asm__("r0");                                        \
537 +  __asm__ __volatile__ (                                               \
538 +  __syscall(sname)                                                     \
539 +       : "=r" (__res_r0)                                               \
540 +       : __SYS_REG_LIST( "0" (__r0) )                                  \
541 +       : "memory" );                                                   \
542 +  return (type) __res_r0;                                              \
543 +}
544 +
545 +#define io_syscall2(type,fname,sname,type1,arg1,type2,arg2)            \
546 +type fname(type1 arg1,type2 arg2) {                                    \
547 +  __SYS_REG(sname)                                                     \
548 +  register long __r0 __asm__("r0") = (long)arg1;                       \
549 +  register long __r1 __asm__("r1") = (long)arg2;                       \
550 +  register long __res_r0 __asm__("r0");                                        \
551 +  __asm__ __volatile__ (                                               \
552 +  __syscall(sname)                                                     \
553 +       : "=r" (__res_r0)                                               \
554 +       : __SYS_REG_LIST( "0" (__r0), "r" (__r1) )                      \
555 +       : "memory" );                                                   \
556 +  return (type) __res_r0;                                              \
557 +}
558 +
559 +#define io_syscall3(type,fname,sname,type1,arg1,type2,arg2,type3,arg3) \
560 +type fname(type1 arg1,type2 arg2,type3 arg3) {                         \
561 +  __SYS_REG(sname)                                                     \
562 +  register long __r0 __asm__("r0") = (long)arg1;                       \
563 +  register long __r1 __asm__("r1") = (long)arg2;                       \
564 +  register long __r2 __asm__("r2") = (long)arg3;                       \
565 +  register long __res_r0 __asm__("r0");                                        \
566 +  __asm__ __volatile__ (                                               \
567 +  __syscall(sname)                                                     \
568 +       : "=r" (__res_r0)                                               \
569 +       : __SYS_REG_LIST( "0" (__r0), "r" (__r1), "r" (__r2) )          \
570 +       : "memory" );                                                   \
571 +  return (type) __res_r0;                                              \
572 +}
573 +
574 +#define io_syscall4(type,fname,sname,type1,arg1,type2,arg2,type3,arg3,type4,arg4)\
575 +type fname(type1 arg1, type2 arg2, type3 arg3, type4 arg4) {           \
576 +  __SYS_REG(sname)                                                     \
577 +  register long __r0 __asm__("r0") = (long)arg1;                       \
578 +  register long __r1 __asm__("r1") = (long)arg2;                       \
579 +  register long __r2 __asm__("r2") = (long)arg3;                       \
580 +  register long __r3 __asm__("r3") = (long)arg4;                       \
581 +  register long __res_r0 __asm__("r0");                                        \
582 +  __asm__ __volatile__ (                                               \
583 +  __syscall(sname)                                                     \
584 +       : "=r" (__res_r0)                                               \
585 +       : __SYS_REG_LIST( "0" (__r0), "r" (__r1), "r" (__r2), "r" (__r3) ) \
586 +       : "memory" );                                                   \
587 +  return (type) __res_r0;                                              \
588 +}
589 +
590 +#define io_syscall5(type,fname,sname,type1,arg1,type2,arg2,type3,arg3,type4,arg4,type5,arg5)   \
591 +type fname(type1 arg1, type2 arg2, type3 arg3, type4 arg4, type5 arg5) {\
592 +  __SYS_REG(sname)                                                     \
593 +  register long __r0 __asm__("r0") = (long)arg1;                       \
594 +  register long __r1 __asm__("r1") = (long)arg2;                       \
595 +  register long __r2 __asm__("r2") = (long)arg3;                       \
596 +  register long __r3 __asm__("r3") = (long)arg4;                       \
597 +  register long __r4 __asm__("r4") = (long)arg5;                       \
598 +  register long __res_r0 __asm__("r0");                                        \
599 +  __asm__ __volatile__ (                                               \
600 +  __syscall(sname)                                                     \
601 +       : "=r" (__res_r0)                                               \
602 +       : __SYS_REG_LIST( "0" (__r0), "r" (__r1), "r" (__r2),           \
603 +                         "r" (__r3), "r" (__r4) )                      \
604 +       : "memory" );                                                   \
605 +  return (type) __res_r0;                                              \
606 +}
607 +