1 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2 ; RUN: llc < %s -mtriple aarch64-eabi -mattr=+sve -o - | FileCheck --check-prefixes=CHECK %s
4 target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128"
8 define <vscale x 2 x float> @test_copysign_v2f32_v2f32(<vscale x 2 x float> %a, <vscale x 2 x float> %b) #0 {
9 ; CHECK-LABEL: test_copysign_v2f32_v2f32:
11 ; CHECK-NEXT: and z1.s, z1.s, #0x80000000
12 ; CHECK-NEXT: and z0.s, z0.s, #0x7fffffff
13 ; CHECK-NEXT: orr z0.d, z0.d, z1.d
15 %r = call <vscale x 2 x float> @llvm.copysign.v2f32(<vscale x 2 x float> %a, <vscale x 2 x float> %b)
16 ret <vscale x 2 x float> %r
19 define <vscale x 2 x float> @test_copysign_v2f32_v2f64(<vscale x 2 x float> %a, <vscale x 2 x double> %b) #0 {
20 ; CHECK-LABEL: test_copysign_v2f32_v2f64:
22 ; CHECK-NEXT: ptrue p0.d
23 ; CHECK-NEXT: and z0.s, z0.s, #0x7fffffff
24 ; CHECK-NEXT: fcvt z1.s, p0/m, z1.d
25 ; CHECK-NEXT: and z1.s, z1.s, #0x80000000
26 ; CHECK-NEXT: orr z0.d, z0.d, z1.d
28 %tmp0 = fptrunc <vscale x 2 x double> %b to <vscale x 2 x float>
29 %r = call <vscale x 2 x float> @llvm.copysign.v2f32(<vscale x 2 x float> %a, <vscale x 2 x float> %tmp0)
30 ret <vscale x 2 x float> %r
33 declare <vscale x 2 x float> @llvm.copysign.v2f32(<vscale x 2 x float> %a, <vscale x 2 x float> %b) #0
37 define <vscale x 4 x float> @test_copysign_v4f32_v4f32(<vscale x 4 x float> %a, <vscale x 4 x float> %b) #0 {
38 ; CHECK-LABEL: test_copysign_v4f32_v4f32:
40 ; CHECK-NEXT: and z1.s, z1.s, #0x80000000
41 ; CHECK-NEXT: and z0.s, z0.s, #0x7fffffff
42 ; CHECK-NEXT: orr z0.d, z0.d, z1.d
44 %r = call <vscale x 4 x float> @llvm.copysign.v4f32(<vscale x 4 x float> %a, <vscale x 4 x float> %b)
45 ret <vscale x 4 x float> %r
49 define <vscale x 4 x float> @test_copysign_v4f32_v4f64(<vscale x 4 x float> %a, <vscale x 4 x double> %b) #0 {
50 ; CHECK-LABEL: test_copysign_v4f32_v4f64:
52 ; CHECK-NEXT: ptrue p0.d
53 ; CHECK-NEXT: and z0.s, z0.s, #0x7fffffff
54 ; CHECK-NEXT: fcvt z2.s, p0/m, z2.d
55 ; CHECK-NEXT: fcvt z1.s, p0/m, z1.d
56 ; CHECK-NEXT: uzp1 z1.s, z1.s, z2.s
57 ; CHECK-NEXT: and z1.s, z1.s, #0x80000000
58 ; CHECK-NEXT: orr z0.d, z0.d, z1.d
60 %tmp0 = fptrunc <vscale x 4 x double> %b to <vscale x 4 x float>
61 %r = call <vscale x 4 x float> @llvm.copysign.v4f32(<vscale x 4 x float> %a, <vscale x 4 x float> %tmp0)
62 ret <vscale x 4 x float> %r
65 declare <vscale x 4 x float> @llvm.copysign.v4f32(<vscale x 4 x float> %a, <vscale x 4 x float> %b) #0
69 define <vscale x 2 x double> @test_copysign_v2f64_v232(<vscale x 2 x double> %a, <vscale x 2 x float> %b) #0 {
70 ; CHECK-LABEL: test_copysign_v2f64_v232:
72 ; CHECK-NEXT: ptrue p0.d
73 ; CHECK-NEXT: and z0.d, z0.d, #0x7fffffffffffffff
74 ; CHECK-NEXT: fcvt z1.d, p0/m, z1.s
75 ; CHECK-NEXT: and z1.d, z1.d, #0x8000000000000000
76 ; CHECK-NEXT: orr z0.d, z0.d, z1.d
78 %tmp0 = fpext <vscale x 2 x float> %b to <vscale x 2 x double>
79 %r = call <vscale x 2 x double> @llvm.copysign.v2f64(<vscale x 2 x double> %a, <vscale x 2 x double> %tmp0)
80 ret <vscale x 2 x double> %r
83 define <vscale x 2 x double> @test_copysign_v2f64_v2f64(<vscale x 2 x double> %a, <vscale x 2 x double> %b) #0 {
84 ; CHECK-LABEL: test_copysign_v2f64_v2f64:
86 ; CHECK-NEXT: and z1.d, z1.d, #0x8000000000000000
87 ; CHECK-NEXT: and z0.d, z0.d, #0x7fffffffffffffff
88 ; CHECK-NEXT: orr z0.d, z0.d, z1.d
90 %r = call <vscale x 2 x double> @llvm.copysign.v2f64(<vscale x 2 x double> %a, <vscale x 2 x double> %b)
91 ret <vscale x 2 x double> %r
94 declare <vscale x 2 x double> @llvm.copysign.v2f64(<vscale x 2 x double> %a, <vscale x 2 x double> %b) #0
98 ; SplitVecRes mismatched
99 define <vscale x 4 x double> @test_copysign_v4f64_v4f32(<vscale x 4 x double> %a, <vscale x 4 x float> %b) #0 {
100 ; CHECK-LABEL: test_copysign_v4f64_v4f32:
102 ; CHECK-NEXT: ptrue p0.d
103 ; CHECK-NEXT: uunpkhi z3.d, z2.s
104 ; CHECK-NEXT: uunpklo z2.d, z2.s
105 ; CHECK-NEXT: fcvt z3.d, p0/m, z3.s
106 ; CHECK-NEXT: fcvt z2.d, p0/m, z2.s
107 ; CHECK-NEXT: and z0.d, z0.d, #0x7fffffffffffffff
108 ; CHECK-NEXT: and z2.d, z2.d, #0x8000000000000000
109 ; CHECK-NEXT: and z3.d, z3.d, #0x8000000000000000
110 ; CHECK-NEXT: and z1.d, z1.d, #0x7fffffffffffffff
111 ; CHECK-NEXT: orr z0.d, z0.d, z2.d
112 ; CHECK-NEXT: orr z1.d, z1.d, z3.d
114 %tmp0 = fpext <vscale x 4 x float> %b to <vscale x 4 x double>
115 %r = call <vscale x 4 x double> @llvm.copysign.v4f64(<vscale x 4 x double> %a, <vscale x 4 x double> %tmp0)
116 ret <vscale x 4 x double> %r
120 define <vscale x 4 x double> @test_copysign_v4f64_v4f64(<vscale x 4 x double> %a, <vscale x 4 x double> %b) #0 {
121 ; CHECK-LABEL: test_copysign_v4f64_v4f64:
123 ; CHECK-NEXT: and z2.d, z2.d, #0x8000000000000000
124 ; CHECK-NEXT: and z0.d, z0.d, #0x7fffffffffffffff
125 ; CHECK-NEXT: and z3.d, z3.d, #0x8000000000000000
126 ; CHECK-NEXT: and z1.d, z1.d, #0x7fffffffffffffff
127 ; CHECK-NEXT: orr z0.d, z0.d, z2.d
128 ; CHECK-NEXT: orr z1.d, z1.d, z3.d
130 %r = call <vscale x 4 x double> @llvm.copysign.v4f64(<vscale x 4 x double> %a, <vscale x 4 x double> %b)
131 ret <vscale x 4 x double> %r
134 declare <vscale x 4 x double> @llvm.copysign.v4f64(<vscale x 4 x double> %a, <vscale x 4 x double> %b) #0
138 define <vscale x 4 x half> @test_copysign_v4f16_v4f16(<vscale x 4 x half> %a, <vscale x 4 x half> %b) #0 {
139 ; CHECK-LABEL: test_copysign_v4f16_v4f16:
141 ; CHECK-NEXT: and z1.h, z1.h, #0x8000
142 ; CHECK-NEXT: and z0.h, z0.h, #0x7fff
143 ; CHECK-NEXT: orr z0.d, z0.d, z1.d
145 %r = call <vscale x 4 x half> @llvm.copysign.v4f16(<vscale x 4 x half> %a, <vscale x 4 x half> %b)
146 ret <vscale x 4 x half> %r
149 define <vscale x 4 x half> @test_copysign_v4f16_v4f32(<vscale x 4 x half> %a, <vscale x 4 x float> %b) #0 {
150 ; CHECK-LABEL: test_copysign_v4f16_v4f32:
152 ; CHECK-NEXT: ptrue p0.s
153 ; CHECK-NEXT: and z0.h, z0.h, #0x7fff
154 ; CHECK-NEXT: fcvt z1.h, p0/m, z1.s
155 ; CHECK-NEXT: and z1.h, z1.h, #0x8000
156 ; CHECK-NEXT: orr z0.d, z0.d, z1.d
158 %tmp0 = fptrunc <vscale x 4 x float> %b to <vscale x 4 x half>
159 %r = call <vscale x 4 x half> @llvm.copysign.v4f16(<vscale x 4 x half> %a, <vscale x 4 x half> %tmp0)
160 ret <vscale x 4 x half> %r
163 define <vscale x 4 x half> @test_copysign_v4f16_v4f64(<vscale x 4 x half> %a, <vscale x 4 x double> %b) #0 {
164 ; CHECK-LABEL: test_copysign_v4f16_v4f64:
166 ; CHECK-NEXT: ptrue p0.d
167 ; CHECK-NEXT: and z0.h, z0.h, #0x7fff
168 ; CHECK-NEXT: fcvt z2.h, p0/m, z2.d
169 ; CHECK-NEXT: fcvt z1.h, p0/m, z1.d
170 ; CHECK-NEXT: uzp1 z1.s, z1.s, z2.s
171 ; CHECK-NEXT: and z1.h, z1.h, #0x8000
172 ; CHECK-NEXT: orr z0.d, z0.d, z1.d
174 %tmp0 = fptrunc <vscale x 4 x double> %b to <vscale x 4 x half>
175 %r = call <vscale x 4 x half> @llvm.copysign.v4f16(<vscale x 4 x half> %a, <vscale x 4 x half> %tmp0)
176 ret <vscale x 4 x half> %r
179 declare <vscale x 4 x half> @llvm.copysign.v4f16(<vscale x 4 x half> %a, <vscale x 4 x half> %b) #0
183 define <vscale x 8 x half> @test_copysign_v8f16_v8f16(<vscale x 8 x half> %a, <vscale x 8 x half> %b) #0 {
184 ; CHECK-LABEL: test_copysign_v8f16_v8f16:
186 ; CHECK-NEXT: and z1.h, z1.h, #0x8000
187 ; CHECK-NEXT: and z0.h, z0.h, #0x7fff
188 ; CHECK-NEXT: orr z0.d, z0.d, z1.d
190 %r = call <vscale x 8 x half> @llvm.copysign.v8f16(<vscale x 8 x half> %a, <vscale x 8 x half> %b)
191 ret <vscale x 8 x half> %r
194 define <vscale x 8 x half> @test_copysign_v8f16_v8f32(<vscale x 8 x half> %a, <vscale x 8 x float> %b) #0 {
195 ; CHECK-LABEL: test_copysign_v8f16_v8f32:
197 ; CHECK-NEXT: ptrue p0.s
198 ; CHECK-NEXT: and z0.h, z0.h, #0x7fff
199 ; CHECK-NEXT: fcvt z2.h, p0/m, z2.s
200 ; CHECK-NEXT: fcvt z1.h, p0/m, z1.s
201 ; CHECK-NEXT: uzp1 z1.h, z1.h, z2.h
202 ; CHECK-NEXT: and z1.h, z1.h, #0x8000
203 ; CHECK-NEXT: orr z0.d, z0.d, z1.d
205 %tmp0 = fptrunc <vscale x 8 x float> %b to <vscale x 8 x half>
206 %r = call <vscale x 8 x half> @llvm.copysign.v8f16(<vscale x 8 x half> %a, <vscale x 8 x half> %tmp0)
207 ret <vscale x 8 x half> %r
211 ;========== FCOPYSIGN_EXTEND_ROUND
213 define <vscale x 4 x half> @test_copysign_nxv4f32_nxv4f16(<vscale x 4 x float> %a, <vscale x 4 x float> %b) #0 {
214 ; CHECK-LABEL: test_copysign_nxv4f32_nxv4f16:
216 ; CHECK-NEXT: ptrue p0.s
217 ; CHECK-NEXT: fcvt z0.h, p0/m, z0.s
218 ; CHECK-NEXT: fcvt z1.h, p0/m, z1.s
219 ; CHECK-NEXT: and z1.h, z1.h, #0x8000
220 ; CHECK-NEXT: and z0.h, z0.h, #0x7fff
221 ; CHECK-NEXT: orr z0.d, z0.d, z1.d
223 %t1 = call <vscale x 4 x float> @llvm.copysign.v4f32(<vscale x 4 x float> %a, <vscale x 4 x float> %b)
224 %t2 = fptrunc <vscale x 4 x float> %t1 to <vscale x 4 x half>
225 ret <vscale x 4 x half> %t2
228 define <vscale x 2 x float> @test_copysign_nxv2f64_nxv2f32(<vscale x 2 x double> %a, <vscale x 2 x double> %b) #0 {
229 ; CHECK-LABEL: test_copysign_nxv2f64_nxv2f32:
231 ; CHECK-NEXT: ptrue p0.d
232 ; CHECK-NEXT: fcvt z0.s, p0/m, z0.d
233 ; CHECK-NEXT: fcvt z1.s, p0/m, z1.d
234 ; CHECK-NEXT: and z1.s, z1.s, #0x80000000
235 ; CHECK-NEXT: and z0.s, z0.s, #0x7fffffff
236 ; CHECK-NEXT: orr z0.d, z0.d, z1.d
238 %t1 = call <vscale x 2 x double> @llvm.copysign.v2f64(<vscale x 2 x double> %a, <vscale x 2 x double> %b)
239 %t2 = fptrunc <vscale x 2 x double> %t1 to <vscale x 2 x float>
240 ret <vscale x 2 x float> %t2
243 declare <vscale x 8 x half> @llvm.copysign.v8f16(<vscale x 8 x half> %a, <vscale x 8 x half> %b) #0
245 attributes #0 = { nounwind }