2 /****************************************************************************
3 * Copyright (C) 2003-2006 by XGI Technology, Taiwan.
5 * All Rights Reserved. *
7 * Permission is hereby granted, free of charge, to any person obtaining
8 * a copy of this software and associated documentation files (the
9 * "Software"), to deal in the Software without restriction, including
10 * without limitation on the rights to use, copy, modify, merge,
11 * publish, distribute, sublicense, and/or sell copies of the Software,
12 * and to permit persons to whom the Software is furnished to do so,
13 * subject to the following conditions:
15 * The above copyright notice and this permission notice (including the
16 * next paragraph) shall be included in all copies or substantial
17 * portions of the Software.
19 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
20 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
21 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
22 * NON-INFRINGEMENT. IN NO EVENT SHALL XGI AND/OR
23 * ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
24 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
25 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
26 * DEALINGS IN THE SOFTWARE.
27 ***************************************************************************/
32 #define XGI_MAJOR_VERSION 0
33 #define XGI_MINOR_VERSION 7
34 #define XGI_PATCHLEVEL 5
36 #define XGI_DRV_VERSION "0.7.5"
39 #define XGI_DRV_NAME "xgi"
43 * xgi reserved major device number, Set this to 0 to
44 * request dynamic major number allocation.
47 #define XGI_DEV_MAJOR 0
50 #ifndef XGI_MAX_DEVICES
51 #define XGI_MAX_DEVICES 1
55 /* #define XGI_DEBUG */
57 #ifndef PCI_VENDOR_ID_XGI
59 #define PCI_VENDOR_ID_XGI 0x1023
61 #define PCI_VENDOR_ID_XGI 0x18CA
65 #ifndef PCI_DEVICE_ID_XP5
66 #define PCI_DEVICE_ID_XP5 0x2200
69 #ifndef PCI_DEVICE_ID_XG47
70 #define PCI_DEVICE_ID_XG47 0x0047
73 /* Macros to make printk easier */
74 #define XGI_ERROR(fmt, arg...) \
75 printk(KERN_ERR "[" XGI_DRV_NAME ":%s] *ERROR* " fmt, __FUNCTION__, ##arg)
77 #define XGI_MEM_ERROR(area, fmt, arg...) \
78 printk(KERN_ERR "[" XGI_DRV_NAME ":%s] *ERROR* " fmt, __FUNCTION__, ##arg)
80 /* #define XGI_DEBUG */
83 #define XGI_INFO(fmt, arg...) \
84 printk(KERN_ALERT "[" XGI_DRV_NAME ":%s] " fmt, __FUNCTION__, ##arg)
85 /* printk(KERN_INFO "[" XGI_DRV_NAME ":%s] " fmt, __FUNCTION__, ##arg) */
87 #define XGI_INFO(fmt, arg...) do { } while (0)
90 /* device name length; must be atleast 8 */
91 #define XGI_DEVICE_NAME_LENGTH 40
93 /* need a fake device number for control device; just to flag it for msgs */
94 #define XGI_CONTROL_DEVICE_NUMBER 100
102 struct xgi_screen_info {
110 struct xgi_sarea_info {
119 int bus; /* PCI config info */
125 /* physical characteristics */
126 struct xgi_aperture mmio;
127 struct xgi_aperture fb;
128 struct xgi_aperture pcie;
129 struct xgi_screen_info scrn_info;
130 struct xgi_sarea_info sarea_info;
132 /* look up table parameters */
134 unsigned int lutPageSize;
135 unsigned int lutPageOrder;
137 unsigned int sdfbPageSize;
145 /* keep track of any pending bottom halfes */
146 struct tasklet_struct tasklet;
148 spinlock_t info_lock;
150 struct semaphore info_sem;
151 struct semaphore fb_sem;
152 struct semaphore pcie_sem;
155 struct xgi_ioctl_post_vbios {
160 enum xgi_mem_location {
161 XGI_MEMLOC_NON_LOCAL = 0,
162 XGI_MEMLOC_LOCAL = 1,
163 XGI_MEMLOC_INVALID = 0x7fffffff
169 PCIE_3D should not begin with 1,
170 2D alloc pcie memory will use owner 1.
172 PCIE_3D = 11, /*vetex buf */
173 PCIE_3D_CMDLIST = 12,
174 PCIE_3D_SCRATCHPAD = 13,
175 PCIE_3D_TEXTURE = 14,
176 PCIE_INVALID = 0x7fffffff
182 struct xgi_mem_alloc {
183 unsigned int location;
185 unsigned int is_front;
189 * Address of the memory from the graphics hardware's point of view.
194 * Physical address of the memory from the processor's point of view.
196 unsigned long bus_addr;
199 struct xgi_chip_info {
201 char device_name[32];
203 U32 curr_display_mode; //Singe, DualView(Contained), MHS
209 struct xgi_opengl_cmd {
213 struct xgi_mmio_info {
214 struct xgi_opengl_cmd cmd_head;
224 BTYPE_NONE = 0x7fffffff
227 struct xgi_cmd_info {
228 BATCH_TYPE _firstBeginType;
236 struct xgi_state_info {
242 struct list_head list;
243 enum xgi_mem_location location;
244 unsigned long bus_addr;
252 #define XGI_IOCTL_MAGIC 'x' /* use 'x' as magic number */
254 #define XGI_IOCTL_BASE 0
255 #define XGI_ESC_DEVICE_INFO (XGI_IOCTL_BASE + 0)
256 #define XGI_ESC_POST_VBIOS (XGI_IOCTL_BASE + 1)
258 #define XGI_ESC_FB_INIT (XGI_IOCTL_BASE + 2)
259 #define XGI_ESC_FB_ALLOC (XGI_IOCTL_BASE + 3)
260 #define XGI_ESC_FB_FREE (XGI_IOCTL_BASE + 4)
261 #define XGI_ESC_PCIE_INIT (XGI_IOCTL_BASE + 5)
262 #define XGI_ESC_PCIE_ALLOC (XGI_IOCTL_BASE + 6)
263 #define XGI_ESC_PCIE_FREE (XGI_IOCTL_BASE + 7)
264 #define XGI_ESC_SUBMIT_CMDLIST (XGI_IOCTL_BASE + 8)
265 #define XGI_ESC_PUT_SCREEN_INFO (XGI_IOCTL_BASE + 9)
266 #define XGI_ESC_GET_SCREEN_INFO (XGI_IOCTL_BASE + 10)
267 #define XGI_ESC_GE_RESET (XGI_IOCTL_BASE + 11)
268 #define XGI_ESC_SAREA_INFO (XGI_IOCTL_BASE + 12)
269 #define XGI_ESC_DUMP_REGISTER (XGI_IOCTL_BASE + 13)
270 #define XGI_ESC_DEBUG_INFO (XGI_IOCTL_BASE + 14)
271 #define XGI_ESC_TEST_RWINKERNEL (XGI_IOCTL_BASE + 16)
272 #define XGI_ESC_STATE_CHANGE (XGI_IOCTL_BASE + 17)
273 #define XGI_ESC_MMIO_INFO (XGI_IOCTL_BASE + 18)
274 #define XGI_ESC_PCIE_CHECK (XGI_IOCTL_BASE + 19)
275 #define XGI_ESC_MEM_COLLECT (XGI_IOCTL_BASE + 20)
277 #define XGI_IOCTL_DEVICE_INFO _IOR(XGI_IOCTL_MAGIC, XGI_ESC_DEVICE_INFO, struct xgi_chip_info)
278 #define XGI_IOCTL_POST_VBIOS _IO(XGI_IOCTL_MAGIC, XGI_ESC_POST_VBIOS)
280 #define XGI_IOCTL_FB_INIT _IO(XGI_IOCTL_MAGIC, XGI_ESC_FB_INIT)
281 #define XGI_IOCTL_FB_ALLOC _IOWR(XGI_IOCTL_MAGIC, XGI_ESC_FB_ALLOC, struct xgi_mem_alloc)
282 #define XGI_IOCTL_FB_FREE _IOW(XGI_IOCTL_MAGIC, XGI_ESC_FB_FREE, unsigned long)
284 #define XGI_IOCTL_PCIE_INIT _IO(XGI_IOCTL_MAGIC, XGI_ESC_PCIE_INIT)
285 #define XGI_IOCTL_PCIE_ALLOC _IOWR(XGI_IOCTL_MAGIC, XGI_ESC_PCIE_ALLOC, struct xgi_mem_alloc)
286 #define XGI_IOCTL_PCIE_FREE _IOW(XGI_IOCTL_MAGIC, XGI_ESC_PCIE_FREE, unsigned long)
288 #define XGI_IOCTL_PUT_SCREEN_INFO _IOW(XGI_IOCTL_MAGIC, XGI_ESC_PUT_SCREEN_INFO, struct xgi_screen_info)
289 #define XGI_IOCTL_GET_SCREEN_INFO _IOR(XGI_IOCTL_MAGIC, XGI_ESC_GET_SCREEN_INFO, struct xgi_screen_info)
291 #define XGI_IOCTL_GE_RESET _IO(XGI_IOCTL_MAGIC, XGI_ESC_GE_RESET)
292 #define XGI_IOCTL_SAREA_INFO _IOW(XGI_IOCTL_MAGIC, XGI_ESC_SAREA_INFO, struct xgi_sarea_info)
293 #define XGI_IOCTL_DUMP_REGISTER _IO(XGI_IOCTL_MAGIC, XGI_ESC_DUMP_REGISTER)
294 #define XGI_IOCTL_DEBUG_INFO _IO(XGI_IOCTL_MAGIC, XGI_ESC_DEBUG_INFO)
295 #define XGI_IOCTL_MMIO_INFO _IOR(XGI_IOCTL_MAGIC, XGI_ESC_MMIO_INFO, struct xgi_mmio_info)
297 #define XGI_IOCTL_SUBMIT_CMDLIST _IOWR(XGI_IOCTL_MAGIC, XGI_ESC_SUBMIT_CMDLIST, struct xgi_cmd_info)
298 #define XGI_IOCTL_TEST_RWINKERNEL _IOWR(XGI_IOCTL_MAGIC, XGI_ESC_TEST_RWINKERNEL, unsigned long)
299 #define XGI_IOCTL_STATE_CHANGE _IOWR(XGI_IOCTL_MAGIC, XGI_ESC_STATE_CHANGE, struct xgi_state_info)
301 #define XGI_IOCTL_PCIE_CHECK _IO(XGI_IOCTL_MAGIC, XGI_ESC_PCIE_CHECK)
302 #define XGI_IOCTL_MAXNR 30
307 #define XGI_FLAG_OPEN 0x0001
308 #define XGI_FLAG_NEEDS_POSTING 0x0002
309 #define XGI_FLAG_WAS_POSTED 0x0004
310 #define XGI_FLAG_CONTROL 0x0010
311 #define XGI_FLAG_MAP_REGS_EARLY 0x0200
313 /* mmap(2) offsets */
315 #define IS_IO_OFFSET(info, offset, length) \
316 (((offset) >= (info)->mmio.base) \
317 && (((offset) + (length)) <= (info)->mmio.base + (info)->mmio.size))
319 /* Jong 06/14/2006 */
320 /* (info)->fb.base is a base address for physical (bus) address space */
321 /* what's the definition of offest? on physical (bus) address space or HW address space */
322 /* Jong 06/15/2006; use HW address space */
323 #define IS_FB_OFFSET(info, offset, length) \
325 && (((offset) + (length)) <= (info)->fb.size))
327 #define IS_FB_OFFSET(info, offset, length) \
328 (((offset) >= (info)->fb.base) \
329 && (((offset) + (length)) <= (info)->fb.base + (info)->fb.size))
332 #define IS_PCIE_OFFSET(info, offset, length) \
333 (((offset) >= (info)->pcie.base) \
334 && (((offset) + (length)) <= (info)->pcie.base + (info)->pcie.size))
336 extern int xgi_fb_heap_init(struct xgi_info * info);
337 extern void xgi_fb_heap_cleanup(struct xgi_info * info);
339 extern void xgi_fb_alloc(struct xgi_info * info, struct xgi_mem_alloc * alloc,
341 extern void xgi_fb_free(struct xgi_info * info, unsigned long offset);
342 extern void xgi_mem_collect(struct xgi_info * info, unsigned int *pcnt);
344 extern int xgi_pcie_heap_init(struct xgi_info * info);
345 extern void xgi_pcie_heap_cleanup(struct xgi_info * info);
347 extern void xgi_pcie_alloc(struct xgi_info * info,
348 struct xgi_mem_alloc * alloc, pid_t pid);
349 extern void xgi_pcie_free(struct xgi_info * info, unsigned long offset);
350 extern void xgi_pcie_heap_check(void);
351 extern struct xgi_pcie_block *xgi_find_pcie_block(struct xgi_info * info,
352 unsigned long address);
353 extern void *xgi_find_pcie_virt(struct xgi_info * info, unsigned long address);
355 extern void xgi_test_rwinkernel(struct xgi_info * info, unsigned long address);