linux-core/via_dmablit.c

   1 /* via_dmablit.c -- PCI DMA BitBlt support for the VIA Unichrome/Pro
   2  *
   3  * Copyright (C) 2005 Thomas Hellstrom, All Rights Reserved.
   4  *
   5  * Permission is hereby granted, free of charge, to any person obtaining a
   6  * copy of this software and associated documentation files (the "Software"),
   7  * to deal in the Software without restriction, including without limitation
   8  * the rights to use, copy, modify, merge, publish, distribute, sub license,
   9  * and/or sell copies of the Software, and to permit persons to whom the
  10  * Software is furnished to do so, subject to the following conditions:
  11  *
  12  * The above copyright notice and this permission notice (including the
  13  * next paragraph) shall be included in all copies or substantial portions
  14  * of the Software.
  15  *
  16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18  * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
  19  * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
  20  * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
  21  * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
  22  * USE OR OTHER DEALINGS IN THE SOFTWARE.
  23  *
  24  * Authors:
  25  *    Thomas Hellstrom.
  26  *    Partially based on code obtained from Digeo Inc.
  27  */
  28
  29
  30 /*
  31  * Unmaps the DMA mappings.
  32  * FIXME: Is this a NoOp on x86? Also
  33  * FIXME: What happens if this one is called and a pending blit has previously done
  34  * the same DMA mappings?
  35  */
  36
  37 #include "drmP.h"
  38 #include "via_drm.h"
  39 #include "via_drv.h"
  40 #include "via_dmablit.h"
  41
  42 #include <linux/pagemap.h>
  43
  44 #define VIA_PGDN(x)             (((unsigned long)(x)) & PAGE_MASK)
  45 #define VIA_PGOFF(x)            (((unsigned long)(x)) & ~PAGE_MASK)
  46 #define VIA_PFN(x)              ((unsigned long)(x) >> PAGE_SHIFT)
  47
  48 typedef struct _drm_via_descriptor {
  49         uint32_t mem_addr;
  50         uint32_t dev_addr;
  51         uint32_t size;
  52         uint32_t next;
  53 } drm_via_descriptor_t;
  54
  55
  56 /*
  57  * Unmap a DMA mapping.
  58  */
  59
  60
  61
  62 static void
  63 via_unmap_blit_from_device(struct pci_dev *pdev, drm_via_sg_info_t *vsg)
  64 {
  65         int num_desc = vsg->num_desc;
  66         unsigned cur_descriptor_page = num_desc / vsg->descriptors_per_page;
  67         unsigned descriptor_this_page = num_desc % vsg->descriptors_per_page;
  68         drm_via_descriptor_t *desc_ptr = vsg->desc_pages[cur_descriptor_page] +
  69                 descriptor_this_page;
  70         dma_addr_t next = vsg->chain_start;
  71
  72         while(num_desc--) {
  73                 if (descriptor_this_page-- == 0) {
  74                         cur_descriptor_page--;
  75                         descriptor_this_page = vsg->descriptors_per_page - 1;
  76                         desc_ptr = vsg->desc_pages[cur_descriptor_page] +
  77                                 descriptor_this_page;
  78                 }
  79                 dma_unmap_single(&pdev->dev, next, sizeof(*desc_ptr), DMA_TO_DEVICE);
  80                 dma_unmap_page(&pdev->dev, desc_ptr->mem_addr, desc_ptr->size, vsg->direction);
  81                 next = (dma_addr_t) desc_ptr->next;
  82                 desc_ptr--;
  83         }
  84 }
  85
  86 /*
  87  * If mode = 0, count how many descriptors are needed.
  88  * If mode = 1, Map the DMA pages for the device, put together and map also the descriptors.
  89  * Descriptors are run in reverse order by the hardware because we are not allowed to update the
  90  * 'next' field without syncing calls when the descriptor is already mapped.
  91  */
  92
  93 static void
  94 via_map_blit_for_device(struct pci_dev *pdev,
  95                    const drm_via_dmablit_t *xfer,
  96                    drm_via_sg_info_t *vsg,
  97                    int mode)
  98 {
  99         unsigned cur_descriptor_page = 0;
 100         unsigned num_descriptors_this_page = 0;
 101         unsigned char *mem_addr = xfer->mem_addr;
 102         unsigned char *cur_mem;
 103         unsigned char *first_addr = (unsigned char *)VIA_PGDN(mem_addr);
 104         uint32_t fb_addr = xfer->fb_addr;
 105         uint32_t cur_fb;
 106         unsigned long line_len;
 107         unsigned remaining_len;
 108         int num_desc = 0;
 109         int cur_line;
 110         dma_addr_t next = 0 | VIA_DMA_DPR_EC;
 111         drm_via_descriptor_t *desc_ptr = NULL;
 112
 113         if (mode == 1)
 114                 desc_ptr = vsg->desc_pages[cur_descriptor_page];
 115
 116         for (cur_line = 0; cur_line < xfer->num_lines; ++cur_line) {
 117
 118                 line_len = xfer->line_length;
 119                 cur_fb = fb_addr;
 120                 cur_mem = mem_addr;
 121
 122                 while (line_len > 0) {
 123
 124                         remaining_len = min(PAGE_SIZE-VIA_PGOFF(cur_mem), line_len);
 125                         line_len -= remaining_len;
 126
 127                         if (mode == 1) {
 128                                 desc_ptr->mem_addr = dma_map_page(&pdev->dev,
 129                                         vsg->pages[VIA_PFN(cur_mem) -
 130                                         VIA_PFN(first_addr)],
 131                                         VIA_PGOFF(cur_mem), remaining_len,
 132                                         vsg->direction);
 133                                 desc_ptr->dev_addr = cur_fb;
 134
 135                                 desc_ptr->size = remaining_len;
 136                                 desc_ptr->next = (uint32_t) next;
 137                                 next = dma_map_single(&pdev->dev, desc_ptr, sizeof(*desc_ptr),
 138                                                       DMA_TO_DEVICE);
 139                                 desc_ptr++;
 140                                 if (++num_descriptors_this_page >= vsg->descriptors_per_page) {
 141                                         num_descriptors_this_page = 0;
 142                                         desc_ptr = vsg->desc_pages[++cur_descriptor_page];
 143                                 }
 144                         }
 145
 146                         num_desc++;
 147                         cur_mem += remaining_len;
 148                         cur_fb += remaining_len;
 149                 }
 150
 151                 mem_addr += xfer->mem_stride;
 152                 fb_addr += xfer->fb_stride;
 153         }
 154
 155         if (mode == 1) {
 156                 vsg->chain_start = next;
 157                 vsg->state = dr_via_device_mapped;
 158         }
 159         vsg->num_desc = num_desc;
 160 }
 161
 162 /*
 163  * Function that frees up all resources for a blit. It is usable even if the
 164  * blit info has only been partially built as long as the status enum is consistent
 165  * with the actual status of the used resources.
 166  */
 167
 168
 169 static void
 170 via_free_sg_info(struct pci_dev *pdev, drm_via_sg_info_t *vsg)
 171 {
 172         struct page *page;
 173         int i;
 174
 175         switch(vsg->state) {
 176         case dr_via_device_mapped:
 177                 via_unmap_blit_from_device(pdev, vsg);
 178         case dr_via_desc_pages_alloc:
 179                 for (i=0; i<vsg->num_desc_pages; ++i) {
 180                         if (vsg->desc_pages[i] != NULL)
 181                           free_page((unsigned long)vsg->desc_pages[i]);
 182                 }
 183                 kfree(vsg->desc_pages);
 184         case dr_via_pages_locked:
 185                 for (i=0; i<vsg->num_pages; ++i) {
 186                         if ( NULL != (page = vsg->pages[i])) {
 187                                 if (! PageReserved(page) && (DMA_FROM_DEVICE == vsg->direction))
 188                                         SetPageDirty(page);
 189                                 page_cache_release(page);
 190                         }
 191                 }
 192         case dr_via_pages_alloc:
 193                 vfree(vsg->pages);
 194         default:
 195                 vsg->state = dr_via_sg_init;
 196         }
 197         if (vsg->bounce_buffer) {
 198                 vfree(vsg->bounce_buffer);
 199                 vsg->bounce_buffer = NULL;
 200         }
 201         vsg->free_on_sequence = 0;
 202 }
 203
 204 /*
 205  * Fire a blit engine.
 206  */
 207
 208 static void
 209 via_fire_dmablit(struct drm_device *dev, drm_via_sg_info_t *vsg, int engine)
 210 {
 211         drm_via_private_t *dev_priv = (drm_via_private_t *)dev->dev_private;
 212
 213         VIA_WRITE(VIA_PCI_DMA_MAR0 + engine*0x10, 0);
 214         VIA_WRITE(VIA_PCI_DMA_DAR0 + engine*0x10, 0);
 215         VIA_WRITE(VIA_PCI_DMA_CSR0 + engine*0x04, VIA_DMA_CSR_DD | VIA_DMA_CSR_TD |
 216                   VIA_DMA_CSR_DE);
 217         VIA_WRITE(VIA_PCI_DMA_MR0  + engine*0x04, VIA_DMA_MR_CM | VIA_DMA_MR_TDIE);
 218         VIA_WRITE(VIA_PCI_DMA_BCR0 + engine*0x10, 0);
 219         VIA_WRITE(VIA_PCI_DMA_DPR0 + engine*0x10, vsg->chain_start);
 220         DRM_WRITEMEMORYBARRIER();
 221         VIA_WRITE(VIA_PCI_DMA_CSR0 + engine*0x04, VIA_DMA_CSR_DE | VIA_DMA_CSR_TS);
 222         VIA_READ(VIA_PCI_DMA_CSR0 + engine*0x04);
 223 }
 224
 225 /*
 226  * Obtain a page pointer array and lock all pages into system memory. A segmentation violation will
 227  * occur here if the calling user does not have access to the submitted address.
 228  */
 229
 230 static int
 231 via_lock_all_dma_pages(drm_via_sg_info_t *vsg,  drm_via_dmablit_t *xfer)
 232 {
 233         int ret;
 234         unsigned long first_pfn = VIA_PFN(xfer->mem_addr);
 235         vsg->num_pages = VIA_PFN(xfer->mem_addr + (xfer->num_lines * xfer->mem_stride -1)) -
 236                 first_pfn + 1;
 237
 238         if (NULL == (vsg->pages = vmalloc(sizeof(struct page *) * vsg->num_pages)))
 239                 return -ENOMEM;
 240         memset(vsg->pages, 0, sizeof(struct page *) * vsg->num_pages);
 241         down_read(&current->mm->mmap_sem);
 242         ret = get_user_pages(current, current->mm,
 243                              (unsigned long)xfer->mem_addr,
 244                              vsg->num_pages,
 245                              (vsg->direction == DMA_FROM_DEVICE),
 246                              0, vsg->pages, NULL);
 247
 248         up_read(&current->mm->mmap_sem);
 249         if (ret != vsg->num_pages) {
 250                 if (ret < 0)
 251                         return ret;
 252                 vsg->state = dr_via_pages_locked;
 253                 return -EINVAL;
 254         }
 255         vsg->state = dr_via_pages_locked;
 256         DRM_DEBUG("DMA pages locked\n");
 257         return 0;
 258 }
 259
 260 /*
 261  * Allocate DMA capable memory for the blit descriptor chain, and an array that keeps track of the
 262  * pages we allocate. We don't want to use kmalloc for the descriptor chain because it may be
 263  * quite large for some blits, and pages don't need to be contingous.
 264  */
 265
 266 static int
 267 via_alloc_desc_pages(drm_via_sg_info_t *vsg)
 268 {
 269         int i;
 270
 271         vsg->descriptors_per_page = PAGE_SIZE / sizeof( drm_via_descriptor_t);
 272         vsg->num_desc_pages = (vsg->num_desc + vsg->descriptors_per_page - 1) /
 273                 vsg->descriptors_per_page;
 274
 275         if (NULL ==  (vsg->desc_pages = kmalloc(sizeof(void *) * vsg->num_desc_pages, GFP_KERNEL)))
 276                 return -ENOMEM;
 277
 278         memset(vsg->desc_pages, 0, sizeof(void *) * vsg->num_desc_pages);
 279         vsg->state = dr_via_desc_pages_alloc;
 280         for (i=0; i<vsg->num_desc_pages; ++i) {
 281                 if (NULL == (vsg->desc_pages[i] =
 282                              (drm_via_descriptor_t *) __get_free_page(GFP_KERNEL)))
 283                         return -ENOMEM;
 284         }
 285         DRM_DEBUG("Allocated %d pages for %d descriptors.\n", vsg->num_desc_pages,
 286                   vsg->num_desc);
 287         return 0;
 288 }
 289
 290 static void
 291 via_abort_dmablit(struct drm_device *dev, int engine)
 292 {
 293         drm_via_private_t *dev_priv = (drm_via_private_t *)dev->dev_private;
 294
 295         VIA_WRITE(VIA_PCI_DMA_CSR0 + engine*0x04, VIA_DMA_CSR_TA);
 296 }
 297
 298 static void
 299 via_dmablit_engine_off(struct drm_device *dev, int engine)
 300 {
 301         drm_via_private_t *dev_priv = (drm_via_private_t *)dev->dev_private;
 302
 303         VIA_WRITE(VIA_PCI_DMA_CSR0 + engine*0x04, VIA_DMA_CSR_TD | VIA_DMA_CSR_DD);
 304 }
 305
 306
 307
 308 /*
 309  * The dmablit part of the IRQ handler. Trying to do only reasonably fast things here.
 310  * The rest, like unmapping and freeing memory for done blits is done in a separate workqueue
 311  * task. Basically the task of the interrupt handler is to submit a new blit to the engine, while
 312  * the workqueue task takes care of processing associated with the old blit.
 313  */
 314
 315 void
 316 via_dmablit_handler(struct drm_device *dev, int engine, int from_irq)
 317 {
 318         drm_via_private_t *dev_priv = (drm_via_private_t *)dev->dev_private;
 319         drm_via_blitq_t *blitq = dev_priv->blit_queues + engine;
 320         int cur;
 321         int done_transfer;
 322         unsigned long irqsave=0;
 323         uint32_t status = 0;
 324
 325         DRM_DEBUG("DMA blit handler called. engine = %d, from_irq = %d, blitq = 0x%lx\n",
 326                   engine, from_irq, (unsigned long) blitq);
 327
 328         if (from_irq) {
 329                 spin_lock(&blitq->blit_lock);
 330         } else {
 331                 spin_lock_irqsave(&blitq->blit_lock, irqsave);
 332         }
 333
 334         done_transfer = blitq->is_active &&
 335           (( status = VIA_READ(VIA_PCI_DMA_CSR0 + engine*0x04)) & VIA_DMA_CSR_TD);
 336         done_transfer = done_transfer || ( blitq->aborting && !(status & VIA_DMA_CSR_DE));
 337
 338         cur = blitq->cur;
 339         if (done_transfer) {
 340
 341                 blitq->blits[cur]->aborted = blitq->aborting;
 342                 blitq->done_blit_handle++;
 343                 DRM_WAKEUP(blitq->blit_queue + cur);
 344
 345                 cur++;
 346                 if (cur >= VIA_NUM_BLIT_SLOTS)
 347                         cur = 0;
 348                 blitq->cur = cur;
 349
 350                 /*
 351                  * Clear transfer done flag.
 352                  */
 353
 354                 VIA_WRITE(VIA_PCI_DMA_CSR0 + engine*0x04,  VIA_DMA_CSR_TD);
 355
 356                 blitq->is_active = 0;
 357                 blitq->aborting = 0;
 358                 schedule_work(&blitq->wq);
 359
 360         } else if (blitq->is_active && time_after_eq(jiffies, blitq->end)) {
 361
 362                 /*
 363                  * Abort transfer after one second.
 364                  */
 365
 366                 via_abort_dmablit(dev, engine);
 367                 blitq->aborting = 1;
 368                 blitq->end = jiffies + DRM_HZ;
 369         }
 370
 371         if (!blitq->is_active) {
 372                 if (blitq->num_outstanding) {
 373                         via_fire_dmablit(dev, blitq->blits[cur], engine);
 374                         blitq->is_active = 1;
 375                         blitq->cur = cur;
 376                         blitq->num_outstanding--;
 377                         blitq->end = jiffies + DRM_HZ;
 378                         if (!timer_pending(&blitq->poll_timer)) {
 379                                 blitq->poll_timer.expires = jiffies+1;
 380                                 add_timer(&blitq->poll_timer);
 381                         }
 382                 } else {
 383                         if (timer_pending(&blitq->poll_timer)) {
 384                                 del_timer(&blitq->poll_timer);
 385                         }
 386                         via_dmablit_engine_off(dev, engine);
 387                 }
 388         }
 389
 390         if (from_irq) {
 391                 spin_unlock(&blitq->blit_lock);
 392         } else {
 393                 spin_unlock_irqrestore(&blitq->blit_lock, irqsave);
 394         }
 395 }
 396
 397
 398
 399 /*
 400  * Check whether this blit is still active, performing necessary locking.
 401  */
 402
 403 static int
 404 via_dmablit_active(drm_via_blitq_t *blitq, int engine, uint32_t handle, wait_queue_head_t **queue)
 405 {
 406         unsigned long irqsave;
 407         uint32_t slot;
 408         int active;
 409
 410         spin_lock_irqsave(&blitq->blit_lock, irqsave);
 411
 412         /*
 413          * Allow for handle wraparounds.
 414          */
 415
 416         active = ((blitq->done_blit_handle - handle) > (1 << 23)) &&
 417                 ((blitq->cur_blit_handle - handle) <= (1 << 23));
 418
 419         if (queue && active) {
 420                 slot = handle - blitq->done_blit_handle + blitq->cur -1;
 421                 if (slot >= VIA_NUM_BLIT_SLOTS) {
 422                         slot -= VIA_NUM_BLIT_SLOTS;
 423                 }
 424                 *queue = blitq->blit_queue + slot;
 425         }
 426
 427         spin_unlock_irqrestore(&blitq->blit_lock, irqsave);
 428
 429         return active;
 430 }
 431
 432 /*
 433  * Sync. Wait for at least three seconds for the blit to be performed.
 434  */
 435
 436 static int
 437 via_dmablit_sync(struct drm_device *dev, uint32_t handle, int engine)
 438 {
 439
 440         drm_via_private_t *dev_priv = (drm_via_private_t *)dev->dev_private;
 441         drm_via_blitq_t *blitq = dev_priv->blit_queues + engine;
 442         wait_queue_head_t *queue;
 443         int ret = 0;
 444
 445         if (via_dmablit_active(blitq, engine, handle, &queue)) {
 446                 DRM_WAIT_ON(ret, *queue, 3 * DRM_HZ,
 447                             !via_dmablit_active(blitq, engine, handle, NULL));
 448         }
 449         DRM_DEBUG("DMA blit sync handle 0x%x engine %d returned %d\n",
 450                   handle, engine, ret);
 451
 452         return ret;
 453 }
 454
 455
 456 /*
 457  * A timer that regularly polls the blit engine in cases where we don't have interrupts:
 458  * a) Broken hardware (typically those that don't have any video capture facility).
 459  * b) Blit abort. The hardware doesn't send an interrupt when a blit is aborted.
 460  * The timer and hardware IRQ's can and do work in parallel. If the hardware has
 461  * irqs, it will shorten the latency somewhat.
 462  */
 463
 464
 465
 466 static void
 467 via_dmablit_timer(unsigned long data)
 468 {
 469         drm_via_blitq_t *blitq = (drm_via_blitq_t *) data;
 470         struct drm_device *dev = blitq->dev;
 471         int engine = (int)
 472                 (blitq - ((drm_via_private_t *)dev->dev_private)->blit_queues);
 473
 474         DRM_DEBUG("Polling timer called for engine %d, jiffies %lu\n", engine,
 475                   (unsigned long) jiffies);
 476
 477         via_dmablit_handler(dev, engine, 0);
 478
 479         if (!timer_pending(&blitq->poll_timer)) {
 480                 blitq->poll_timer.expires = jiffies+1;
 481                 add_timer(&blitq->poll_timer);
 482
 483                 /*
 484                  * Rerun handler to delete timer if engines are off, and
 485                  * to shorten abort latency. This is a little nasty.
 486                  */
 487
 488                 via_dmablit_handler(dev, engine, 0);
 489         }
 490 }
 491
 492
 493
 494
 495 /*
 496  * Workqueue task that frees data and mappings associated with a blit.
 497  * Also wakes up waiting processes. Each of these tasks handles one
 498  * blit engine only and may not be called on each interrupt.
 499  */
 500
 501
 502 static void
 503 #if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,20)
 504 via_dmablit_workqueue(void *data)
 505 #else
 506 via_dmablit_workqueue(struct work_struct *work)
 507 #endif
 508 {
 509 #if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,20)
 510         drm_via_blitq_t *blitq = (drm_via_blitq_t *) data;
 511 #else
 512         drm_via_blitq_t *blitq = container_of(work, drm_via_blitq_t, wq);
 513 #endif
 514         struct drm_device *dev = blitq->dev;
 515         unsigned long irqsave;
 516         drm_via_sg_info_t *cur_sg;
 517         int cur_released;
 518
 519
 520         DRM_DEBUG("Workqueue task called for blit engine %ld\n",(unsigned long)
 521                   (blitq - ((drm_via_private_t *)dev->dev_private)->blit_queues));
 522
 523         spin_lock_irqsave(&blitq->blit_lock, irqsave);
 524
 525         while(blitq->serviced != blitq->cur) {
 526
 527                 cur_released = blitq->serviced++;
 528
 529                 DRM_DEBUG("Releasing blit slot %d\n", cur_released);
 530
 531                 if (blitq->serviced >= VIA_NUM_BLIT_SLOTS)
 532                         blitq->serviced = 0;
 533
 534                 cur_sg = blitq->blits[cur_released];
 535                 blitq->num_free++;
 536
 537                 spin_unlock_irqrestore(&blitq->blit_lock, irqsave);
 538
 539                 DRM_WAKEUP(&blitq->busy_queue);
 540
 541                 via_free_sg_info(dev->pdev, cur_sg);
 542                 kfree(cur_sg);
 543
 544                 spin_lock_irqsave(&blitq->blit_lock, irqsave);
 545         }
 546
 547         spin_unlock_irqrestore(&blitq->blit_lock, irqsave);
 548 }
 549
 550
 551 /*
 552  * Init all blit engines. Currently we use two, but some hardware have 4.
 553  */
 554
 555
 556 void
 557 via_init_dmablit(struct drm_device *dev)
 558 {
 559         int i,j;
 560         drm_via_private_t *dev_priv = (drm_via_private_t *)dev->dev_private;
 561         drm_via_blitq_t *blitq;
 562
 563         pci_set_master(dev->pdev);
 564
 565         for (i=0; i< VIA_NUM_BLIT_ENGINES; ++i) {
 566                 blitq = dev_priv->blit_queues + i;
 567                 blitq->dev = dev;
 568                 blitq->cur_blit_handle = 0;
 569                 blitq->done_blit_handle = 0;
 570                 blitq->head = 0;
 571                 blitq->cur = 0;
 572                 blitq->serviced = 0;
 573                 blitq->num_free = VIA_NUM_BLIT_SLOTS - 1;
 574                 blitq->num_outstanding = 0;
 575                 blitq->is_active = 0;
 576                 blitq->aborting = 0;
 577                 spin_lock_init(&blitq->blit_lock);
 578                 for (j=0; j<VIA_NUM_BLIT_SLOTS; ++j) {
 579                         DRM_INIT_WAITQUEUE(blitq->blit_queue + j);
 580                 }
 581                 DRM_INIT_WAITQUEUE(&blitq->busy_queue);
 582 #if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,20)
 583                 INIT_WORK(&blitq->wq, via_dmablit_workqueue, blitq);
 584 #else
 585                 INIT_WORK(&blitq->wq, via_dmablit_workqueue);
 586 #endif
 587                 init_timer(&blitq->poll_timer);
 588                 blitq->poll_timer.function = &via_dmablit_timer;
 589                 blitq->poll_timer.data = (unsigned long) blitq;
 590         }
 591 }
 592
 593 /*
 594  * Build all info and do all mappings required for a blit.
 595  */
 596
 597
 598 static int
 599 via_build_sg_info(struct drm_device *dev, drm_via_sg_info_t *vsg, drm_via_dmablit_t *xfer)
 600 {
 601         int draw = xfer->to_fb;
 602         int ret = 0;
 603
 604         vsg->direction = (draw) ? DMA_TO_DEVICE : DMA_FROM_DEVICE;
 605         vsg->bounce_buffer = NULL;
 606
 607         vsg->state = dr_via_sg_init;
 608
 609         if (xfer->num_lines <= 0 || xfer->line_length <= 0) {
 610                 DRM_ERROR("Zero size bitblt.\n");
 611                 return -EINVAL;
 612         }
 613
 614         /*
 615          * Below check is a driver limitation, not a hardware one. We
 616          * don't want to lock unused pages, and don't want to incoporate the
 617          * extra logic of avoiding them. Make sure there are no.
 618          * (Not a big limitation anyway.)
 619          */
 620
 621         if ((xfer->mem_stride - xfer->line_length) > 2*PAGE_SIZE) {
 622                 DRM_ERROR("Too large system memory stride. Stride: %d, "
 623                           "Length: %d\n", xfer->mem_stride, xfer->line_length);
 624                 return -EINVAL;
 625         }
 626
 627         if ((xfer->mem_stride == xfer->line_length) &&
 628             (xfer->fb_stride == xfer->line_length)) {
 629                 xfer->mem_stride *= xfer->num_lines;
 630                 xfer->line_length = xfer->mem_stride;
 631                 xfer->fb_stride = xfer->mem_stride;
 632                 xfer->num_lines = 1;
 633         }
 634
 635         /*
 636          * Don't lock an arbitrary large number of pages, since that causes a
 637          * DOS security hole.
 638          */
 639
 640         if (xfer->num_lines > 2048 || (xfer->num_lines*xfer->mem_stride > (2048*2048*4))) {
 641                 DRM_ERROR("Too large PCI DMA bitblt.\n");
 642                 return -EINVAL;
 643         }
 644
 645         /*
 646          * we allow a negative fb stride to allow flipping of images in
 647          * transfer.
 648          */
 649
 650         if (xfer->mem_stride < xfer->line_length ||
 651             abs(xfer->fb_stride) < xfer->line_length) {
 652                 DRM_ERROR("Invalid frame-buffer / memory stride.\n");
 653                 return -EINVAL;
 654         }
 655
 656         /*
 657          * A hardware bug seems to be worked around if system memory addresses start on
 658          * 16 byte boundaries. This seems a bit restrictive however. VIA is contacted
 659          * about this. Meanwhile, impose the following restrictions:
 660          */
 661
 662 #ifdef VIA_BUGFREE
 663         if ((((unsigned long)xfer->mem_addr & 3) != ((unsigned long)xfer->fb_addr & 3)) ||
 664             ((xfer->num_lines > 1) && ((xfer->mem_stride & 3) != (xfer->fb_stride & 3)))) {
 665                 DRM_ERROR("Invalid DRM bitblt alignment.\n");
 666                 return -EINVAL;
 667         }
 668 #else
 669         if ((((unsigned long)xfer->mem_addr & 15) || ((unsigned long)xfer->fb_addr & 3)) ||
 670             ((xfer->num_lines > 1) && ((xfer->mem_stride & 15) || (xfer->fb_stride & 3)))) {
 671                 DRM_ERROR("Invalid DRM bitblt alignment.\n");
 672                 return -EINVAL;
 673         }
 674 #endif
 675
 676         if (0 != (ret = via_lock_all_dma_pages(vsg, xfer))) {
 677                 DRM_ERROR("Could not lock DMA pages.\n");
 678                 via_free_sg_info(dev->pdev, vsg);
 679                 return ret;
 680         }
 681
 682         via_map_blit_for_device(dev->pdev, xfer, vsg, 0);
 683         if (0 != (ret = via_alloc_desc_pages(vsg))) {
 684                 DRM_ERROR("Could not allocate DMA descriptor pages.\n");
 685                 via_free_sg_info(dev->pdev, vsg);
 686                 return ret;
 687         }
 688         via_map_blit_for_device(dev->pdev, xfer, vsg, 1);
 689
 690         return 0;
 691 }
 692
 693
 694 /*
 695  * Reserve one free slot in the blit queue. Will wait for one second for one
 696  * to become available. Otherwise -EBUSY is returned.
 697  */
 698
 699 static int
 700 via_dmablit_grab_slot(drm_via_blitq_t *blitq, int engine)
 701 {
 702         int ret=0;
 703         unsigned long irqsave;
 704
 705         DRM_DEBUG("Num free is %d\n", blitq->num_free);
 706         spin_lock_irqsave(&blitq->blit_lock, irqsave);
 707         while(blitq->num_free == 0) {
 708                 spin_unlock_irqrestore(&blitq->blit_lock, irqsave);
 709
 710                 DRM_WAIT_ON(ret, blitq->busy_queue, DRM_HZ, blitq->num_free > 0);
 711                 if (ret) {
 712                         return (-EINTR == ret) ? -EAGAIN : ret;
 713                 }
 714
 715                 spin_lock_irqsave(&blitq->blit_lock, irqsave);
 716         }
 717
 718         blitq->num_free--;
 719         spin_unlock_irqrestore(&blitq->blit_lock, irqsave);
 720
 721         return 0;
 722 }
 723
 724 /*
 725  * Hand back a free slot if we changed our mind.
 726  */
 727
 728 static void
 729 via_dmablit_release_slot(drm_via_blitq_t *blitq)
 730 {
 731         unsigned long irqsave;
 732
 733         spin_lock_irqsave(&blitq->blit_lock, irqsave);
 734         blitq->num_free++;
 735         spin_unlock_irqrestore(&blitq->blit_lock, irqsave);
 736         DRM_WAKEUP( &blitq->busy_queue );
 737 }
 738
 739 /*
 740  * Grab a free slot. Build blit info and queue a blit.
 741  */
 742
 743
 744 static int
 745 via_dmablit(struct drm_device *dev, drm_via_dmablit_t *xfer)
 746 {
 747         drm_via_private_t *dev_priv = (drm_via_private_t *)dev->dev_private;
 748         drm_via_sg_info_t *vsg;
 749         drm_via_blitq_t *blitq;
 750         int ret;
 751         int engine;
 752         unsigned long irqsave;
 753
 754         if (dev_priv == NULL) {
 755                 DRM_ERROR("Called without initialization.\n");
 756                 return -EINVAL;
 757         }
 758
 759         engine = (xfer->to_fb) ? 0 : 1;
 760         blitq = dev_priv->blit_queues + engine;
 761         if (0 != (ret = via_dmablit_grab_slot(blitq, engine))) {
 762                 return ret;
 763         }
 764         if (NULL == (vsg = kmalloc(sizeof(*vsg), GFP_KERNEL))) {
 765                 via_dmablit_release_slot(blitq);
 766                 return -ENOMEM;
 767         }
 768         if (0 != (ret = via_build_sg_info(dev, vsg, xfer))) {
 769                 via_dmablit_release_slot(blitq);
 770                 kfree(vsg);
 771                 return ret;
 772         }
 773         spin_lock_irqsave(&blitq->blit_lock, irqsave);
 774
 775         blitq->blits[blitq->head++] = vsg;
 776         if (blitq->head >= VIA_NUM_BLIT_SLOTS)
 777                 blitq->head = 0;
 778         blitq->num_outstanding++;
 779         xfer->sync.sync_handle = ++blitq->cur_blit_handle;
 780
 781         spin_unlock_irqrestore(&blitq->blit_lock, irqsave);
 782         xfer->sync.engine = engine;
 783
 784         via_dmablit_handler(dev, engine, 0);
 785
 786         return 0;
 787 }
 788
 789 /*
 790  * Sync on a previously submitted blit. Note that the X server use signals extensively, and
 791  * that there is a very big probability that this IOCTL will be interrupted by a signal. In that
 792  * case it returns with -EAGAIN for the signal to be delivered.
 793  * The caller should then reissue the IOCTL. This is similar to what is being done for drmGetLock().
 794  */
 795
 796 int
 797 via_dma_blit_sync( struct drm_device *dev, void *data, struct drm_file *file_priv )
 798 {
 799         drm_via_blitsync_t *sync = data;
 800         int err;
 801
 802         if (sync->engine >= VIA_NUM_BLIT_ENGINES)
 803                 return -EINVAL;
 804
 805         err = via_dmablit_sync(dev, sync->sync_handle, sync->engine);
 806
 807         if (-EINTR == err)
 808                 err = -EAGAIN;
 809
 810         return err;
 811 }
 812
 813
 814 /*
 815  * Queue a blit and hand back a handle to be used for sync. This IOCTL may be interrupted by a signal
 816  * while waiting for a free slot in the blit queue. In that case it returns with -EAGAIN and should
 817  * be reissued. See the above IOCTL code.
 818  */
 819
 820 int
 821 via_dma_blit( struct drm_device *dev, void *data, struct drm_file *file_priv )
 822 {
 823         drm_via_dmablit_t *xfer = data;
 824         int err;
 825
 826         err = via_dmablit(dev, xfer);
 827
 828         return err;
 829 }