linux-core/radeon_display.c

   1 /*
   2  * Copyright 2007-8 Advanced Micro Devices, Inc.
   3  * Copyright 2008 Red Hat Inc.
   4  *
   5  * Permission is hereby granted, free of charge, to any person obtaining a
   6  * copy of this software and associated documentation files (the "Software"),
   7  * to deal in the Software without restriction, including without limitation
   8  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   9  * and/or sell copies of the Software, and to permit persons to whom the
  10  * Software is furnished to do so, subject to the following conditions:
  11  *
  12  * The above copyright notice and this permission notice shall be included in
  13  * all copies or substantial portions of the Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
  19  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  20  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  21  * OTHER DEALINGS IN THE SOFTWARE.
  22  *
  23  * Authors: Dave Airlie
  24  *          Alex Deucher
  25  */
  26 #include "drmP.h"
  27 #include "radeon_drm.h"
  28 #include "radeon_drv.h"
  29
  30 #include "atom.h"
  31 #include <asm/div64.h>
  32
  33 #include "drm_crtc_helper.h"
  34
  35 int radeon_ddc_dump(struct drm_connector *connector);
  36
  37
  38
  39 static void avivo_crtc_load_lut(struct drm_crtc *crtc)
  40 {
  41         struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc);
  42         struct drm_device *dev = crtc->dev;
  43         struct drm_radeon_private *dev_priv = dev->dev_private;
  44         int i;
  45
  46         DRM_DEBUG("%d\n", radeon_crtc->crtc_id);
  47         RADEON_WRITE(AVIVO_DC_LUTA_CONTROL + radeon_crtc->crtc_offset, 0);
  48
  49         RADEON_WRITE(AVIVO_DC_LUTA_BLACK_OFFSET_BLUE + radeon_crtc->crtc_offset, 0);
  50         RADEON_WRITE(AVIVO_DC_LUTA_BLACK_OFFSET_GREEN + radeon_crtc->crtc_offset, 0);
  51         RADEON_WRITE(AVIVO_DC_LUTA_BLACK_OFFSET_RED + radeon_crtc->crtc_offset, 0);
  52
  53         RADEON_WRITE(AVIVO_DC_LUTA_WHITE_OFFSET_BLUE + radeon_crtc->crtc_offset, 0xffff);
  54         RADEON_WRITE(AVIVO_DC_LUTA_WHITE_OFFSET_GREEN + radeon_crtc->crtc_offset, 0xffff);
  55         RADEON_WRITE(AVIVO_DC_LUTA_WHITE_OFFSET_RED + radeon_crtc->crtc_offset, 0xffff);
  56
  57         RADEON_WRITE(AVIVO_DC_LUT_RW_SELECT, radeon_crtc->crtc_id);
  58         RADEON_WRITE(AVIVO_DC_LUT_RW_MODE, 0);
  59         RADEON_WRITE(AVIVO_DC_LUT_WRITE_EN_MASK, 0x0000003f);
  60
  61         for (i = 0; i < 256; i++) {
  62                 RADEON_WRITE8(AVIVO_DC_LUT_RW_INDEX, i);
  63                 RADEON_WRITE(AVIVO_DC_LUT_30_COLOR,
  64                              (radeon_crtc->lut_r[i] << 22) |
  65                              (radeon_crtc->lut_g[i] << 12) |
  66                              (radeon_crtc->lut_b[i] << 2));
  67         }
  68
  69         RADEON_WRITE(AVIVO_D1GRPH_LUT_SEL + radeon_crtc->crtc_offset, radeon_crtc->crtc_id);
  70 }
  71
  72 static void legacy_crtc_load_lut(struct drm_crtc *crtc)
  73 {
  74         struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc);
  75         struct drm_device *dev = crtc->dev;
  76         struct drm_radeon_private *dev_priv = dev->dev_private;
  77         int i;
  78         uint32_t dac2_cntl;
  79
  80         dac2_cntl = RADEON_READ(RADEON_DAC_CNTL2);
  81         if (radeon_crtc->crtc_id == 0)
  82                 dac2_cntl &= (uint32_t)~RADEON_DAC2_PALETTE_ACC_CTL;
  83         else
  84                 dac2_cntl |= RADEON_DAC2_PALETTE_ACC_CTL;
  85         RADEON_WRITE(RADEON_DAC_CNTL2, dac2_cntl);
  86
  87         for (i = 0; i < 256; i++) {
  88                 RADEON_WRITE8(RADEON_PALETTE_INDEX, i);
  89                 RADEON_WRITE(RADEON_PALETTE_DATA,
  90                              (radeon_crtc->lut_r[i] << 16) |
  91                              (radeon_crtc->lut_g[i] << 8) |
  92                              (radeon_crtc->lut_b[i] << 0));
  93         }
  94 }
  95
  96 void radeon_crtc_load_lut(struct drm_crtc *crtc)
  97 {
  98         struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc);
  99         struct drm_device *dev = crtc->dev;
 100         struct drm_radeon_private *dev_priv = dev->dev_private;
 101
 102         if (!crtc->enabled)
 103                 return;
 104
 105         if (radeon_is_avivo(dev_priv))
 106                 avivo_crtc_load_lut(crtc);
 107         else
 108                 legacy_crtc_load_lut(crtc);
 109 }
 110
 111 /** Sets the color ramps on behalf of RandR */
 112 void radeon_crtc_fb_gamma_set(struct drm_crtc *crtc, u16 red, u16 green,
 113                               u16 blue, int regno)
 114 {
 115         struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc);
 116
 117         if (regno==0)
 118                 DRM_DEBUG("gamma set %d\n", radeon_crtc->crtc_id);
 119         radeon_crtc->lut_r[regno] = red >> 8;
 120         radeon_crtc->lut_g[regno] = green >> 8;
 121         radeon_crtc->lut_b[regno] = blue >> 8;
 122 }
 123
 124 static void radeon_crtc_gamma_set(struct drm_crtc *crtc, u16 *red, u16 *green,
 125                                   u16 *blue, uint32_t size)
 126 {
 127         struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc);
 128         int i, j;
 129
 130         if (size != 256)
 131                 return;
 132
 133         if (crtc->fb->depth == 16) {
 134                 for (i = 0; i < 64; i++) {
 135                         if (i <= 31) {
 136                                 for (j = 0; j < 8; j++) {
 137                                         radeon_crtc->lut_r[i * 8 + j] = red[i] >> 8;
 138                                         radeon_crtc->lut_b[i * 8 + j] = blue[i] >> 8;
 139                                 }
 140                         }
 141                         for (j = 0; j < 4; j++)
 142                                 radeon_crtc->lut_g[i * 4 + j] = green[i] >> 8;
 143                 }
 144         } else {
 145                 for (i = 0; i < 256; i++) {
 146                         radeon_crtc->lut_r[i] = red[i] >> 8;
 147                         radeon_crtc->lut_g[i] = green[i] >> 8;
 148                         radeon_crtc->lut_b[i] = blue[i] >> 8;
 149                 }
 150         }
 151
 152         radeon_crtc_load_lut(crtc);
 153 }
 154
 155 static void radeon_crtc_destroy(struct drm_crtc *crtc)
 156 {
 157         struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc);
 158
 159         drm_crtc_cleanup(crtc);
 160         kfree(radeon_crtc);
 161 }
 162
 163 static const struct drm_crtc_funcs radeon_crtc_funcs = {
 164         .cursor_set = radeon_crtc_cursor_set,
 165         .cursor_move = radeon_crtc_cursor_move,
 166         .gamma_set = radeon_crtc_gamma_set,
 167         .set_config = drm_crtc_helper_set_config,
 168         .destroy = radeon_crtc_destroy,
 169 };
 170
 171 static void radeon_crtc_init(struct drm_device *dev, int index)
 172 {
 173         struct drm_radeon_private *dev_priv = dev->dev_private;
 174         struct radeon_crtc *radeon_crtc;
 175         int i;
 176
 177         radeon_crtc = kzalloc(sizeof(struct radeon_crtc) + (RADEONFB_CONN_LIMIT * sizeof(struct drm_connector *)), GFP_KERNEL);
 178         //      radeon_crtc = kzalloc(sizeof(struct radeon_crtc), GFP_KERNEL);
 179         if (radeon_crtc == NULL)
 180                 return;
 181
 182         drm_crtc_init(dev, &radeon_crtc->base, &radeon_crtc_funcs);
 183
 184         drm_mode_crtc_set_gamma_size(&radeon_crtc->base, 256);
 185         radeon_crtc->crtc_id = index;
 186
 187         radeon_crtc->mode_set.crtc = &radeon_crtc->base;
 188         radeon_crtc->mode_set.connectors = (struct drm_connector **)(radeon_crtc + 1);
 189         radeon_crtc->mode_set.num_connectors = 0;
 190
 191         for (i = 0; i < 256; i++) {
 192                 radeon_crtc->lut_r[i] = i;
 193                 radeon_crtc->lut_g[i] = i;
 194                 radeon_crtc->lut_b[i] = i;
 195         }
 196
 197         if (dev_priv->is_atom_bios && dev_priv->chip_family > CHIP_RS690)
 198                 radeon_atombios_init_crtc(dev, radeon_crtc);
 199         else
 200                 radeon_legacy_init_crtc(dev, radeon_crtc);
 201 }
 202
 203 bool radeon_legacy_setup_enc_conn(struct drm_device *dev)
 204 {
 205
 206         radeon_get_legacy_connector_info_from_bios(dev);
 207         return false;
 208 }
 209
 210 bool radeon_setup_enc_conn(struct drm_device *dev)
 211 {
 212         struct drm_radeon_private *dev_priv = dev->dev_private;
 213         struct radeon_mode_info *mode_info = &dev_priv->mode_info;
 214         /* do all the mac and stuff */
 215         struct drm_connector *connector;
 216         struct drm_encoder *encoder;
 217         int i;
 218
 219         if (dev_priv->is_atom_bios)
 220                 radeon_get_atom_connector_info_from_bios_connector_table(dev);
 221         else
 222                 radeon_get_legacy_connector_info_from_bios(dev);
 223
 224         for (i = 0; i < RADEON_MAX_BIOS_CONNECTOR; i++) {
 225                 if (!mode_info->bios_connector[i].valid)
 226                         continue;
 227
 228                 /* add a connector for this */
 229                 if (mode_info->bios_connector[i].connector_type == CONNECTOR_NONE)
 230                         continue;
 231
 232                 connector = radeon_connector_add(dev, i);
 233                 if (!connector)
 234                         continue;
 235
 236                 encoder = NULL;
 237                 /* if we find an LVDS connector */
 238                 if (mode_info->bios_connector[i].connector_type == CONNECTOR_LVDS) {
 239                         if (radeon_is_avivo(dev_priv))
 240                                 encoder = radeon_encoder_lvtma_add(dev, i);
 241                         else
 242                                 encoder = radeon_encoder_legacy_lvds_add(dev, i);
 243                         if (encoder)
 244                                 drm_mode_connector_attach_encoder(connector, encoder);
 245                 }
 246
 247                 /* DAC on DVI or VGA */
 248                 if ((mode_info->bios_connector[i].connector_type == CONNECTOR_DVI_I) ||
 249                     (mode_info->bios_connector[i].connector_type == CONNECTOR_DVI_A) ||
 250                     (mode_info->bios_connector[i].connector_type == CONNECTOR_VGA)) {
 251                         if (radeon_is_avivo(dev_priv)) {
 252                                 encoder = radeon_encoder_atom_dac_add(dev, i, mode_info->bios_connector[i].dac_type, 0);
 253                         } else {
 254                                 if (mode_info->bios_connector[i].dac_type == DAC_PRIMARY)
 255                                         encoder = radeon_encoder_legacy_primary_dac_add(dev, i, 0);
 256                                 else if (mode_info->bios_connector[i].dac_type == DAC_TVDAC)
 257                                         encoder = radeon_encoder_legacy_tv_dac_add(dev, i, 0);
 258                         }
 259                         if (encoder)
 260                                 drm_mode_connector_attach_encoder(connector, encoder);
 261                 }
 262
 263                 /* TMDS on DVI */
 264                 if ((mode_info->bios_connector[i].connector_type == CONNECTOR_DVI_I) ||
 265                     (mode_info->bios_connector[i].connector_type == CONNECTOR_DVI_D)) {
 266                         if (radeon_is_avivo(dev_priv))
 267                                 encoder = radeon_encoder_atom_tmds_add(dev, i, mode_info->bios_connector[i].tmds_type);
 268                         else {
 269                                 if (mode_info->bios_connector[i].tmds_type == TMDS_INT)
 270                                         encoder = radeon_encoder_legacy_tmds_int_add(dev, i);
 271                                 else if (mode_info->bios_connector[i].dac_type == TMDS_EXT)
 272                                         encoder = radeon_encoder_legacy_tmds_ext_add(dev, i);
 273                         }
 274                         if (encoder)
 275                                 drm_mode_connector_attach_encoder(connector, encoder);
 276                 }
 277
 278                 /* TVDAC on DIN */
 279                 if (mode_info->bios_connector[i].connector_type == CONNECTOR_DIN) {
 280                         if (radeon_is_avivo(dev_priv))
 281                                 encoder = radeon_encoder_atom_dac_add(dev, i, mode_info->bios_connector[i].dac_type, 1);
 282                         else {
 283                                 if (mode_info->bios_connector[i].dac_type == DAC_TVDAC)
 284                                         encoder = radeon_encoder_legacy_tv_dac_add(dev, i, 0);
 285                         }
 286                         if (encoder)
 287                                 drm_mode_connector_attach_encoder(connector, encoder);
 288                 }
 289         }
 290
 291         list_for_each_entry(connector, &dev->mode_config.connector_list, head)
 292                 radeon_ddc_dump(connector);
 293         return true;
 294 }
 295
 296 int radeon_ddc_get_modes(struct radeon_connector *radeon_connector)
 297 {
 298         struct drm_radeon_private *dev_priv = radeon_connector->base.dev->dev_private;
 299         struct edid *edid;
 300         int ret = 0;
 301
 302         if (!radeon_connector->ddc_bus)
 303                 return -1;
 304         radeon_i2c_do_lock(radeon_connector, 1);
 305         edid = drm_get_edid(&radeon_connector->base, &radeon_connector->ddc_bus->adapter);
 306         radeon_i2c_do_lock(radeon_connector, 0);
 307         if (edid) {
 308                 drm_mode_connector_update_edid_property(&radeon_connector->base, edid);
 309                 ret = drm_add_edid_modes(&radeon_connector->base, edid);
 310                 kfree(edid);
 311                 return ret;
 312         }
 313         return -1;
 314 }
 315
 316 int radeon_ddc_dump(struct drm_connector *connector)
 317 {
 318         struct edid *edid;
 319         struct radeon_connector *radeon_connector = to_radeon_connector(connector);
 320         int ret = 0;
 321
 322         if (!radeon_connector->ddc_bus)
 323                 return -1;
 324         radeon_i2c_do_lock(radeon_connector, 1);
 325         edid = drm_get_edid(connector, &radeon_connector->ddc_bus->adapter);
 326         radeon_i2c_do_lock(radeon_connector, 0);
 327         if (edid) {
 328                 kfree(edid);
 329         }
 330         return ret;
 331 }
 332
 333 static inline uint32_t radeon_div(uint64_t n, uint32_t d)
 334 {
 335         uint64_t x, y, result;
 336         uint64_t mod;
 337
 338         n += d / 2;
 339
 340         mod = do_div(n, d);
 341         return n;
 342 }
 343
 344 void radeon_compute_pll(struct radeon_pll *pll,
 345                         uint64_t freq,
 346                         uint32_t *dot_clock_p,
 347                         uint32_t *fb_div_p,
 348                         uint32_t *ref_div_p,
 349                         uint32_t *post_div_p,
 350                         int flags)
 351 {
 352         uint32_t min_ref_div = pll->min_ref_div;
 353         uint32_t max_ref_div = pll->max_ref_div;
 354         uint32_t best_vco = pll->best_vco;
 355         uint32_t best_post_div = 1;
 356         uint32_t best_ref_div = 1;
 357         uint32_t best_feedback_div = 1;
 358         uint32_t best_freq = -1;
 359         uint32_t best_error = 0xffffffff;
 360         uint32_t best_vco_diff = 1;
 361         uint32_t post_div;
 362
 363         DRM_DEBUG("PLL freq %llu\n", freq);
 364         freq = freq * 1000;
 365
 366         if (flags & RADEON_PLL_USE_REF_DIV)
 367                 min_ref_div = max_ref_div = pll->reference_div;
 368         else {
 369                 while (min_ref_div < max_ref_div-1) {
 370                         uint32_t mid=(min_ref_div+max_ref_div)/2;
 371                         uint32_t pll_in = pll->reference_freq / mid;
 372                         if (pll_in < pll->pll_in_min)
 373                                 max_ref_div = mid;
 374                         else if (pll_in > pll->pll_in_max)
 375                                 min_ref_div = mid;
 376                         else
 377                                 break;
 378                 }
 379         }
 380
 381         for (post_div = pll->min_post_div; post_div <= pll->max_post_div; ++post_div) {
 382                 uint32_t ref_div;
 383
 384                 if ((flags & RADEON_PLL_NO_ODD_POST_DIV) && (post_div & 1))
 385                         continue;
 386
 387                 /* legacy radeons only have a few post_divs */
 388                 if (flags & RADEON_PLL_LEGACY) {
 389                         if ((post_div == 5) ||
 390                             (post_div == 7) ||
 391                             (post_div == 9) ||
 392                             (post_div == 10) ||
 393                             (post_div == 11))
 394                                 continue;
 395                 }
 396
 397                 for (ref_div = min_ref_div; ref_div <= max_ref_div; ++ref_div) {
 398                         uint32_t feedback_div, current_freq, error, vco_diff;
 399                         uint32_t pll_in = pll->reference_freq / ref_div;
 400                         uint32_t min_feed_div = pll->min_feedback_div;
 401                         uint32_t max_feed_div = pll->max_feedback_div+1;
 402
 403                         if (pll_in < pll->pll_in_min || pll_in > pll->pll_in_max)
 404                                 continue;
 405
 406                         while (min_feed_div < max_feed_div) {
 407                                 uint32_t vco;
 408                                 feedback_div = (min_feed_div+max_feed_div)/2;
 409
 410                                 vco = radeon_div((uint64_t)pll->reference_freq * feedback_div,
 411                                                  ref_div);
 412
 413                                 if (vco < pll->pll_out_min) {
 414                                         min_feed_div = feedback_div+1;
 415                                         continue;
 416                                 } else if(vco > pll->pll_out_max) {
 417                                         max_feed_div = feedback_div;
 418                                         continue;
 419                                 }
 420
 421                                 current_freq = radeon_div((uint64_t)pll->reference_freq * 10000 * feedback_div,
 422                                                           ref_div * post_div);
 423
 424                                 error = abs(current_freq - freq);
 425                                 vco_diff = abs(vco - best_vco);
 426
 427                                 if ((best_vco == 0 && error < best_error) ||
 428                                     (best_vco != 0 &&
 429                                      (error < best_error - 100 ||
 430                                       (abs(error - best_error) < 100 && vco_diff < best_vco_diff )))) {
 431                                         best_post_div = post_div;
 432                                         best_ref_div = ref_div;
 433                                         best_feedback_div = feedback_div;
 434                                         best_freq = current_freq;
 435                                         best_error = error;
 436                                         best_vco_diff = vco_diff;
 437                                 } else if (current_freq == freq) {
 438                                         if (best_freq == -1) {
 439                                                 best_post_div = post_div;
 440                                                 best_ref_div = ref_div;
 441                                                 best_feedback_div = feedback_div;
 442                                                 best_freq = current_freq;
 443                                                 best_error = error;
 444                                                 best_vco_diff = vco_diff;
 445                                         } else if ((flags & RADEON_PLL_PREFER_LOW_REF_DIV) && (ref_div < best_ref_div)) {
 446                                                 best_post_div = post_div;
 447                                                 best_ref_div = ref_div;
 448                                                 best_feedback_div = feedback_div;
 449                                                 best_freq = current_freq;
 450                                                 best_error = error;
 451                                                 best_vco_diff = vco_diff;
 452                                         }
 453                                 }
 454
 455                                 if (current_freq < freq)
 456                                         min_feed_div = feedback_div+1;
 457                                 else
 458                                         max_feed_div = feedback_div;
 459                         }
 460                 }
 461         }
 462
 463         *dot_clock_p = best_freq / 10000;
 464         *fb_div_p = best_feedback_div;
 465         *ref_div_p = best_ref_div;
 466         *post_div_p = best_post_div;
 467 }
 468
 469 void radeon_get_clock_info(struct drm_device *dev)
 470 {
 471         drm_radeon_private_t *dev_priv = dev->dev_private;
 472         struct radeon_pll *pll = &dev_priv->mode_info.pll;
 473         int ret;
 474
 475         if (dev_priv->is_atom_bios)
 476                 ret = radeon_atom_get_clock_info(dev);
 477         else
 478                 ret = radeon_combios_get_clock_info(dev);
 479
 480         if (ret) {
 481
 482                 if (pll->reference_div < 2) pll->reference_div = 12;
 483         } else {
 484                 // TODO FALLBACK
 485         }
 486
 487         if (radeon_is_avivo(dev_priv)) {
 488                 pll->min_post_div = 2;
 489                 pll->max_post_div = 0x7f;
 490         } else {
 491                 pll->min_post_div = 1;
 492                 pll->max_post_div = 12; // 16 on crtc 0??
 493         }
 494
 495         pll->min_ref_div = 2;
 496         pll->max_ref_div = 0x3ff;
 497         pll->min_feedback_div = 4;
 498         pll->max_feedback_div = 0x7ff;
 499         pll->best_vco = 0;
 500
 501 }
 502
 503 static void radeon_user_framebuffer_destroy(struct drm_framebuffer *fb)
 504 {
 505         struct radeon_framebuffer *radeon_fb = to_radeon_framebuffer(fb);
 506         struct drm_device *dev = fb->dev;
 507
 508         if (fb->fbdev)
 509                 radeonfb_remove(dev, fb);
 510
 511         drm_framebuffer_cleanup(fb);
 512         kfree(radeon_fb);
 513 }
 514
 515 static const struct drm_framebuffer_funcs radeon_fb_funcs = {
 516         .destroy = radeon_user_framebuffer_destroy,
 517 };
 518
 519 struct drm_framebuffer *radeon_user_framebuffer_create(struct drm_device *dev,
 520                                                        struct drm_file *filp,
 521                                                        struct drm_mode_fb_cmd *mode_cmd)
 522 {
 523
 524         struct radeon_framebuffer *radeon_fb;
 525
 526         radeon_fb = kzalloc(sizeof(*radeon_fb), GFP_KERNEL);
 527         if (!radeon_fb)
 528                 return NULL;
 529
 530         drm_framebuffer_init(dev, &radeon_fb->base, &radeon_fb_funcs);
 531         drm_helper_mode_fill_fb_struct(&radeon_fb->base, mode_cmd);
 532
 533         if (filp) {
 534                 radeon_fb->obj = drm_gem_object_lookup(dev, filp,
 535                                                        mode_cmd->handle);
 536                 if (!radeon_fb->obj) {
 537                         kfree(radeon_fb);
 538                         return NULL;
 539                 }
 540                 drm_gem_object_unreference(radeon_fb->obj);
 541         }
 542         return &radeon_fb->base;
 543 }
 544
 545 static const struct drm_mode_config_funcs radeon_mode_funcs = {
 546         .fb_create = radeon_user_framebuffer_create,
 547         .fb_changed = radeonfb_probe,
 548 };
 549
 550
 551 int radeon_modeset_init(struct drm_device *dev)
 552 {
 553         drm_radeon_private_t *dev_priv = dev->dev_private;
 554         static struct card_info card;
 555         size_t size;
 556         int num_crtc = 2, i;
 557         int ret;
 558
 559         drm_mode_config_init(dev);
 560
 561         dev->mode_config.funcs = (void *)&radeon_mode_funcs;
 562
 563         if (radeon_is_avivo(dev_priv)) {
 564                     dev->mode_config.max_width = 8192;
 565                     dev->mode_config.max_height = 8192;
 566         } else {
 567                     dev->mode_config.max_width = 4096;
 568                     dev->mode_config.max_height = 4096;
 569         }
 570
 571         dev->mode_config.fb_base = dev_priv->fb_aper_offset;
 572
 573         /* allocate crtcs - TODO single crtc */
 574         for (i = 0; i < num_crtc; i++) {
 575                 radeon_crtc_init(dev, i);
 576         }
 577
 578         /* okay we should have all the bios connectors */
 579
 580         ret = radeon_setup_enc_conn(dev);
 581
 582         if (!ret)
 583                 return ret;
 584
 585         drm_helper_initial_config(dev, false);
 586
 587         return 0;
 588 }
 589
 590
 591 int radeon_load_modeset_init(struct drm_device *dev)
 592 {
 593         int ret;
 594         ret = radeon_modeset_init(dev);
 595
 596         return ret;
 597 }
 598
 599 void radeon_modeset_cleanup(struct drm_device *dev)
 600 {
 601         drm_mode_config_cleanup(dev);
 602 }