linux-core/radeon_buffer.c

   1 /**************************************************************************
   2  *
   3  * Copyright 2007 Dave Airlie
   4  * All Rights Reserved.
   5  *
   6  * Permission is hereby granted, free of charge, to any person obtaining a
   7  * copy of this software and associated documentation files (the
   8  * "Software"), to deal in the Software without restriction, including
   9  * without limitation the rights to use, copy, modify, merge, publish,
  10  * distribute, sub license, and/or sell copies of the Software, and to
  11  * permit persons to whom the Software is furnished to do so, subject to
  12  * the following conditions:
  13  *
  14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  16  * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
  17  * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
  18  * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
  19  * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
  20  * USE OR OTHER DEALINGS IN THE SOFTWARE.
  21  *
  22  * The above copyright notice and this permission notice (including the
  23  * next paragraph) shall be included in all copies or substantial portions
  24  * of the Software.
  25  *
  26  *
  27  **************************************************************************/
  28 /*
  29  * Authors: Dave Airlie <airlied@linux.ie>
  30  */
  31
  32 #include "drmP.h"
  33 #include "radeon_drm.h"
  34 #include "radeon_drv.h"
  35
  36 struct drm_ttm_backend *radeon_create_ttm_backend_entry(struct drm_device * dev)
  37 {
  38         drm_radeon_private_t *dev_priv = dev->dev_private;
  39
  40         if(dev_priv->flags & RADEON_IS_AGP)
  41                 return drm_agp_init_ttm(dev);
  42         else
  43                 return ati_pcigart_init_ttm(dev, &dev_priv->gart_info, radeon_gart_flush);
  44 }
  45
  46 int radeon_fence_types(struct drm_buffer_object *bo, uint32_t * class, uint32_t * type)
  47 {
  48         *class = 0;
  49         *type = 1;
  50         return 0;
  51 }
  52
  53 int radeon_invalidate_caches(struct drm_device * dev, uint64_t flags)
  54 {
  55         drm_radeon_private_t *dev_priv = dev->dev_private;
  56         RING_LOCALS;
  57
  58         BEGIN_RING(4);
  59         RADEON_FLUSH_CACHE();
  60         RADEON_FLUSH_ZCACHE();
  61         ADVANCE_RING();
  62         return 0;
  63 }
  64
  65 int radeon_init_mem_type(struct drm_device * dev, uint32_t type,
  66                          struct drm_mem_type_manager * man)
  67 {
  68         drm_radeon_private_t *dev_priv = dev->dev_private;
  69
  70         switch (type) {
  71         case DRM_BO_MEM_LOCAL:
  72                 man->flags = _DRM_FLAG_MEMTYPE_MAPPABLE |
  73                     _DRM_FLAG_MEMTYPE_CACHED;
  74                 man->drm_bus_maptype = 0;
  75                 break;
  76         case DRM_BO_MEM_VRAM:
  77                 man->flags =  _DRM_FLAG_MEMTYPE_FIXED | _DRM_FLAG_MEMTYPE_MAPPABLE | _DRM_FLAG_NEEDS_IOREMAP;
  78                 man->io_addr = NULL;
  79                 man->drm_bus_maptype = _DRM_FRAME_BUFFER;
  80                 man->io_offset = drm_get_resource_start(dev, 0);
  81                 man->io_size = drm_get_resource_len(dev, 0);
  82                 break;
  83         case DRM_BO_MEM_TT:
  84                 if (dev_priv->flags & RADEON_IS_AGP) {
  85                         if (!(drm_core_has_AGP(dev) && dev->agp)) {
  86                                 DRM_ERROR("AGP is not enabled for memory type %u\n",
  87                                           (unsigned)type);
  88                                 return -EINVAL;
  89                         }
  90                         man->io_offset = dev->agp->agp_info.aper_base;
  91                         man->io_size = dev->agp->agp_info.aper_size * 1024 * 1024;
  92                         man->io_addr = NULL;
  93                         man->flags = _DRM_FLAG_MEMTYPE_MAPPABLE |
  94                                 _DRM_FLAG_MEMTYPE_CSELECT | _DRM_FLAG_NEEDS_IOREMAP;
  95                         man->drm_bus_maptype = _DRM_AGP;
  96                 } else {
  97                         man->io_offset = dev_priv->gart_vm_start;
  98                         man->io_size = dev_priv->gart_size;
  99                         man->io_addr = NULL;
 100                         man->flags = _DRM_FLAG_MEMTYPE_CSELECT | _DRM_FLAG_MEMTYPE_MAPPABLE | _DRM_FLAG_MEMTYPE_CMA;
 101                         man->drm_bus_maptype = _DRM_SCATTER_GATHER;
 102                 }
 103                 break;
 104         default:
 105                 DRM_ERROR("Unsupported memory type %u\n", (unsigned)type);
 106                 return -EINVAL;
 107         }
 108         return 0;
 109 }
 110
 111 static void radeon_emit_copy_blit(struct drm_device * dev,
 112                                   uint32_t src_offset,
 113                                   uint32_t dst_offset,
 114                                   uint32_t pages, int direction)
 115 {
 116         uint32_t cur_pages;
 117         uint32_t stride = PAGE_SIZE;
 118         drm_radeon_private_t *dev_priv = dev->dev_private;
 119         uint32_t format, height;
 120         RING_LOCALS;
 121
 122         if (!dev_priv)
 123                 return;
 124
 125         /* 32-bit copy format */
 126         format = RADEON_COLOR_FORMAT_ARGB8888;
 127
 128         /* radeon limited to 16k stride */
 129         stride &= 0x3fff;
 130         while(pages > 0) {
 131                 cur_pages = pages;
 132                 if (cur_pages > 2048)
 133                         cur_pages = 2048;
 134                 pages -= cur_pages;
 135
 136                 /* needs verification */
 137                 BEGIN_RING(7);
 138                 OUT_RING(CP_PACKET3(RADEON_CNTL_BITBLT_MULTI, 5));
 139                 OUT_RING(RADEON_GMC_SRC_PITCH_OFFSET_CNTL |
 140                          RADEON_GMC_DST_PITCH_OFFSET_CNTL |
 141                          RADEON_GMC_BRUSH_NONE |
 142                          (format << 8) |
 143                          RADEON_GMC_SRC_DATATYPE_COLOR |
 144                          RADEON_ROP3_S |
 145                          RADEON_DP_SRC_SOURCE_MEMORY |
 146                          RADEON_GMC_CLR_CMP_CNTL_DIS | RADEON_GMC_WR_MSK_DIS);
 147                 if (direction) {
 148                         OUT_RING((stride << 22) | (src_offset >> 10));
 149                         OUT_RING((stride << 22) | (dst_offset >> 10));
 150                 } else {
 151                         OUT_RING((stride << 22) | (dst_offset >> 10));
 152                         OUT_RING((stride << 22) | (src_offset >> 10));
 153                 }
 154                 OUT_RING(0);
 155                 OUT_RING(pages); /* x - y */
 156                 OUT_RING((stride << 16) | cur_pages);
 157                 ADVANCE_RING();
 158         }
 159
 160         BEGIN_RING(2);
 161         RADEON_WAIT_UNTIL_2D_IDLE();
 162         ADVANCE_RING();
 163
 164         return;
 165 }
 166
 167 static int radeon_move_blit(struct drm_buffer_object * bo,
 168                             int evict, int no_wait, struct drm_bo_mem_reg *new_mem)
 169 {
 170         struct drm_bo_mem_reg *old_mem = &bo->mem;
 171         int dir = 0;
 172
 173         if ((old_mem->mem_type == new_mem->mem_type) &&
 174             (new_mem->mm_node->start <
 175              old_mem->mm_node->start + old_mem->mm_node->size)) {
 176                 dir = 1;
 177         }
 178
 179         radeon_emit_copy_blit(bo->dev,
 180                               old_mem->mm_node->start << PAGE_SHIFT,
 181                               new_mem->mm_node->start << PAGE_SHIFT,
 182                               new_mem->num_pages, dir);
 183
 184
 185         return drm_bo_move_accel_cleanup(bo, evict, no_wait, 0,
 186                                          DRM_FENCE_TYPE_EXE, 0,
 187                                          new_mem);
 188 }
 189
 190 static int radeon_move_flip(struct drm_buffer_object * bo,
 191                             int evict, int no_wait, struct drm_bo_mem_reg * new_mem)
 192 {
 193         struct drm_device *dev = bo->dev;
 194         struct drm_bo_mem_reg tmp_mem;
 195         int ret;
 196
 197         tmp_mem = *new_mem;
 198         tmp_mem.mm_node = NULL;
 199         //      tmp_mem.mask = DRM_BO_FLAG_MEM_TT |
 200         //          DRM_BO_FLAG_CACHED | DRM_BO_FLAG_FORCE_CACHING;
 201
 202         ret = drm_bo_mem_space(bo, &tmp_mem, no_wait);
 203         if (ret)
 204                 return ret;
 205
 206         ret = drm_ttm_bind(bo->ttm, &tmp_mem);
 207         if (ret)
 208                 goto out_cleanup;
 209
 210         ret = radeon_move_blit(bo, 1, no_wait, &tmp_mem);
 211         if (ret)
 212                 goto out_cleanup;
 213
 214         ret = drm_bo_move_ttm(bo, evict, no_wait, new_mem);
 215 out_cleanup:
 216         if (tmp_mem.mm_node) {
 217                 mutex_lock(&dev->struct_mutex);
 218                 if (tmp_mem.mm_node != bo->pinned_node)
 219                         drm_memrange_put_block(tmp_mem.mm_node);
 220                 tmp_mem.mm_node = NULL;
 221                 mutex_unlock(&dev->struct_mutex);
 222         }
 223         return ret;
 224 }
 225
 226 int radeon_move(struct drm_buffer_object * bo,
 227                 int evict, int no_wait, struct drm_bo_mem_reg * new_mem)
 228 {
 229         struct drm_bo_mem_reg *old_mem = &bo->mem;
 230
 231         return drm_bo_move_memcpy(bo, evict, no_wait, new_mem);
 232 #if 0
 233         DRM_DEBUG("\n");
 234         if (old_mem->mem_type == DRM_BO_MEM_LOCAL) {
 235                 return drm_bo_move_memcpy(bo, evict, no_wait, new_mem);
 236         } else if (new_mem->mem_type == DRM_BO_MEM_LOCAL) {
 237                 if (radeon_move_flip(bo, evict, no_wait, new_mem))
 238                         return drm_bo_move_memcpy(bo, evict, no_wait, new_mem);
 239         } else {
 240                 if (radeon_move_blit(bo, evict, no_wait, new_mem))
 241                         return drm_bo_move_memcpy(bo, evict, no_wait, new_mem);
 242         }
 243         return 0;
 244 #endif
 245 }
 246
 247
 248 /*
 249  * i915_evict_flags:
 250  *
 251  * @bo: the buffer object to be evicted
 252  *
 253  * Return the bo flags for a buffer which is not mapped to the hardware.
 254  * These will be placed in proposed_flags so that when the move is
 255  * finished, they'll end up in bo->mem.flags
 256  */
 257 uint64_t radeon_evict_flags(struct drm_buffer_object *bo)
 258 {
 259         switch (bo->mem.mem_type) {
 260         case DRM_BO_MEM_LOCAL:
 261         case DRM_BO_MEM_TT:
 262                 return DRM_BO_FLAG_MEM_LOCAL;
 263         default:
 264                 return DRM_BO_FLAG_MEM_TT | DRM_BO_FLAG_CACHED;
 265         }
 266 }