linux-core/intel_crt.c

   1 /*
   2  * Copyright © 2006-2007 Intel Corporation
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
  21  * DEALINGS IN THE SOFTWARE.
  22  *
  23  * Authors:
  24  *      Eric Anholt <eric@anholt.net>
  25  */
  26
  27 #include <linux/i2c.h>
  28 #include "drmP.h"
  29 #include "drm.h"
  30 #include "drm_crtc.h"
  31 #include "intel_drv.h"
  32 #include "i915_drm.h"
  33 #include "i915_drv.h"
  34
  35 static void intel_crt_dpms(struct drm_output *output, int mode)
  36 {
  37         struct drm_device *dev = output->dev;
  38         struct drm_i915_private *dev_priv = dev->dev_private;
  39         u32 temp;
  40
  41         temp = I915_READ(ADPA);
  42         temp &= ~(ADPA_HSYNC_CNTL_DISABLE | ADPA_VSYNC_CNTL_DISABLE);
  43         temp &= ~ADPA_DAC_ENABLE;
  44
  45         switch(mode) {
  46         case DPMSModeOn:
  47                 temp |= ADPA_DAC_ENABLE;
  48                 break;
  49         case DPMSModeStandby:
  50                 temp |= ADPA_DAC_ENABLE | ADPA_HSYNC_CNTL_DISABLE;
  51                 break;
  52         case DPMSModeSuspend:
  53                 temp |= ADPA_DAC_ENABLE | ADPA_VSYNC_CNTL_DISABLE;
  54                 break;
  55         case DPMSModeOff:
  56                 temp |= ADPA_HSYNC_CNTL_DISABLE | ADPA_VSYNC_CNTL_DISABLE;
  57                 break;
  58         }
  59
  60         I915_WRITE(ADPA, temp);
  61 }
  62
  63 static void intel_crt_save(struct drm_output *output)
  64 {
  65
  66 }
  67
  68 static void intel_crt_restore(struct drm_output *output)
  69 {
  70
  71 }
  72
  73 static int intel_crt_mode_valid(struct drm_output *output,
  74                                 struct drm_display_mode *mode)
  75 {
  76         if (mode->flags & V_DBLSCAN)
  77                 return MODE_NO_DBLESCAN;
  78
  79         if (mode->clock > 400000 || mode->clock < 25000)
  80                 return MODE_CLOCK_RANGE;
  81
  82         return MODE_OK;
  83 }
  84
  85 static bool intel_crt_mode_fixup(struct drm_output *output,
  86                                  struct drm_display_mode *mode,
  87                                  struct drm_display_mode *adjusted_mode)
  88 {
  89         return true;
  90 }
  91
  92 static void intel_crt_mode_set(struct drm_output *output,
  93                                struct drm_display_mode *mode,
  94                                struct drm_display_mode *adjusted_mode)
  95 {
  96         struct drm_device *dev = output->dev;
  97         struct drm_crtc *crtc = output->crtc;
  98         struct intel_crtc *intel_crtc = crtc->driver_private;
  99         struct drm_i915_private *dev_priv = dev->dev_private;
 100         int dpll_md_reg;
 101         u32 adpa, dpll_md;
 102
 103         if (intel_crtc->pipe == 0)
 104                 dpll_md_reg = DPLL_A_MD;
 105         else
 106                 dpll_md_reg = DPLL_B_MD;
 107
 108         /*
 109          * Disable separate mode multiplier used when cloning SDVO to CRT
 110          * XXX this needs to be adjusted when we really are cloning
 111          */
 112         if (IS_I965G(dev)) {
 113                 dpll_md = I915_READ(dpll_md_reg);
 114                 I915_WRITE(dpll_md_reg,
 115                            dpll_md & ~DPLL_MD_UDI_MULTIPLIER_MASK);
 116         }
 117
 118         adpa = 0;
 119         if (adjusted_mode->flags & V_PHSYNC)
 120                 adpa |= ADPA_HSYNC_ACTIVE_HIGH;
 121         if (adjusted_mode->flags & V_PVSYNC)
 122                 adpa |= ADPA_VSYNC_ACTIVE_HIGH;
 123
 124         if (intel_crtc->pipe == 0)
 125                 adpa |= ADPA_PIPE_A_SELECT;
 126         else
 127                 adpa |= ADPA_PIPE_B_SELECT;
 128
 129         I915_WRITE(ADPA, adpa);
 130 }
 131
 132 /**
 133  * Uses CRT_HOTPLUG_EN and CRT_HOTPLUG_STAT to detect CRT presence.
 134  *
 135  * Only for I945G/GM.
 136  *
 137  * \return TRUE if CRT is connected.
 138  * \return FALSE if CRT is disconnected.
 139  */
 140 static bool intel_crt_detect_hotplug(struct drm_output *output)
 141 {
 142         struct drm_device *dev = output->dev;
 143         struct drm_i915_private *dev_priv = dev->dev_private;
 144         u32 temp;
 145 #if 1
 146         unsigned long timeout = jiffies + msecs_to_jiffies(1000);
 147
 148         temp = I915_READ(PORT_HOTPLUG_EN);
 149
 150         I915_WRITE(PORT_HOTPLUG_EN,
 151                    temp | CRT_HOTPLUG_FORCE_DETECT | (1 << 5));
 152
 153         do {
 154                 if (!(I915_READ(PORT_HOTPLUG_EN) & CRT_HOTPLUG_FORCE_DETECT))
 155                         break;
 156                 msleep(1);
 157         } while (time_after(timeout, jiffies));
 158
 159         if ((I915_READ(PORT_HOTPLUG_STAT) & CRT_HOTPLUG_MONITOR_MASK) ==
 160             CRT_HOTPLUG_MONITOR_COLOR)
 161                 return true;
 162
 163         return false;
 164 #else
 165         temp = I915_READ(PORT_HOTPLUG_STAT);
 166         DRM_DEBUG("HST 0x%08x\n", temp);
 167
 168         if (temp & (1 << 8) && temp & (1 << 9))
 169                 return true;
 170
 171         return false;
 172 #endif
 173 }
 174
 175 static bool intel_crt_detect_ddc(struct drm_output *output)
 176 {
 177         struct intel_output *intel_output = output->driver_private;
 178
 179         /* CRT should always be at 0, but check anyway */
 180         if (intel_output->type != INTEL_OUTPUT_ANALOG)
 181                 return false;
 182
 183         return intel_ddc_probe(output);
 184 }
 185
 186 static enum drm_output_status intel_crt_detect(struct drm_output *output)
 187 {
 188         struct drm_device *dev = output->dev;
 189
 190         if (IS_I945G(dev) || IS_I945GM(dev) || IS_I965G(dev)) {
 191                 if (intel_crt_detect_hotplug(output))
 192                         return output_status_connected;
 193                 else
 194                         return output_status_disconnected;
 195         }
 196
 197         if (intel_crt_detect_ddc(output))
 198                 return output_status_connected;
 199
 200         /* TODO use load detect */
 201         return output_status_unknown;
 202 }
 203
 204 static void intel_crt_destroy(struct drm_output *output)
 205 {
 206         struct intel_output *intel_output = output->driver_private;
 207
 208         intel_i2c_destroy(intel_output->ddc_bus);
 209         kfree(output->driver_private);
 210 }
 211
 212 static int intel_crt_get_modes(struct drm_output *output)
 213 {
 214         return intel_ddc_get_modes(output);
 215 }
 216
 217 static bool intel_crt_set_property(struct drm_output *output,
 218                                   struct drm_property *property,
 219                                   uint64_t value)
 220 {
 221         struct drm_device *dev = output->dev;
 222
 223         if (property == dev->mode_config.dpms_property)
 224                 intel_crt_dpms(output, (uint32_t)(value & 0xf));
 225
 226         return true;
 227 }
 228
 229 /*
 230  * Routines for controlling stuff on the analog port
 231  */
 232 static const struct drm_output_funcs intel_crt_output_funcs = {
 233         .dpms = intel_crt_dpms,
 234         .save = intel_crt_save,
 235         .restore = intel_crt_restore,
 236         .mode_valid = intel_crt_mode_valid,
 237         .mode_fixup = intel_crt_mode_fixup,
 238         .prepare = intel_output_prepare,
 239         .mode_set = intel_crt_mode_set,
 240         .commit = intel_output_commit,
 241         .detect = intel_crt_detect,
 242         .get_modes = intel_crt_get_modes,
 243         .cleanup = intel_crt_destroy,
 244         .set_property = intel_crt_set_property,
 245 };
 246
 247 void intel_crt_init(struct drm_device *dev)
 248 {
 249         struct drm_output *output;
 250         struct intel_output *intel_output;
 251
 252         output = drm_output_create(dev, &intel_crt_output_funcs,
 253                                    DRM_MODE_OUTPUT_DAC);
 254
 255         intel_output = kmalloc(sizeof(struct intel_output), GFP_KERNEL);
 256         if (!intel_output) {
 257                 drm_output_destroy(output);
 258                 return;
 259         }
 260         /* Set up the DDC bus. */
 261         intel_output->ddc_bus = intel_i2c_create(dev, GPIOA, "CRTDDC_A");
 262         if (!intel_output->ddc_bus) {
 263                 dev_printk(KERN_ERR, &dev->pdev->dev, "DDC bus registration "
 264                            "failed.\n");
 265                 return;
 266         }
 267
 268         intel_output->type = INTEL_OUTPUT_ANALOG;
 269         output->driver_private = intel_output;
 270         output->interlace_allowed = 0;
 271         output->doublescan_allowed = 0;
 272
 273         drm_output_attach_property(output, dev->mode_config.connector_type_property, ConnectorVGA);
 274 }