linux-core/i915_drv.c

   1 /* i915_drv.c -- i830,i845,i855,i865,i915 driver -*- linux-c -*-
   2  */
   3 /*
   4  *
   5  * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas.
   6  * All Rights Reserved.
   7  *
   8  * Permission is hereby granted, free of charge, to any person obtaining a
   9  * copy of this software and associated documentation files (the
  10  * "Software"), to deal in the Software without restriction, including
  11  * without limitation the rights to use, copy, modify, merge, publish,
  12  * distribute, sub license, and/or sell copies of the Software, and to
  13  * permit persons to whom the Software is furnished to do so, subject to
  14  * the following conditions:
  15  *
  16  * The above copyright notice and this permission notice (including the
  17  * next paragraph) shall be included in all copies or substantial portions
  18  * of the Software.
  19  *
  20  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
  21  * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  22  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
  23  * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
  24  * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
  25  * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
  26  * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  27  *
  28  */
  29
  30 #include "drmP.h"
  31 #include "drm.h"
  32 #include "i915_drm.h"
  33 #include "intel_drv.h"
  34 #include "i915_drv.h"
  35
  36 #include "drm_pciids.h"
  37
  38 static struct pci_device_id pciidlist[] = {
  39         i915_PCI_IDS
  40 };
  41
  42 #ifdef I915_HAVE_FENCE
  43 static drm_fence_driver_t i915_fence_driver = {
  44         .num_classes = 1,
  45         .wrap_diff = (1 << 30),
  46         .flush_diff = (1 << 29),
  47         .sequence_mask = 0xffffffffU,
  48         .lazy_capable = 1,
  49         .emit = i915_fence_emit_sequence,
  50         .poke_flush = i915_poke_flush,
  51         .has_irq = i915_fence_has_irq,
  52 };
  53 #endif
  54 #ifdef I915_HAVE_BUFFER
  55
  56 static uint32_t i915_mem_prios[] = {DRM_BO_MEM_VRAM, DRM_BO_MEM_PRIV0, DRM_BO_MEM_TT, DRM_BO_MEM_LOCAL};
  57 static uint32_t i915_busy_prios[] = {DRM_BO_MEM_TT, DRM_BO_MEM_PRIV0, DRM_BO_MEM_VRAM, DRM_BO_MEM_LOCAL};
  58
  59 static drm_bo_driver_t i915_bo_driver = {
  60         .mem_type_prio = i915_mem_prios,
  61         .mem_busy_prio = i915_busy_prios,
  62         .num_mem_type_prio = sizeof(i915_mem_prios)/sizeof(uint32_t),
  63         .num_mem_busy_prio = sizeof(i915_busy_prios)/sizeof(uint32_t),
  64         .create_ttm_backend_entry = i915_create_ttm_backend_entry,
  65         .fence_type = i915_fence_types,
  66         .invalidate_caches = i915_invalidate_caches,
  67         .init_mem_type = i915_init_mem_type,
  68         .evict_mask = i915_evict_mask,
  69         .move = i915_move,
  70 };
  71 #endif
  72
  73 static int i915_suspend(struct pci_dev *pdev, pm_message_t state)
  74 {
  75         struct drm_device *dev = pci_get_drvdata(pdev);
  76         struct drm_i915_private *dev_priv = dev->dev_private;
  77         struct drm_output *output;
  78         int i;
  79
  80         pci_save_state(pdev);
  81
  82         /* Save video mode information for native mode-setting. */
  83         dev_priv->saveDSPACNTR = I915_READ(DSPACNTR);
  84         dev_priv->savePIPEACONF = I915_READ(PIPEACONF);
  85         dev_priv->savePIPEASRC = I915_READ(PIPEASRC);
  86         dev_priv->saveFPA0 = I915_READ(FPA0);
  87         dev_priv->saveFPA1 = I915_READ(FPA1);
  88         dev_priv->saveDPLL_A = I915_READ(DPLL_A);
  89         if (IS_I965G(dev))
  90                 dev_priv->saveDPLL_A_MD = I915_READ(DPLL_A_MD);
  91         dev_priv->saveHTOTAL_A = I915_READ(HTOTAL_A);
  92         dev_priv->saveHBLANK_A = I915_READ(HBLANK_A);
  93         dev_priv->saveHSYNC_A = I915_READ(HSYNC_A);
  94         dev_priv->saveVTOTAL_A = I915_READ(VTOTAL_A);
  95         dev_priv->saveVBLANK_A = I915_READ(VBLANK_A);
  96         dev_priv->saveVSYNC_A = I915_READ(VSYNC_A);
  97         dev_priv->saveDSPASTRIDE = I915_READ(DSPASTRIDE);
  98         dev_priv->saveDSPASIZE = I915_READ(DSPASIZE);
  99         dev_priv->saveDSPAPOS = I915_READ(DSPAPOS);
 100         dev_priv->saveDSPABASE = I915_READ(DSPABASE);
 101
 102         for(i= 0; i < 256; i++)
 103                 dev_priv->savePaletteA[i] = I915_READ(PALETTE_A + (i << 2));
 104
 105         if(dev->mode_config.num_crtc == 2) {
 106                 dev_priv->savePIPEBCONF = I915_READ(PIPEBCONF);
 107                 dev_priv->savePIPEBSRC = I915_READ(PIPEBSRC);
 108                 dev_priv->saveDSPBCNTR = I915_READ(DSPBCNTR);
 109                 dev_priv->saveFPB0 = I915_READ(FPB0);
 110                 dev_priv->saveFPB1 = I915_READ(FPB1);
 111                 dev_priv->saveDPLL_B = I915_READ(DPLL_B);
 112                 if (IS_I965G(dev))
 113                         dev_priv->saveDPLL_B_MD = I915_READ(DPLL_B_MD);
 114                 dev_priv->saveHTOTAL_B = I915_READ(HTOTAL_B);
 115                 dev_priv->saveHBLANK_B = I915_READ(HBLANK_B);
 116                 dev_priv->saveHSYNC_B = I915_READ(HSYNC_B);
 117                 dev_priv->saveVTOTAL_B = I915_READ(VTOTAL_B);
 118                 dev_priv->saveVBLANK_B = I915_READ(VBLANK_B);
 119                 dev_priv->saveVSYNC_B = I915_READ(VSYNC_B);
 120                 dev_priv->saveDSPBSTRIDE = I915_READ(DSPBSTRIDE);
 121                 dev_priv->saveDSPBSIZE = I915_READ(DSPBSIZE);
 122                 dev_priv->saveDSPBPOS = I915_READ(DSPBPOS);
 123                 dev_priv->saveDSPBBASE = I915_READ(DSPBBASE);
 124                 for(i= 0; i < 256; i++)
 125                         dev_priv->savePaletteB[i] =
 126                                 I915_READ(PALETTE_B + (i << 2));
 127         }
 128
 129         if (IS_I965G(dev)) {
 130                 dev_priv->saveDSPASURF = I915_READ(DSPASURF);
 131                 dev_priv->saveDSPBSURF = I915_READ(DSPBSURF);
 132         }
 133
 134         dev_priv->saveVCLK_DIVISOR_VGA0 = I915_READ(VCLK_DIVISOR_VGA0);
 135         dev_priv->saveVCLK_DIVISOR_VGA1 = I915_READ(VCLK_DIVISOR_VGA1);
 136         dev_priv->saveVCLK_POST_DIV = I915_READ(VCLK_POST_DIV);
 137         dev_priv->saveVGACNTRL = I915_READ(VGACNTRL);
 138
 139         for(i = 0; i < 7; i++) {
 140                 dev_priv->saveSWF[i] = I915_READ(SWF0 + (i << 2));
 141                 dev_priv->saveSWF[i+7] = I915_READ(SWF00 + (i << 2));
 142         }
 143         dev_priv->saveSWF[14] = I915_READ(SWF30);
 144         dev_priv->saveSWF[15] = I915_READ(SWF31);
 145         dev_priv->saveSWF[16] = I915_READ(SWF32);
 146
 147         if (IS_MOBILE(dev) && !IS_I830(dev))
 148                 dev_priv->saveLVDS = I915_READ(LVDS);
 149         dev_priv->savePFIT_CONTROL = I915_READ(PFIT_CONTROL);
 150
 151         list_for_each_entry(output, &dev->mode_config.output_list, head)
 152                 if (output->funcs->save)
 153                         (*output->funcs->save) (output);
 154
 155 #if 0 /* FIXME: save VGA bits */
 156         vgaHWUnlock(hwp);
 157         vgaHWSave(pScrn, vgaReg, VGA_SR_FONTS);
 158 #endif
 159         pci_disable_device(pdev);
 160         pci_set_power_state(pdev, PCI_D3hot);
 161
 162         return 0;
 163 }
 164
 165 static int i915_resume(struct pci_dev *pdev)
 166 {
 167         struct drm_device *dev = pci_get_drvdata(pdev);
 168         struct drm_i915_private *dev_priv = dev->dev_private;
 169         struct drm_output *output;
 170         struct drm_crtc *crtc;
 171         int i;
 172
 173         pci_set_power_state(pdev, PCI_D0);
 174         pci_restore_state(pdev);
 175         pci_enable_device(pdev);
 176
 177         /* Disable outputs */
 178         list_for_each_entry(output, &dev->mode_config.output_list, head)
 179                 output->funcs->dpms(output, DPMSModeOff);
 180
 181         i915_driver_wait_next_vblank(dev, 0);
 182
 183         /* Disable pipes */
 184         list_for_each_entry(crtc, &dev->mode_config.crtc_list, head)
 185                 crtc->funcs->dpms(crtc, DPMSModeOff);
 186
 187         /* FIXME: wait for vblank on each pipe? */
 188         i915_driver_wait_next_vblank(dev, 0);
 189
 190         if (IS_MOBILE(dev) && !IS_I830(dev))
 191                 I915_WRITE(LVDS, dev_priv->saveLVDS);
 192
 193         if (!IS_I830(dev) && !IS_845G(dev))
 194                 I915_WRITE(PFIT_CONTROL, dev_priv->savePFIT_CONTROL);
 195
 196         if (dev_priv->saveDPLL_A & DPLL_VCO_ENABLE) {
 197                 I915_WRITE(DPLL_A, dev_priv->saveDPLL_A & ~DPLL_VCO_ENABLE);
 198                 udelay(150);
 199         }
 200         I915_WRITE(FPA0, dev_priv->saveFPA0);
 201         I915_WRITE(FPA1, dev_priv->saveFPA1);
 202         I915_WRITE(DPLL_A, dev_priv->saveDPLL_A);
 203         udelay(150);
 204         if (IS_I965G(dev))
 205                 I915_WRITE(DPLL_A_MD, dev_priv->saveDPLL_A_MD);
 206         else
 207                 I915_WRITE(DPLL_A, dev_priv->saveDPLL_A);
 208         udelay(150);
 209
 210         I915_WRITE(HTOTAL_A, dev_priv->saveHTOTAL_A);
 211         I915_WRITE(HBLANK_A, dev_priv->saveHBLANK_A);
 212         I915_WRITE(HSYNC_A, dev_priv->saveHSYNC_A);
 213         I915_WRITE(VTOTAL_A, dev_priv->saveVTOTAL_A);
 214         I915_WRITE(VBLANK_A, dev_priv->saveVBLANK_A);
 215         I915_WRITE(VSYNC_A, dev_priv->saveVSYNC_A);
 216
 217         I915_WRITE(DSPASTRIDE, dev_priv->saveDSPASTRIDE);
 218         I915_WRITE(DSPASIZE, dev_priv->saveDSPASIZE);
 219         I915_WRITE(DSPAPOS, dev_priv->saveDSPAPOS);
 220         I915_WRITE(PIPEASRC, dev_priv->savePIPEASRC);
 221         I915_WRITE(DSPABASE, dev_priv->saveDSPABASE);
 222         if (IS_I965G(dev))
 223                 I915_WRITE(DSPASURF, dev_priv->saveDSPASURF);
 224         I915_WRITE(PIPEACONF, dev_priv->savePIPEACONF);
 225         i915_driver_wait_next_vblank(dev, 0);
 226         I915_WRITE(DSPACNTR, dev_priv->saveDSPACNTR);
 227         I915_WRITE(DSPABASE, I915_READ(DSPABASE));
 228         i915_driver_wait_next_vblank(dev, 0);
 229
 230         if(dev->mode_config.num_crtc == 2) {
 231                 if (dev_priv->saveDPLL_B & DPLL_VCO_ENABLE) {
 232                         I915_WRITE(DPLL_B, dev_priv->saveDPLL_B & ~DPLL_VCO_ENABLE);
 233                         udelay(150);
 234                 }
 235                 I915_WRITE(FPB0, dev_priv->saveFPB0);
 236                 I915_WRITE(FPB1, dev_priv->saveFPB1);
 237                 I915_WRITE(DPLL_B, dev_priv->saveDPLL_B);
 238                 udelay(150);
 239                 if (IS_I965G(dev))
 240                         I915_WRITE(DPLL_B_MD, dev_priv->saveDPLL_B_MD);
 241                 else
 242                         I915_WRITE(DPLL_B, dev_priv->saveDPLL_B);
 243                 udelay(150);
 244
 245                 I915_WRITE(HTOTAL_B, dev_priv->saveHTOTAL_B);
 246                 I915_WRITE(HBLANK_B, dev_priv->saveHBLANK_B);
 247                 I915_WRITE(HSYNC_B, dev_priv->saveHSYNC_B);
 248                 I915_WRITE(VTOTAL_B, dev_priv->saveVTOTAL_B);
 249                 I915_WRITE(VBLANK_B, dev_priv->saveVBLANK_B);
 250                 I915_WRITE(VSYNC_B, dev_priv->saveVSYNC_B);
 251                 I915_WRITE(DSPBSTRIDE, dev_priv->saveDSPBSTRIDE);
 252                 I915_WRITE(DSPBSIZE, dev_priv->saveDSPBSIZE);
 253                 I915_WRITE(DSPBPOS, dev_priv->saveDSPBPOS);
 254                 I915_WRITE(PIPEBSRC, dev_priv->savePIPEBSRC);
 255                 I915_WRITE(DSPBBASE, dev_priv->saveDSPBBASE);
 256                 if (IS_I965G(dev))
 257                         I915_WRITE(DSPBSURF, dev_priv->saveDSPBSURF);
 258                 I915_WRITE(PIPEBCONF, dev_priv->savePIPEBCONF);
 259                 i915_driver_wait_next_vblank(dev, 0);
 260                 I915_WRITE(DSPBCNTR, dev_priv->saveDSPBCNTR);
 261                 I915_WRITE(DSPBBASE, I915_READ(DSPBBASE));
 262                 i915_driver_wait_next_vblank(dev, 0);
 263         }
 264
 265         /* Restore outputs */
 266         list_for_each_entry(output, &dev->mode_config.output_list, head)
 267                 if (output->funcs->restore)
 268                         output->funcs->restore(output);
 269
 270         I915_WRITE(VGACNTRL, dev_priv->saveVGACNTRL);
 271
 272         I915_WRITE(VCLK_DIVISOR_VGA0, dev_priv->saveVCLK_DIVISOR_VGA0);
 273         I915_WRITE(VCLK_DIVISOR_VGA1, dev_priv->saveVCLK_DIVISOR_VGA1);
 274         I915_WRITE(VCLK_POST_DIV, dev_priv->saveVCLK_POST_DIV);
 275
 276         for(i = 0; i < 256; i++)
 277                 I915_WRITE(PALETTE_A + (i << 2), dev_priv->savePaletteA[i]);
 278
 279         if(dev->mode_config.num_crtc == 2)
 280                 for(i= 0; i < 256; i++)
 281                         I915_WRITE(PALETTE_B + (i << 2), dev_priv->savePaletteB[i]);
 282
 283         for(i = 0; i < 7; i++) {
 284                 I915_WRITE(SWF0 + (i << 2), dev_priv->saveSWF[i]);
 285                 I915_WRITE(SWF00 + (i << 2), dev_priv->saveSWF[i+7]);
 286         }
 287
 288         I915_WRITE(SWF30, dev_priv->saveSWF[14]);
 289         I915_WRITE(SWF31, dev_priv->saveSWF[15]);
 290         I915_WRITE(SWF32, dev_priv->saveSWF[16]);
 291
 292 #if 0 /* FIXME: restore VGA bits */
 293         vgaHWRestore(pScrn, vgaReg, VGA_SR_FONTS);
 294         vgaHWLock(hwp);
 295 #endif
 296
 297         drm_initial_config(dev, 0);
 298
 299         return 0;
 300 }
 301
 302 static int probe(struct pci_dev *pdev, const struct pci_device_id *ent);
 303 static struct drm_driver driver = {
 304         /* don't use mtrr's here, the Xserver or user space app should
 305          * deal with them for intel hardware.
 306          */
 307         .driver_features =
 308             DRIVER_USE_AGP | DRIVER_REQUIRE_AGP | /* DRIVER_USE_MTRR | */
 309             DRIVER_HAVE_IRQ | DRIVER_IRQ_SHARED | DRIVER_IRQ_VBL |
 310             DRIVER_IRQ_VBL2,
 311         .load = i915_driver_load,
 312         .unload = i915_driver_unload,
 313         .lastclose = i915_driver_lastclose,
 314         .preclose = i915_driver_preclose,
 315         .device_is_agp = i915_driver_device_is_agp,
 316         .vblank_wait = i915_driver_vblank_wait,
 317         .vblank_wait2 = i915_driver_vblank_wait2,
 318         .irq_preinstall = i915_driver_irq_preinstall,
 319         .irq_postinstall = i915_driver_irq_postinstall,
 320         .irq_uninstall = i915_driver_irq_uninstall,
 321         .irq_handler = i915_driver_irq_handler,
 322         .reclaim_buffers = drm_core_reclaim_buffers,
 323         .get_map_ofs = drm_core_get_map_ofs,
 324         .get_reg_ofs = drm_core_get_reg_ofs,
 325         .fb_probe = intelfb_probe,
 326         .fb_remove = intelfb_remove,
 327         .ioctls = i915_ioctls,
 328         .fops = {
 329                 .owner = THIS_MODULE,
 330                 .open = drm_open,
 331                 .release = drm_release,
 332                 .ioctl = drm_ioctl,
 333                 .mmap = drm_mmap,
 334                 .poll = drm_poll,
 335                 .fasync = drm_fasync,
 336 #if defined(CONFIG_COMPAT) && LINUX_VERSION_CODE > KERNEL_VERSION(2,6,9)
 337                 .compat_ioctl = i915_compat_ioctl,
 338 #endif
 339                 },
 340         .pci_driver = {
 341                 .name = DRIVER_NAME,
 342                 .id_table = pciidlist,
 343                 .probe = probe,
 344                 .remove = __devexit_p(drm_cleanup_pci),
 345                 .suspend = i915_suspend,
 346                 .resume = i915_resume,
 347                 },
 348 #ifdef I915_HAVE_FENCE
 349         .fence_driver = &i915_fence_driver,
 350 #endif
 351 #ifdef I915_HAVE_BUFFER
 352         .bo_driver = &i915_bo_driver,
 353 #endif
 354         .name = DRIVER_NAME,
 355         .desc = DRIVER_DESC,
 356         .date = DRIVER_DATE,
 357         .major = DRIVER_MAJOR,
 358         .minor = DRIVER_MINOR,
 359         .patchlevel = DRIVER_PATCHLEVEL,
 360 };
 361
 362 static int probe(struct pci_dev *pdev, const struct pci_device_id *ent)
 363 {
 364         return drm_get_dev(pdev, ent, &driver);
 365 }
 366
 367 static int __init i915_init(void)
 368 {
 369         driver.num_ioctls = i915_max_ioctl;
 370         return drm_init(&driver, pciidlist);
 371 }
 372
 373 static void __exit i915_exit(void)
 374 {
 375         drm_exit(&driver);
 376 }
 377
 378 module_init(i915_init);
 379 module_exit(i915_exit);
 380
 381 MODULE_AUTHOR(DRIVER_AUTHOR);
 382 MODULE_DESCRIPTION(DRIVER_DESC);
 383 MODULE_LICENSE("GPL and additional rights");