linux-core/i915_buffer.c

   1 /**************************************************************************
   2  *
   3  * Copyright 2006 Tungsten Graphics, Inc., Bismarck, ND., USA
   4  * All Rights Reserved.
   5  *
   6  * Permission is hereby granted, free of charge, to any person obtaining a
   7  * copy of this software and associated documentation files (the
   8  * "Software"), to deal in the Software without restriction, including
   9  * without limitation the rights to use, copy, modify, merge, publish,
  10  * distribute, sub license, and/or sell copies of the Software, and to
  11  * permit persons to whom the Software is furnished to do so, subject to
  12  * the following conditions:
  13  *
  14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  16  * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
  17  * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
  18  * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
  19  * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
  20  * USE OR OTHER DEALINGS IN THE SOFTWARE.
  21  *
  22  * The above copyright notice and this permission notice (including the
  23  * next paragraph) shall be included in all copies or substantial portions
  24  * of the Software.
  25  *
  26  *
  27  **************************************************************************/
  28 /*
  29  * Authors: Thomas Hellström <thomas-at-tungstengraphics-dot-com>
  30  */
  31
  32 #include "drmP.h"
  33 #include "i915_drm.h"
  34 #include "i915_drv.h"
  35
  36 struct drm_ttm_backend *i915_create_ttm_backend_entry(struct drm_device * dev)
  37 {
  38         return drm_agp_init_ttm(dev);
  39 }
  40
  41 int i915_fence_types(struct drm_buffer_object *bo,
  42                      uint32_t * fclass,
  43                      uint32_t * type)
  44 {
  45         if (bo->mem.mask & (DRM_BO_FLAG_READ | DRM_BO_FLAG_WRITE))
  46                 *type = 3;
  47         else
  48                 *type = 1;
  49         return 0;
  50 }
  51
  52 int i915_invalidate_caches(struct drm_device * dev, uint64_t flags)
  53 {
  54         /*
  55          * FIXME: Only emit once per batchbuffer submission.
  56          */
  57
  58         uint32_t flush_cmd = MI_NO_WRITE_FLUSH;
  59
  60         if (flags & DRM_BO_FLAG_READ)
  61                 flush_cmd |= MI_READ_FLUSH;
  62         if (flags & DRM_BO_FLAG_EXE)
  63                 flush_cmd |= MI_EXE_FLUSH;
  64
  65         return i915_emit_mi_flush(dev, flush_cmd);
  66 }
  67
  68 int i915_init_mem_type(struct drm_device * dev, uint32_t type,
  69                        struct drm_mem_type_manager * man)
  70 {
  71         switch (type) {
  72         case DRM_BO_MEM_LOCAL:
  73                 man->flags = _DRM_FLAG_MEMTYPE_MAPPABLE |
  74                     _DRM_FLAG_MEMTYPE_CACHED;
  75                 man->drm_bus_maptype = 0;
  76                 man->gpu_offset = 0;
  77                 break;
  78         case DRM_BO_MEM_TT:
  79                 if (!(drm_core_has_AGP(dev) && dev->agp)) {
  80                         DRM_ERROR("AGP is not enabled for memory type %u\n",
  81                                   (unsigned)type);
  82                         return -EINVAL;
  83                 }
  84                 man->io_offset = dev->agp->agp_info.aper_base;
  85                 man->io_size = dev->agp->agp_info.aper_size * 1024 * 1024;
  86                 man->io_addr = NULL;
  87                 man->flags = _DRM_FLAG_MEMTYPE_MAPPABLE |
  88                     _DRM_FLAG_MEMTYPE_CSELECT | _DRM_FLAG_NEEDS_IOREMAP;
  89                 man->drm_bus_maptype = _DRM_AGP;
  90                 man->gpu_offset = 0;
  91                 break;
  92         case DRM_BO_MEM_VRAM:
  93                 if (!(drm_core_has_AGP(dev) && dev->agp)) {
  94                         DRM_ERROR("AGP is not enabled for memory type %u\n",
  95                                   (unsigned)type);
  96                         return -EINVAL;
  97                 }
  98                 man->io_offset = dev->agp->agp_info.aper_base;
  99                 man->io_size = dev->agp->agp_info.aper_size * 1024 * 1024;
 100                 man->io_addr = NULL;
 101                 man->flags =  _DRM_FLAG_MEMTYPE_MAPPABLE |
 102                     _DRM_FLAG_MEMTYPE_FIXED | _DRM_FLAG_NEEDS_IOREMAP;
 103                 man->drm_bus_maptype = _DRM_AGP;
 104                 man->gpu_offset = 0;
 105                 break;
 106         case DRM_BO_MEM_PRIV0: /* for OS preallocated space */
 107                 DRM_ERROR("PRIV0 not used yet.\n");
 108                 break;
 109         default:
 110                 DRM_ERROR("Unsupported memory type %u\n", (unsigned)type);
 111                 return -EINVAL;
 112         }
 113         return 0;
 114 }
 115
 116 uint32_t i915_evict_mask(struct drm_buffer_object *bo)
 117 {
 118         switch (bo->mem.mem_type) {
 119         case DRM_BO_MEM_LOCAL:
 120         case DRM_BO_MEM_TT:
 121                 return DRM_BO_FLAG_MEM_LOCAL;
 122         default:
 123                 return DRM_BO_FLAG_MEM_TT | DRM_BO_FLAG_CACHED;
 124         }
 125 }
 126
 127 #if 0 /* See comment below */
 128
 129 static void i915_emit_copy_blit(struct drm_device * dev,
 130                                 uint32_t src_offset,
 131                                 uint32_t dst_offset,
 132                                 uint32_t pages, int direction)
 133 {
 134         uint32_t cur_pages;
 135         uint32_t stride = PAGE_SIZE;
 136         struct drm_i915_private *dev_priv = dev->dev_private;
 137         RING_LOCALS;
 138
 139         if (!dev_priv)
 140                 return;
 141
 142         i915_kernel_lost_context(dev);
 143         while (pages > 0) {
 144                 cur_pages = pages;
 145                 if (cur_pages > 2048)
 146                         cur_pages = 2048;
 147                 pages -= cur_pages;
 148
 149                 BEGIN_LP_RING(6);
 150                 OUT_RING(SRC_COPY_BLT_CMD | XY_SRC_COPY_BLT_WRITE_ALPHA |
 151                          XY_SRC_COPY_BLT_WRITE_RGB);
 152                 OUT_RING((stride & 0xffff) | (0xcc << 16) | (1 << 24) |
 153                          (1 << 25) | (direction ? (1 << 30) : 0));
 154                 OUT_RING((cur_pages << 16) | PAGE_SIZE);
 155                 OUT_RING(dst_offset);
 156                 OUT_RING(stride & 0xffff);
 157                 OUT_RING(src_offset);
 158                 ADVANCE_LP_RING();
 159         }
 160         return;
 161 }
 162
 163 static int i915_move_blit(struct drm_buffer_object * bo,
 164                           int evict, int no_wait, struct drm_bo_mem_reg * new_mem)
 165 {
 166         struct drm_bo_mem_reg *old_mem = &bo->mem;
 167         int dir = 0;
 168
 169         if ((old_mem->mem_type == new_mem->mem_type) &&
 170             (new_mem->mm_node->start <
 171              old_mem->mm_node->start + old_mem->mm_node->size)) {
 172                 dir = 1;
 173         }
 174
 175         i915_emit_copy_blit(bo->dev,
 176                             old_mem->mm_node->start << PAGE_SHIFT,
 177                             new_mem->mm_node->start << PAGE_SHIFT,
 178                             new_mem->num_pages, dir);
 179
 180         i915_emit_mi_flush(bo->dev, MI_READ_FLUSH | MI_EXE_FLUSH);
 181
 182         return drm_bo_move_accel_cleanup(bo, evict, no_wait, 0,
 183                                          DRM_FENCE_TYPE_EXE |
 184                                          DRM_I915_FENCE_TYPE_RW,
 185                                          DRM_I915_FENCE_FLAG_FLUSHED, new_mem);
 186 }
 187
 188 /*
 189  * Flip destination ttm into cached-coherent AGP,
 190  * then blit and subsequently move out again.
 191  */
 192
 193 static int i915_move_flip(struct drm_buffer_object * bo,
 194                           int evict, int no_wait, struct drm_bo_mem_reg * new_mem)
 195 {
 196         struct drm_device *dev = bo->dev;
 197         struct drm_bo_mem_reg tmp_mem;
 198         int ret;
 199
 200         tmp_mem = *new_mem;
 201         tmp_mem.mm_node = NULL;
 202         tmp_mem.mask = DRM_BO_FLAG_MEM_TT |
 203             DRM_BO_FLAG_CACHED | DRM_BO_FLAG_FORCE_CACHING;
 204
 205         ret = drm_bo_mem_space(bo, &tmp_mem, no_wait);
 206         if (ret)
 207                 return ret;
 208
 209         ret = drm_bind_ttm(bo->ttm, &tmp_mem);
 210         if (ret)
 211                 goto out_cleanup;
 212
 213         ret = i915_move_blit(bo, 1, no_wait, &tmp_mem);
 214         if (ret)
 215                 goto out_cleanup;
 216
 217         ret = drm_bo_move_ttm(bo, evict, no_wait, new_mem);
 218 out_cleanup:
 219         if (tmp_mem.mm_node) {
 220                 mutex_lock(&dev->struct_mutex);
 221                 if (tmp_mem.mm_node != bo->pinned_node)
 222                         drm_mm_put_block(tmp_mem.mm_node);
 223                 tmp_mem.mm_node = NULL;
 224                 mutex_unlock(&dev->struct_mutex);
 225         }
 226         return ret;
 227 }
 228
 229 #endif
 230
 231 /*
 232  * Disable i915_move_flip for now, since we can't guarantee that the hardware lock
 233  * is held here. To re-enable we need to make sure either
 234  * a) The X server is using DRM to submit commands to the ring, or
 235  * b) DRM can use the HP ring for these blits. This means i915 needs to implement
 236  *    a new ring submission mechanism and fence class.
 237  */
 238
 239 int i915_move(struct drm_buffer_object * bo,
 240               int evict, int no_wait, struct drm_bo_mem_reg * new_mem)
 241 {
 242         struct drm_bo_mem_reg *old_mem = &bo->mem;
 243
 244         if (old_mem->mem_type == DRM_BO_MEM_LOCAL) {
 245                 return drm_bo_move_memcpy(bo, evict, no_wait, new_mem);
 246         } else if (new_mem->mem_type == DRM_BO_MEM_LOCAL) {
 247                 if (0 /*i915_move_flip(bo, evict, no_wait, new_mem)*/)
 248                         return drm_bo_move_memcpy(bo, evict, no_wait, new_mem);
 249         } else {
 250                 if (0 /*i915_move_blit(bo, evict, no_wait, new_mem)*/)
 251                         return drm_bo_move_memcpy(bo, evict, no_wait, new_mem);
 252         }
 253         return 0;
 254 }
 255
 256 #if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,24))
 257 static inline void clflush(volatile void *__p)
 258 {
 259         asm volatile("clflush %0" : "+m" (*(char __force *)__p));
 260 }
 261 #endif
 262
 263 static inline void drm_cache_flush_addr(void *virt)
 264 {
 265         int i;
 266
 267         for (i = 0; i < PAGE_SIZE; i += boot_cpu_data.x86_clflush_size)
 268                 clflush(virt+i);
 269 }
 270
 271 static inline void drm_cache_flush_page(struct page *p)
 272 {
 273         drm_cache_flush_addr(page_address(p));
 274 }
 275
 276 void i915_flush_ttm(struct drm_ttm *ttm)
 277 {
 278         int i;
 279
 280         if (!ttm)
 281                 return;
 282
 283         DRM_MEMORYBARRIER();
 284         for (i = ttm->num_pages-1; i >= 0; i--)
 285                 drm_cache_flush_page(drm_ttm_get_page(ttm, i));
 286         DRM_MEMORYBARRIER();
 287 }