1 /**************************************************************************
3 * Copyright 2006 Tungsten Graphics, Inc., Bismarck, ND., USA
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the
8 * "Software"), to deal in the Software without restriction, including
9 * without limitation the rights to use, copy, modify, merge, publish,
10 * distribute, sub license, and/or sell copies of the Software, and to
11 * permit persons to whom the Software is furnished to do so, subject to
12 * the following conditions:
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
18 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
19 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
20 * USE OR OTHER DEALINGS IN THE SOFTWARE.
22 * The above copyright notice and this permission notice (including the
23 * next paragraph) shall be included in all copies or substantial portions
27 **************************************************************************/
29 * Authors: Thomas Hellström <thomas-at-tungstengraphics-dot-com>
36 struct drm_ttm_backend *i915_create_ttm_backend_entry(struct drm_device * dev)
38 return drm_agp_init_ttm(dev);
41 int i915_fence_types(struct drm_buffer_object *bo, uint32_t * type)
43 if (bo->mem.flags & (DRM_BO_FLAG_READ | DRM_BO_FLAG_WRITE))
50 int i915_invalidate_caches(struct drm_device * dev, uint64_t flags)
53 * FIXME: Only emit once per batchbuffer submission.
56 uint32_t flush_cmd = MI_NO_WRITE_FLUSH;
58 if (flags & DRM_BO_FLAG_READ)
59 flush_cmd |= MI_READ_FLUSH;
60 if (flags & DRM_BO_FLAG_EXE)
61 flush_cmd |= MI_EXE_FLUSH;
63 return i915_emit_mi_flush(dev, flush_cmd);
66 int i915_init_mem_type(struct drm_device * dev, uint32_t type,
67 struct drm_mem_type_manager * man)
70 case DRM_BO_MEM_LOCAL:
71 man->flags = _DRM_FLAG_MEMTYPE_MAPPABLE |
72 _DRM_FLAG_MEMTYPE_CACHED;
73 man->drm_bus_maptype = 0;
76 if (!(drm_core_has_AGP(dev) && dev->agp)) {
77 DRM_ERROR("AGP is not enabled for memory type %u\n",
81 man->io_offset = dev->agp->agp_info.aper_base;
82 man->io_size = dev->agp->agp_info.aper_size * 1024 * 1024;
84 man->flags = _DRM_FLAG_MEMTYPE_MAPPABLE |
85 _DRM_FLAG_MEMTYPE_CSELECT | _DRM_FLAG_NEEDS_IOREMAP;
86 man->drm_bus_maptype = _DRM_AGP;
89 if (!(drm_core_has_AGP(dev) && dev->agp)) {
90 DRM_ERROR("AGP is not enabled for memory type %u\n",
94 man->io_offset = dev->agp->agp_info.aper_base;
95 man->io_size = dev->agp->agp_info.aper_size * 1024 * 1024;
97 man->flags = _DRM_FLAG_MEMTYPE_MAPPABLE |
98 _DRM_FLAG_MEMTYPE_FIXED | _DRM_FLAG_NEEDS_IOREMAP;
99 man->drm_bus_maptype = _DRM_AGP;
101 case DRM_BO_MEM_PRIV0: /* for OS preallocated space */
102 DRM_ERROR("PRIV0 not used yet.\n");
105 DRM_ERROR("Unsupported memory type %u\n", (unsigned)type);
111 uint32_t i915_evict_mask(struct drm_buffer_object *bo)
113 switch (bo->mem.mem_type) {
114 case DRM_BO_MEM_LOCAL:
116 return DRM_BO_FLAG_MEM_LOCAL;
118 return DRM_BO_FLAG_MEM_TT | DRM_BO_FLAG_CACHED;
122 static void i915_emit_copy_blit(struct drm_device * dev,
125 uint32_t pages, int direction)
128 uint32_t stride = PAGE_SIZE;
129 struct drm_i915_private *dev_priv = dev->dev_private;
135 i915_kernel_lost_context(dev);
138 if (cur_pages > 2048)
143 OUT_RING(SRC_COPY_BLT_CMD | XY_SRC_COPY_BLT_WRITE_ALPHA |
144 XY_SRC_COPY_BLT_WRITE_RGB);
145 OUT_RING((stride & 0xffff) | (0xcc << 16) | (1 << 24) |
146 (1 << 25) | (direction ? (1 << 30) : 0));
147 OUT_RING((cur_pages << 16) | PAGE_SIZE);
148 OUT_RING(dst_offset);
149 OUT_RING(stride & 0xffff);
150 OUT_RING(src_offset);
156 static int i915_move_blit(struct drm_buffer_object * bo,
157 int evict, int no_wait, struct drm_bo_mem_reg * new_mem)
159 struct drm_bo_mem_reg *old_mem = &bo->mem;
162 if ((old_mem->mem_type == new_mem->mem_type) &&
163 (new_mem->mm_node->start <
164 old_mem->mm_node->start + old_mem->mm_node->size)) {
168 i915_emit_copy_blit(bo->dev,
169 old_mem->mm_node->start << PAGE_SHIFT,
170 new_mem->mm_node->start << PAGE_SHIFT,
171 new_mem->num_pages, dir);
173 i915_emit_mi_flush(bo->dev, MI_READ_FLUSH | MI_EXE_FLUSH);
175 return drm_bo_move_accel_cleanup(bo, evict, no_wait, 0,
177 DRM_I915_FENCE_TYPE_RW,
178 DRM_I915_FENCE_FLAG_FLUSHED, new_mem);
182 * Flip destination ttm into cached-coherent AGP,
183 * then blit and subsequently move out again.
186 static int i915_move_flip(struct drm_buffer_object * bo,
187 int evict, int no_wait, struct drm_bo_mem_reg * new_mem)
189 struct drm_device *dev = bo->dev;
190 struct drm_bo_mem_reg tmp_mem;
194 tmp_mem.mm_node = NULL;
195 tmp_mem.mask = DRM_BO_FLAG_MEM_TT |
196 DRM_BO_FLAG_CACHED | DRM_BO_FLAG_FORCE_CACHING;
198 ret = drm_bo_mem_space(bo, &tmp_mem, no_wait);
202 ret = drm_bind_ttm(bo->ttm, 1, tmp_mem.mm_node->start);
206 ret = i915_move_blit(bo, 1, no_wait, &tmp_mem);
210 ret = drm_bo_move_ttm(bo, evict, no_wait, new_mem);
212 if (tmp_mem.mm_node) {
213 mutex_lock(&dev->struct_mutex);
214 if (tmp_mem.mm_node != bo->pinned_node)
215 drm_mm_put_block(tmp_mem.mm_node);
216 tmp_mem.mm_node = NULL;
217 mutex_unlock(&dev->struct_mutex);
222 int i915_move(struct drm_buffer_object * bo,
223 int evict, int no_wait, struct drm_bo_mem_reg * new_mem)
225 struct drm_bo_mem_reg *old_mem = &bo->mem;
227 if (old_mem->mem_type == DRM_BO_MEM_LOCAL) {
228 return drm_bo_move_memcpy(bo, evict, no_wait, new_mem);
229 } else if (new_mem->mem_type == DRM_BO_MEM_LOCAL) {
230 if (i915_move_flip(bo, evict, no_wait, new_mem))
231 return drm_bo_move_memcpy(bo, evict, no_wait, new_mem);
233 if (i915_move_blit(bo, evict, no_wait, new_mem))
234 return drm_bo_move_memcpy(bo, evict, no_wait, new_mem);