linux-core/i915_buffer.c

   1 /**************************************************************************
   2  *
   3  * Copyright 2006 Tungsten Graphics, Inc., Bismarck, ND., USA
   4  * All Rights Reserved.
   5  *
   6  * Permission is hereby granted, free of charge, to any person obtaining a
   7  * copy of this software and associated documentation files (the
   8  * "Software"), to deal in the Software without restriction, including
   9  * without limitation the rights to use, copy, modify, merge, publish,
  10  * distribute, sub license, and/or sell copies of the Software, and to
  11  * permit persons to whom the Software is furnished to do so, subject to
  12  * the following conditions:
  13  *
  14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  16  * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
  17  * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
  18  * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
  19  * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
  20  * USE OR OTHER DEALINGS IN THE SOFTWARE.
  21  *
  22  * The above copyright notice and this permission notice (including the
  23  * next paragraph) shall be included in all copies or substantial portions
  24  * of the Software.
  25  *
  26  *
  27  **************************************************************************/
  28 /*
  29  * Authors: Thomas Hellström <thomas-at-tungstengraphics-dot-com>
  30  */
  31
  32 #include "drmP.h"
  33 #include "i915_drm.h"
  34 #include "i915_drv.h"
  35
  36 struct drm_ttm_backend *i915_create_ttm_backend_entry(struct drm_device *dev)
  37 {
  38         return drm_agp_init_ttm(dev);
  39 }
  40
  41 int i915_fence_type(struct drm_buffer_object *bo,
  42                      uint32_t *fclass,
  43                      uint32_t *type)
  44 {
  45         if (bo->mem.proposed_flags & (DRM_BO_FLAG_READ | DRM_BO_FLAG_WRITE))
  46                 *type = 3;
  47         else
  48                 *type = 1;
  49         return 0;
  50 }
  51
  52 int i915_invalidate_caches(struct drm_device *dev, uint64_t flags)
  53 {
  54         /*
  55          * FIXME: Only emit once per batchbuffer submission.
  56          */
  57
  58         uint32_t flush_cmd = MI_NO_WRITE_FLUSH;
  59
  60         if (flags & DRM_BO_FLAG_READ)
  61                 flush_cmd |= MI_READ_FLUSH;
  62         if (flags & DRM_BO_FLAG_EXE)
  63                 flush_cmd |= MI_EXE_FLUSH;
  64
  65         return i915_emit_mi_flush(dev, flush_cmd);
  66 }
  67
  68 int i915_init_mem_type(struct drm_device *dev, uint32_t type,
  69                        struct drm_mem_type_manager *man)
  70 {
  71         switch (type) {
  72         case DRM_BO_MEM_LOCAL:
  73                 man->flags = _DRM_FLAG_MEMTYPE_MAPPABLE |
  74                     _DRM_FLAG_MEMTYPE_CACHED;
  75                 man->drm_bus_maptype = 0;
  76                 man->gpu_offset = 0;
  77                 break;
  78         case DRM_BO_MEM_TT:
  79                 if (!(drm_core_has_AGP(dev) && dev->agp)) {
  80                         DRM_ERROR("AGP is not enabled for memory type %u\n",
  81                                   (unsigned)type);
  82                         return -EINVAL;
  83                 }
  84                 man->io_offset = dev->agp->agp_info.aper_base;
  85                 man->io_size = dev->agp->agp_info.aper_size * 1024 * 1024;
  86                 man->io_addr = NULL;
  87                 man->flags = _DRM_FLAG_MEMTYPE_MAPPABLE |
  88                     _DRM_FLAG_MEMTYPE_CSELECT | _DRM_FLAG_NEEDS_IOREMAP;
  89                 man->drm_bus_maptype = _DRM_AGP;
  90                 man->gpu_offset = 0;
  91                 break;
  92         case DRM_BO_MEM_VRAM:
  93                 if (!(drm_core_has_AGP(dev) && dev->agp)) {
  94                         DRM_ERROR("AGP is not enabled for memory type %u\n",
  95                                   (unsigned)type);
  96                         return -EINVAL;
  97                 }
  98                 man->io_offset = dev->agp->agp_info.aper_base;
  99                 man->io_size = dev->agp->agp_info.aper_size * 1024 * 1024;
 100                 man->io_addr = NULL;
 101                 man->flags =  _DRM_FLAG_MEMTYPE_MAPPABLE |
 102                     _DRM_FLAG_MEMTYPE_FIXED | _DRM_FLAG_NEEDS_IOREMAP;
 103                 man->drm_bus_maptype = _DRM_AGP;
 104                 man->gpu_offset = 0;
 105                 break;
 106         case DRM_BO_MEM_PRIV0: /* for OS preallocated space */
 107                 DRM_ERROR("PRIV0 not used yet.\n");
 108                 break;
 109         default:
 110                 DRM_ERROR("Unsupported memory type %u\n", (unsigned)type);
 111                 return -EINVAL;
 112         }
 113         return 0;
 114 }
 115
 116 /*
 117  * i915_evict_flags:
 118  *
 119  * @bo: the buffer object to be evicted
 120  *
 121  * Return the bo flags for a buffer which is not mapped to the hardware.
 122  * These will be placed in proposed_flags so that when the move is
 123  * finished, they'll end up in bo->mem.flags
 124  */
 125 uint64_t i915_evict_flags(struct drm_buffer_object *bo)
 126 {
 127         switch (bo->mem.mem_type) {
 128         case DRM_BO_MEM_LOCAL:
 129         case DRM_BO_MEM_TT:
 130                 return DRM_BO_FLAG_MEM_LOCAL;
 131         default:
 132                 return DRM_BO_FLAG_MEM_TT | DRM_BO_FLAG_CACHED;
 133         }
 134 }
 135
 136 #if 0 /* See comment below */
 137
 138 static void i915_emit_copy_blit(struct drm_device * dev,
 139                                 uint32_t src_offset,
 140                                 uint32_t dst_offset,
 141                                 uint32_t pages, int direction)
 142 {
 143         uint32_t cur_pages;
 144         uint32_t stride = PAGE_SIZE;
 145         struct drm_i915_private *dev_priv = dev->dev_private;
 146         RING_LOCALS;
 147
 148         if (!dev_priv)
 149                 return;
 150
 151         i915_kernel_lost_context(dev);
 152         while (pages > 0) {
 153                 cur_pages = pages;
 154                 if (cur_pages > 2048)
 155                         cur_pages = 2048;
 156                 pages -= cur_pages;
 157
 158                 BEGIN_LP_RING(6);
 159                 OUT_RING(SRC_COPY_BLT_CMD | XY_SRC_COPY_BLT_WRITE_ALPHA |
 160                          XY_SRC_COPY_BLT_WRITE_RGB);
 161                 OUT_RING((stride & 0xffff) | (0xcc << 16) | (1 << 24) |
 162                          (1 << 25) | (direction ? (1 << 30) : 0));
 163                 OUT_RING((cur_pages << 16) | PAGE_SIZE);
 164                 OUT_RING(dst_offset);
 165                 OUT_RING(stride & 0xffff);
 166                 OUT_RING(src_offset);
 167                 ADVANCE_LP_RING();
 168         }
 169         return;
 170 }
 171
 172 static int i915_move_blit(struct drm_buffer_object * bo,
 173                           int evict, int no_wait, struct drm_bo_mem_reg * new_mem)
 174 {
 175         struct drm_bo_mem_reg *old_mem = &bo->mem;
 176         int dir = 0;
 177
 178         if ((old_mem->mem_type == new_mem->mem_type) &&
 179             (new_mem->mm_node->start <
 180              old_mem->mm_node->start + old_mem->mm_node->size)) {
 181                 dir = 1;
 182         }
 183
 184         i915_emit_copy_blit(bo->dev,
 185                             old_mem->mm_node->start << PAGE_SHIFT,
 186                             new_mem->mm_node->start << PAGE_SHIFT,
 187                             new_mem->num_pages, dir);
 188
 189         i915_emit_mi_flush(bo->dev, MI_READ_FLUSH | MI_EXE_FLUSH);
 190
 191         return drm_bo_move_accel_cleanup(bo, evict, no_wait, 0,
 192                                          DRM_FENCE_TYPE_EXE |
 193                                          DRM_I915_FENCE_TYPE_RW,
 194                                          DRM_I915_FENCE_FLAG_FLUSHED, new_mem);
 195 }
 196
 197 /*
 198  * Flip destination ttm into cached-coherent AGP,
 199  * then blit and subsequently move out again.
 200  */
 201
 202 static int i915_move_flip(struct drm_buffer_object * bo,
 203                           int evict, int no_wait, struct drm_bo_mem_reg * new_mem)
 204 {
 205         struct drm_device *dev = bo->dev;
 206         struct drm_bo_mem_reg tmp_mem;
 207         int ret;
 208
 209         tmp_mem = *new_mem;
 210         tmp_mem.mm_node = NULL;
 211         tmp_mem.mask = DRM_BO_FLAG_MEM_TT |
 212             DRM_BO_FLAG_CACHED | DRM_BO_FLAG_FORCE_CACHING;
 213
 214         ret = drm_bo_mem_space(bo, &tmp_mem, no_wait);
 215         if (ret)
 216                 return ret;
 217
 218         ret = drm_bind_ttm(bo->ttm, &tmp_mem);
 219         if (ret)
 220                 goto out_cleanup;
 221
 222         ret = i915_move_blit(bo, 1, no_wait, &tmp_mem);
 223         if (ret)
 224                 goto out_cleanup;
 225
 226         ret = drm_bo_move_ttm(bo, evict, no_wait, new_mem);
 227 out_cleanup:
 228         if (tmp_mem.mm_node) {
 229                 mutex_lock(&dev->struct_mutex);
 230                 if (tmp_mem.mm_node != bo->pinned_node)
 231                         drm_mm_put_block(tmp_mem.mm_node);
 232                 tmp_mem.mm_node = NULL;
 233                 mutex_unlock(&dev->struct_mutex);
 234         }
 235         return ret;
 236 }
 237
 238 #endif
 239
 240 /*
 241  * Disable i915_move_flip for now, since we can't guarantee that the hardware
 242  * lock is held here. To re-enable we need to make sure either
 243  * a) The X server is using DRM to submit commands to the ring, or
 244  * b) DRM can use the HP ring for these blits. This means i915 needs to
 245  *    implement a new ring submission mechanism and fence class.
 246  */
 247 int i915_move(struct drm_buffer_object *bo,
 248               int evict, int no_wait, struct drm_bo_mem_reg *new_mem)
 249 {
 250         struct drm_bo_mem_reg *old_mem = &bo->mem;
 251
 252         if (old_mem->mem_type == DRM_BO_MEM_LOCAL) {
 253                 return drm_bo_move_memcpy(bo, evict, no_wait, new_mem);
 254         } else if (new_mem->mem_type == DRM_BO_MEM_LOCAL) {
 255                 if (0) /*i915_move_flip(bo, evict, no_wait, new_mem)*/
 256                         return drm_bo_move_memcpy(bo, evict, no_wait, new_mem);
 257         } else {
 258                 if (0) /*i915_move_blit(bo, evict, no_wait, new_mem)*/
 259                         return drm_bo_move_memcpy(bo, evict, no_wait, new_mem);
 260         }
 261         return 0;
 262 }
 263
 264 #if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,24))
 265 static inline void clflush(volatile void *__p)
 266 {
 267         asm volatile("clflush %0" : "+m" (*(char __force *)__p));
 268 }
 269 #endif
 270
 271 static inline void drm_cache_flush_addr(void *virt)
 272 {
 273 #ifdef cpu_has_clflush
 274         int i;
 275
 276         for (i = 0; i < PAGE_SIZE; i += boot_cpu_data.x86_clflush_size)
 277                 clflush(virt+i);
 278 #endif
 279 }
 280
 281 static inline void drm_cache_flush_page(struct page *p)
 282 {
 283         drm_cache_flush_addr(page_address(p));
 284 }
 285
 286 void i915_flush_ttm(struct drm_ttm *ttm)
 287 {
 288         int i;
 289
 290         if (!ttm)
 291                 return;
 292
 293         DRM_MEMORYBARRIER();
 294
 295 #ifdef CONFIG_X86_32
 296 #ifndef cpu_has_clflush
 297 #define cpu_has_clflush 0
 298 #endif
 299         /* Hopefully nobody has built an x86-64 processor without clflush */
 300         if (!cpu_has_clflush) {
 301                 wbinvd();
 302                 DRM_MEMORYBARRIER();
 303                 return;
 304         }
 305 #endif
 306
 307         for (i = ttm->num_pages - 1; i >= 0; i--)
 308                 drm_cache_flush_page(drm_ttm_get_page(ttm, i));
 309
 310         DRM_MEMORYBARRIER();
 311 }