1 /**************************************************************************
3 * Copyright 2006 Tungsten Graphics, Inc., Bismarck, ND., USA
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the
8 * "Software"), to deal in the Software without restriction, including
9 * without limitation the rights to use, copy, modify, merge, publish,
10 * distribute, sub license, and/or sell copies of the Software, and to
11 * permit persons to whom the Software is furnished to do so, subject to
12 * the following conditions:
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
18 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
19 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
20 * USE OR OTHER DEALINGS IN THE SOFTWARE.
22 * The above copyright notice and this permission notice (including the
23 * next paragraph) shall be included in all copies or substantial portions
27 **************************************************************************/
29 * Authors: Thomas Hellström <thomas-at-tungstengraphics-dot-com>
36 struct drm_ttm_backend *i915_create_ttm_backend_entry(struct drm_device * dev)
38 return drm_agp_init_ttm(dev);
41 int i915_fence_types(struct drm_buffer_object *bo,
45 if (bo->mem.flags & (DRM_BO_FLAG_READ | DRM_BO_FLAG_WRITE))
52 int i915_invalidate_caches(struct drm_device * dev, uint64_t flags)
55 * FIXME: Only emit once per batchbuffer submission.
58 uint32_t flush_cmd = MI_NO_WRITE_FLUSH;
60 if (flags & DRM_BO_FLAG_READ)
61 flush_cmd |= MI_READ_FLUSH;
62 if (flags & DRM_BO_FLAG_EXE)
63 flush_cmd |= MI_EXE_FLUSH;
65 return i915_emit_mi_flush(dev, flush_cmd);
68 int i915_init_mem_type(struct drm_device * dev, uint32_t type,
69 struct drm_mem_type_manager * man)
72 case DRM_BO_MEM_LOCAL:
73 man->flags = _DRM_FLAG_MEMTYPE_MAPPABLE |
74 _DRM_FLAG_MEMTYPE_CACHED;
75 man->drm_bus_maptype = 0;
79 if (!(drm_core_has_AGP(dev) && dev->agp)) {
80 DRM_ERROR("AGP is not enabled for memory type %u\n",
84 man->io_offset = dev->agp->agp_info.aper_base;
85 man->io_size = dev->agp->agp_info.aper_size * 1024 * 1024;
87 man->flags = _DRM_FLAG_MEMTYPE_MAPPABLE |
88 _DRM_FLAG_MEMTYPE_CSELECT | _DRM_FLAG_NEEDS_IOREMAP;
89 man->drm_bus_maptype = _DRM_AGP;
92 case DRM_BO_MEM_PRIV0:
93 if (!(drm_core_has_AGP(dev) && dev->agp)) {
94 DRM_ERROR("AGP is not enabled for memory type %u\n",
98 man->io_offset = dev->agp->agp_info.aper_base;
99 man->io_size = dev->agp->agp_info.aper_size * 1024 * 1024;
101 man->flags = _DRM_FLAG_MEMTYPE_MAPPABLE |
102 _DRM_FLAG_MEMTYPE_FIXED | _DRM_FLAG_NEEDS_IOREMAP;
103 man->drm_bus_maptype = _DRM_AGP;
107 DRM_ERROR("Unsupported memory type %u\n", (unsigned)type);
113 uint32_t i915_evict_mask(struct drm_buffer_object *bo)
115 switch (bo->mem.mem_type) {
116 case DRM_BO_MEM_LOCAL:
118 return DRM_BO_FLAG_MEM_LOCAL;
120 return DRM_BO_FLAG_MEM_TT | DRM_BO_FLAG_CACHED;
124 static void i915_emit_copy_blit(struct drm_device * dev,
127 uint32_t pages, int direction)
130 uint32_t stride = PAGE_SIZE;
131 drm_i915_private_t *dev_priv = dev->dev_private;
137 i915_kernel_lost_context(dev);
140 if (cur_pages > 2048)
145 OUT_RING(SRC_COPY_BLT_CMD | XY_SRC_COPY_BLT_WRITE_ALPHA |
146 XY_SRC_COPY_BLT_WRITE_RGB);
147 OUT_RING((stride & 0xffff) | (0xcc << 16) | (1 << 24) |
148 (1 << 25) | (direction ? (1 << 30) : 0));
149 OUT_RING((cur_pages << 16) | PAGE_SIZE);
150 OUT_RING(dst_offset);
151 OUT_RING(stride & 0xffff);
152 OUT_RING(src_offset);
158 static int i915_move_blit(struct drm_buffer_object * bo,
159 int evict, int no_wait, struct drm_bo_mem_reg * new_mem)
161 struct drm_bo_mem_reg *old_mem = &bo->mem;
164 if ((old_mem->mem_type == new_mem->mem_type) &&
165 (new_mem->mm_node->start <
166 old_mem->mm_node->start + old_mem->mm_node->size)) {
170 i915_emit_copy_blit(bo->dev,
171 old_mem->mm_node->start << PAGE_SHIFT,
172 new_mem->mm_node->start << PAGE_SHIFT,
173 new_mem->num_pages, dir);
175 i915_emit_mi_flush(bo->dev, MI_READ_FLUSH | MI_EXE_FLUSH);
177 return drm_bo_move_accel_cleanup(bo, evict, no_wait, 0,
179 DRM_I915_FENCE_TYPE_RW,
180 DRM_I915_FENCE_FLAG_FLUSHED, new_mem);
184 * Flip destination ttm into cached-coherent AGP,
185 * then blit and subsequently move out again.
188 static int i915_move_flip(struct drm_buffer_object * bo,
189 int evict, int no_wait, struct drm_bo_mem_reg * new_mem)
191 struct drm_device *dev = bo->dev;
192 struct drm_bo_mem_reg tmp_mem;
196 tmp_mem.mm_node = NULL;
197 tmp_mem.mask = DRM_BO_FLAG_MEM_TT |
198 DRM_BO_FLAG_CACHED | DRM_BO_FLAG_FORCE_CACHING;
200 ret = drm_bo_mem_space(bo, &tmp_mem, no_wait);
204 ret = drm_bind_ttm(bo->ttm, &tmp_mem);
208 ret = i915_move_blit(bo, 1, no_wait, &tmp_mem);
212 ret = drm_bo_move_ttm(bo, evict, no_wait, new_mem);
214 if (tmp_mem.mm_node) {
215 mutex_lock(&dev->struct_mutex);
216 if (tmp_mem.mm_node != bo->pinned_node)
217 drm_mm_put_block(tmp_mem.mm_node);
218 tmp_mem.mm_node = NULL;
219 mutex_unlock(&dev->struct_mutex);
224 int i915_move(struct drm_buffer_object * bo,
225 int evict, int no_wait, struct drm_bo_mem_reg * new_mem)
227 struct drm_bo_mem_reg *old_mem = &bo->mem;
229 if (old_mem->mem_type == DRM_BO_MEM_LOCAL) {
230 return drm_bo_move_memcpy(bo, evict, no_wait, new_mem);
231 } else if (new_mem->mem_type == DRM_BO_MEM_LOCAL) {
232 if (i915_move_flip(bo, evict, no_wait, new_mem))
233 return drm_bo_move_memcpy(bo, evict, no_wait, new_mem);
235 if (i915_move_blit(bo, evict, no_wait, new_mem))
236 return drm_bo_move_memcpy(bo, evict, no_wait, new_mem);