5 * \author Gareth Hughes <gareth@valinux.com>
9 * Created: Wed Dec 13 21:52:19 2000 by gareth@valinux.com
11 * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
12 * All Rights Reserved.
14 * Permission is hereby granted, free of charge, to any person obtaining a
15 * copy of this software and associated documentation files (the "Software"),
16 * to deal in the Software without restriction, including without limitation
17 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
18 * and/or sell copies of the Software, and to permit persons to whom the
19 * Software is furnished to do so, subject to the following conditions:
21 * The above copyright notice and this permission notice (including the next
22 * paragraph) shall be included in all copies or substantial portions of the
25 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
26 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
27 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
28 * PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
29 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
30 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
31 * DEALINGS IN THE SOFTWARE.
36 # define ATI_PCIGART_PAGE_SIZE 4096 /**< PCI GART page size */
37 # define ATI_PCIGART_PAGE_MASK (~(ATI_PCIGART_PAGE_SIZE-1))
39 #define ATI_PCIE_WRITE 0x4
40 #define ATI_PCIE_READ 0x8
42 static int drm_ati_alloc_pcigart_table(struct drm_device *dev,
43 struct drm_ati_pcigart_info *gart_info)
45 gart_info->table_handle = drm_pci_alloc(dev, gart_info->table_size,
47 gart_info->table_mask);
48 if (gart_info->table_handle == NULL)
54 static void drm_ati_free_pcigart_table(struct drm_device *dev,
55 struct drm_ati_pcigart_info *gart_info)
57 drm_pci_free(dev, gart_info->table_handle);
58 gart_info->table_handle = NULL;
61 int drm_ati_pcigart_cleanup(struct drm_device *dev, struct drm_ati_pcigart_info *gart_info)
63 struct drm_sg_mem *entry = dev->sg;
68 /* we need to support large memory configurations */
70 DRM_ERROR("no scatter/gather memory!\n");
74 if (gart_info->bus_addr) {
76 max_pages = (gart_info->table_size / sizeof(u32));
77 pages = (entry->pages <= max_pages)
78 ? entry->pages : max_pages;
80 for (i = 0; i < pages; i++) {
81 if (!entry->busaddr[i])
83 pci_unmap_single(dev->pdev, entry->busaddr[i],
84 PAGE_SIZE, PCI_DMA_TODEVICE);
87 if (gart_info->gart_table_location == DRM_ATI_GART_MAIN)
88 gart_info->bus_addr = 0;
92 if (gart_info->gart_table_location == DRM_ATI_GART_MAIN
93 && gart_info->table_handle) {
95 drm_ati_free_pcigart_table(dev, gart_info);
100 EXPORT_SYMBOL(drm_ati_pcigart_cleanup);
102 int drm_ati_pcigart_init(struct drm_device *dev, struct drm_ati_pcigart_info *gart_info)
104 struct drm_sg_mem *entry = dev->sg;
105 void *address = NULL;
107 u32 *pci_gart, page_base;
108 dma_addr_t bus_address = 0;
111 dma_addr_t entry_addr;
114 DRM_ERROR("no scatter/gather memory!\n");
118 if (gart_info->gart_table_location == DRM_ATI_GART_MAIN) {
119 DRM_DEBUG("PCI: no table in VRAM: using normal RAM\n");
121 ret = drm_ati_alloc_pcigart_table(dev, gart_info);
123 DRM_ERROR("cannot allocate PCI GART page!\n");
127 address = gart_info->table_handle->vaddr;
128 bus_address = gart_info->table_handle->busaddr;
130 address = gart_info->addr;
131 bus_address = gart_info->bus_addr;
132 DRM_DEBUG("PCI: Gart Table: VRAM %08X mapped at %08lX\n",
133 bus_address, (unsigned long)address);
136 pci_gart = (u32 *) address;
138 max_pages = (gart_info->table_size / sizeof(u32));
139 pages = (entry->pages <= max_pages)
140 ? entry->pages : max_pages;
142 memset(pci_gart, 0, max_pages * sizeof(u32));
144 for (i = 0; i < pages; i++) {
145 /* we need to support large memory configurations */
146 entry->busaddr[i] = pci_map_single(dev->pdev,
149 PAGE_SIZE, PCI_DMA_TODEVICE);
150 if (entry->busaddr[i] == 0) {
151 DRM_ERROR("unable to map PCIGART pages!\n");
152 drm_ati_pcigart_cleanup(dev, gart_info);
158 entry_addr = entry->busaddr[i];
159 for (j = 0; j < (PAGE_SIZE / ATI_PCIGART_PAGE_SIZE); j++) {
160 page_base = (u32) entry_addr & ATI_PCIGART_PAGE_MASK;
161 switch(gart_info->gart_reg_if) {
162 case DRM_ATI_GART_IGP:
163 page_base |= (upper_32_bits(entry_addr) & 0xff) << 4;
164 page_base |= ATI_PCIE_READ | ATI_PCIE_WRITE;
166 case DRM_ATI_GART_PCIE:
168 page_base |= (upper_32_bits(entry_addr) & 0xff) << 24;
172 case DRM_ATI_GART_PCI:
175 *pci_gart = cpu_to_le32(page_base);
177 entry_addr += ATI_PCIGART_PAGE_SIZE;
183 #if defined(__i386__) || defined(__x86_64__)
190 gart_info->addr = address;
191 gart_info->bus_addr = bus_address;
194 EXPORT_SYMBOL(drm_ati_pcigart_init);