2 * Copyright 2006-2007 Advanced Micro Devices, Inc.
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
22 /* based on stg/asic_reg/drivers/inc/asic_reg/ObjectID.h ver 23 */
31 /****************************************************/
32 /* Graphics Object Type Definition */
33 /****************************************************/
34 #define GRAPH_OBJECT_TYPE_NONE 0x0
35 #define GRAPH_OBJECT_TYPE_GPU 0x1
36 #define GRAPH_OBJECT_TYPE_ENCODER 0x2
37 #define GRAPH_OBJECT_TYPE_CONNECTOR 0x3
38 #define GRAPH_OBJECT_TYPE_ROUTER 0x4
41 /****************************************************/
42 /* Encoder Object ID Definition */
43 /****************************************************/
44 #define ENCODER_OBJECT_ID_NONE 0x00
46 /* Radeon Class Display Hardware */
47 #define ENCODER_OBJECT_ID_INTERNAL_LVDS 0x01
48 #define ENCODER_OBJECT_ID_INTERNAL_TMDS1 0x02
49 #define ENCODER_OBJECT_ID_INTERNAL_TMDS2 0x03
50 #define ENCODER_OBJECT_ID_INTERNAL_DAC1 0x04
51 #define ENCODER_OBJECT_ID_INTERNAL_DAC2 0x05 /* TV/CV DAC */
52 #define ENCODER_OBJECT_ID_INTERNAL_SDVOA 0x06
53 #define ENCODER_OBJECT_ID_INTERNAL_SDVOB 0x07
55 /* External Third Party Encoders */
56 #define ENCODER_OBJECT_ID_SI170B 0x08
57 #define ENCODER_OBJECT_ID_CH7303 0x09
58 #define ENCODER_OBJECT_ID_CH7301 0x0A
59 #define ENCODER_OBJECT_ID_INTERNAL_DVO1 0x0B /* This belongs to Radeon Class Display Hardware */
60 #define ENCODER_OBJECT_ID_EXTERNAL_SDVOA 0x0C
61 #define ENCODER_OBJECT_ID_EXTERNAL_SDVOB 0x0D
62 #define ENCODER_OBJECT_ID_TITFP513 0x0E
63 #define ENCODER_OBJECT_ID_INTERNAL_LVTM1 0x0F /* not used for Radeon */
64 #define ENCODER_OBJECT_ID_VT1623 0x10
65 #define ENCODER_OBJECT_ID_HDMI_SI1930 0x11
66 #define ENCODER_OBJECT_ID_HDMI_INTERNAL 0x12
67 /* Kaleidoscope (KLDSCP) Class Display Hardware (internal) */
68 #define ENCODER_OBJECT_ID_INTERNAL_KLDSCP_TMDS1 0x13
69 #define ENCODER_OBJECT_ID_INTERNAL_KLDSCP_DVO1 0x14
70 #define ENCODER_OBJECT_ID_INTERNAL_KLDSCP_DAC1 0x15
71 #define ENCODER_OBJECT_ID_INTERNAL_KLDSCP_DAC2 0x16 /* Shared with CV/TV and CRT */
72 #define ENCODER_OBJECT_ID_SI178 0X17 /* External TMDS (dual link, no HDCP.) */
73 #define ENCODER_OBJECT_ID_MVPU_FPGA 0x18 /* MVPU FPGA chip */
74 #define ENCODER_OBJECT_ID_INTERNAL_DDI 0x19
75 #define ENCODER_OBJECT_ID_VT1625 0x1A
76 #define ENCODER_OBJECT_ID_HDMI_SI1932 0x1B
77 #define ENCODER_OBJECT_ID_DP_AN9801 0x1C
78 #define ENCODER_OBJECT_ID_DP_DP501 0x1D
79 #define ENCODER_OBJECT_ID_INTERNAL_UNIPHY 0x1E
80 #define ENCODER_OBJECT_ID_INTERNAL_KLDSCP_LVTMA 0x1F
82 /****************************************************/
83 /* Connector Object ID Definition */
84 /****************************************************/
85 #define CONNECTOR_OBJECT_ID_NONE 0x00
86 #define CONNECTOR_OBJECT_ID_SINGLE_LINK_DVI_I 0x01
87 #define CONNECTOR_OBJECT_ID_DUAL_LINK_DVI_I 0x02
88 #define CONNECTOR_OBJECT_ID_SINGLE_LINK_DVI_D 0x03
89 #define CONNECTOR_OBJECT_ID_DUAL_LINK_DVI_D 0x04
90 #define CONNECTOR_OBJECT_ID_VGA 0x05
91 #define CONNECTOR_OBJECT_ID_COMPOSITE 0x06
92 #define CONNECTOR_OBJECT_ID_SVIDEO 0x07
93 #define CONNECTOR_OBJECT_ID_YPbPr 0x08
94 #define CONNECTOR_OBJECT_ID_D_CONNECTOR 0x09
95 #define CONNECTOR_OBJECT_ID_9PIN_DIN 0x0A /* Supports both CV & TV */
96 #define CONNECTOR_OBJECT_ID_SCART 0x0B
97 #define CONNECTOR_OBJECT_ID_HDMI_TYPE_A 0x0C
98 #define CONNECTOR_OBJECT_ID_HDMI_TYPE_B 0x0D
99 #define CONNECTOR_OBJECT_ID_LVDS 0x0E
100 #define CONNECTOR_OBJECT_ID_7PIN_DIN 0x0F
101 #define CONNECTOR_OBJECT_ID_PCIE_CONNECTOR 0x10
102 #define CONNECTOR_OBJECT_ID_CROSSFIRE 0x11
103 #define CONNECTOR_OBJECT_ID_HARDCODE_DVI 0x12
104 #define CONNECTOR_OBJECT_ID_DISPLAYPORT 0x13
108 /****************************************************/
109 /* Router Object ID Definition */
110 /****************************************************/
111 #define ROUTER_OBJECT_ID_NONE 0x00
112 #define ROUTER_OBJECT_ID_I2C_EXTENDER_CNTL 0x01
114 /****************************************************/
115 // Graphics Object ENUM ID Definition */
116 /****************************************************/
117 #define GRAPH_OBJECT_ENUM_ID1 0x01
118 #define GRAPH_OBJECT_ENUM_ID2 0x02
119 #define GRAPH_OBJECT_ENUM_ID3 0x03
120 #define GRAPH_OBJECT_ENUM_ID4 0x04
122 /****************************************************/
123 /* Graphics Object ID Bit definition */
124 /****************************************************/
125 #define OBJECT_ID_MASK 0x00FF
126 #define ENUM_ID_MASK 0x0700
127 #define RESERVED1_ID_MASK 0x0800
128 #define OBJECT_TYPE_MASK 0x7000
129 #define RESERVED2_ID_MASK 0x8000
131 #define OBJECT_ID_SHIFT 0x00
132 #define ENUM_ID_SHIFT 0x08
133 #define OBJECT_TYPE_SHIFT 0x0C
136 /****************************************************/
137 /* Graphics Object family definition */
138 /****************************************************/
139 #define CONSTRUCTOBJECTFAMILYID(GRAPHICS_OBJECT_TYPE, GRAPHICS_OBJECT_ID) (GRAPHICS_OBJECT_TYPE << OBJECT_TYPE_SHIFT | \
140 GRAPHICS_OBJECT_ID << OBJECT_ID_SHIFT)
141 /****************************************************/
142 /* GPU Object ID definition - Shared with BIOS */
143 /****************************************************/
144 #define GPU_ENUM_ID1 ( GRAPH_OBJECT_TYPE_GPU << OBJECT_TYPE_SHIFT |\
145 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT)
147 /****************************************************/
148 /* Encoder Object ID definition - Shared with BIOS */
149 /****************************************************/
151 #define ENCODER_INTERNAL_LVDS_ENUM_ID1 0x2101
152 #define ENCODER_INTERNAL_TMDS1_ENUM_ID1 0x2102
153 #define ENCODER_INTERNAL_TMDS2_ENUM_ID1 0x2103
154 #define ENCODER_INTERNAL_DAC1_ENUM_ID1 0x2104
155 #define ENCODER_INTERNAL_DAC2_ENUM_ID1 0x2105
156 #define ENCODER_INTERNAL_SDVOA_ENUM_ID1 0x2106
157 #define ENCODER_INTERNAL_SDVOB_ENUM_ID1 0x2107
158 #define ENCODER_SIL170B_ENUM_ID1 0x2108
159 #define ENCODER_CH7303_ENUM_ID1 0x2109
160 #define ENCODER_CH7301_ENUM_ID1 0x210A
161 #define ENCODER_INTERNAL_DVO1_ENUM_ID1 0x210B
162 #define ENCODER_EXTERNAL_SDVOA_ENUM_ID1 0x210C
163 #define ENCODER_EXTERNAL_SDVOB_ENUM_ID1 0x210D
164 #define ENCODER_TITFP513_ENUM_ID1 0x210E
165 #define ENCODER_INTERNAL_LVTM1_ENUM_ID1 0x210F
166 #define ENCODER_VT1623_ENUM_ID1 0x2110
167 #define ENCODER_HDMI_SI1930_ENUM_ID1 0x2111
168 #define ENCODER_HDMI_INTERNAL_ENUM_ID1 0x2112
169 #define ENCODER_INTERNAL_KLDSCP_TMDS1_ENUM_ID1 0x2113
170 #define ENCODER_INTERNAL_KLDSCP_DVO1_ENUM_ID1 0x2114
171 #define ENCODER_INTERNAL_KLDSCP_DAC1_ENUM_ID1 0x2115
172 #define ENCODER_INTERNAL_KLDSCP_DAC2_ENUM_ID1 0x2116
173 #define ENCODER_SI178_ENUM_ID1 0x2117
174 #define ENCODER_MVPU_FPGA_ENUM_ID1 0x2118
175 #define ENCODER_INTERNAL_DDI_ENUM_ID1 0x2119
176 #define ENCODER_VT1625_ENUM_ID1 0x211A
177 #define ENCODER_HDMI_SI1932_ENUM_ID1 0x211B
178 #define ENCODER_ENCODER_DP_AN9801_ENUM_ID1 0x211C
179 #define ENCODER_DP_DP501_ENUM_ID1 0x211D
180 #define ENCODER_INTERNAL_UNIPHY_ENUM_ID1 0x211E
182 #define ENCODER_INTERNAL_LVDS_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
183 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
184 ENCODER_OBJECT_ID_INTERNAL_LVDS << OBJECT_ID_SHIFT)
186 #define ENCODER_INTERNAL_TMDS1_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
187 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
188 ENCODER_OBJECT_ID_INTERNAL_TMDS1 << OBJECT_ID_SHIFT)
190 #define ENCODER_INTERNAL_TMDS2_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
191 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
192 ENCODER_OBJECT_ID_INTERNAL_TMDS2 << OBJECT_ID_SHIFT)
194 #define ENCODER_INTERNAL_DAC1_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
195 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
196 ENCODER_OBJECT_ID_INTERNAL_DAC1 << OBJECT_ID_SHIFT)
198 #define ENCODER_INTERNAL_DAC2_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
199 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
200 ENCODER_OBJECT_ID_INTERNAL_DAC2 << OBJECT_ID_SHIFT)
202 #define ENCODER_INTERNAL_SDVOA_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
203 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
204 ENCODER_OBJECT_ID_INTERNAL_SDVOA << OBJECT_ID_SHIFT)
206 #define ENCODER_INTERNAL_SDVOA_ENUM_ID2 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
207 GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\
208 ENCODER_OBJECT_ID_INTERNAL_SDVOA << OBJECT_ID_SHIFT)
210 #define ENCODER_INTERNAL_SDVOB_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
211 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
212 ENCODER_OBJECT_ID_INTERNAL_SDVOB << OBJECT_ID_SHIFT)
214 #define ENCODER_SIL170B_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
215 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
216 ENCODER_OBJECT_ID_SI170B << OBJECT_ID_SHIFT)
218 #define ENCODER_CH7303_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
219 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
220 ENCODER_OBJECT_ID_CH7303 << OBJECT_ID_SHIFT)
222 #define ENCODER_CH7301_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
223 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
224 ENCODER_OBJECT_ID_CH7301 << OBJECT_ID_SHIFT)
226 #define ENCODER_INTERNAL_DVO1_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
227 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
228 ENCODER_OBJECT_ID_INTERNAL_DVO1 << OBJECT_ID_SHIFT)
230 #define ENCODER_EXTERNAL_SDVOA_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
231 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
232 ENCODER_OBJECT_ID_EXTERNAL_SDVOA << OBJECT_ID_SHIFT)
234 #define ENCODER_EXTERNAL_SDVOA_ENUM_ID2 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
235 GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\
236 ENCODER_OBJECT_ID_EXTERNAL_SDVOA << OBJECT_ID_SHIFT)
239 #define ENCODER_EXTERNAL_SDVOB_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
240 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
241 ENCODER_OBJECT_ID_EXTERNAL_SDVOB << OBJECT_ID_SHIFT)
244 #define ENCODER_TITFP513_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
245 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
246 ENCODER_OBJECT_ID_TITFP513 << OBJECT_ID_SHIFT)
248 #define ENCODER_INTERNAL_LVTM1_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
249 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
250 ENCODER_OBJECT_ID_INTERNAL_LVTM1 << OBJECT_ID_SHIFT)
252 #define ENCODER_VT1623_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
253 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
254 ENCODER_OBJECT_ID_VT1623 << OBJECT_ID_SHIFT)
256 #define ENCODER_HDMI_SI1930_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
257 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
258 ENCODER_OBJECT_ID_HDMI_SI1930 << OBJECT_ID_SHIFT)
260 #define ENCODER_HDMI_INTERNAL_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
261 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
262 ENCODER_OBJECT_ID_HDMI_INTERNAL << OBJECT_ID_SHIFT)
264 #define ENCODER_INTERNAL_KLDSCP_TMDS1_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
265 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
266 ENCODER_OBJECT_ID_INTERNAL_KLDSCP_TMDS1 << OBJECT_ID_SHIFT)
269 #define ENCODER_INTERNAL_KLDSCP_TMDS1_ENUM_ID2 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
270 GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\
271 ENCODER_OBJECT_ID_INTERNAL_KLDSCP_TMDS1 << OBJECT_ID_SHIFT)
274 #define ENCODER_INTERNAL_KLDSCP_DVO1_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
275 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
276 ENCODER_OBJECT_ID_INTERNAL_KLDSCP_DVO1 << OBJECT_ID_SHIFT)
278 #define ENCODER_INTERNAL_KLDSCP_DAC1_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
279 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
280 ENCODER_OBJECT_ID_INTERNAL_KLDSCP_DAC1 << OBJECT_ID_SHIFT)
282 #define ENCODER_INTERNAL_KLDSCP_DAC2_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
283 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
284 ENCODER_OBJECT_ID_INTERNAL_KLDSCP_DAC2 << OBJECT_ID_SHIFT) // Shared with CV/TV and CRT
286 #define ENCODER_SI178_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
287 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
288 ENCODER_OBJECT_ID_SI178 << OBJECT_ID_SHIFT)
290 #define ENCODER_MVPU_FPGA_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
291 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
292 ENCODER_OBJECT_ID_MVPU_FPGA << OBJECT_ID_SHIFT)
294 #define ENCODER_INTERNAL_DDI_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
295 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
296 ENCODER_OBJECT_ID_INTERNAL_DDI << OBJECT_ID_SHIFT)
298 #define ENCODER_VT1625_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
299 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
300 ENCODER_OBJECT_ID_VT1625 << OBJECT_ID_SHIFT)
302 #define ENCODER_HDMI_SI1932_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
303 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
304 ENCODER_OBJECT_ID_HDMI_SI1932 << OBJECT_ID_SHIFT)
306 #define ENCODER_DP_DP501_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
307 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
308 ENCODER_OBJECT_ID_DP_DP501 << OBJECT_ID_SHIFT)
310 #define ENCODER_DP_AN9801_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
311 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
312 ENCODER_OBJECT_ID_DP_AN9801 << OBJECT_ID_SHIFT)
314 #define ENCODER_INTERNAL_UNIPHY_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
315 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
316 ENCODER_OBJECT_ID_INTERNAL_UNIPHY << OBJECT_ID_SHIFT)
318 #define ENCODER_INTERNAL_UNIPHY_ENUM_ID2 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
319 GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\
320 ENCODER_OBJECT_ID_INTERNAL_UNIPHY << OBJECT_ID_SHIFT)
322 #define ENCODER_INTERNAL_KLDSCP_LVTMA_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
323 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
324 ENCODER_OBJECT_ID_INTERNAL_KLDSCP_LVTMA << OBJECT_ID_SHIFT)
326 /****************************************************/
327 /* Connector Object ID definition - Shared with BIOS */
328 /****************************************************/
330 #define CONNECTOR_SINGLE_LINK_DVI_I_ENUM_ID1 0x3101
331 #define CONNECTOR_DUAL_LINK_DVI_I_ENUM_ID1 0x3102
332 #define CONNECTOR_SINGLE_LINK_DVI_D_ENUM_ID1 0x3103
333 #define CONNECTOR_DUAL_LINK_DVI_D_ENUM_ID1 0x3104
334 #define CONNECTOR_VGA_ENUM_ID1 0x3105
335 #define CONNECTOR_COMPOSITE_ENUM_ID1 0x3106
336 #define CONNECTOR_SVIDEO_ENUM_ID1 0x3107
337 #define CONNECTOR_YPbPr_ENUM_ID1 0x3108
338 #define CONNECTOR_D_CONNECTORE_ENUM_ID1 0x3109
339 #define CONNECTOR_9PIN_DIN_ENUM_ID1 0x310A
340 #define CONNECTOR_SCART_ENUM_ID1 0x310B
341 #define CONNECTOR_HDMI_TYPE_A_ENUM_ID1 0x310C
342 #define CONNECTOR_HDMI_TYPE_B_ENUM_ID1 0x310D
343 #define CONNECTOR_LVDS_ENUM_ID1 0x310E
344 #define CONNECTOR_7PIN_DIN_ENUM_ID1 0x310F
345 #define CONNECTOR_PCIE_CONNECTOR_ENUM_ID1 0x3110
347 #define CONNECTOR_LVDS_ENUM_ID1 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
348 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
349 CONNECTOR_OBJECT_ID_LVDS << OBJECT_ID_SHIFT)
351 #define CONNECTOR_SINGLE_LINK_DVI_I_ENUM_ID1 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
352 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
353 CONNECTOR_OBJECT_ID_SINGLE_LINK_DVI_I << OBJECT_ID_SHIFT)
355 #define CONNECTOR_SINGLE_LINK_DVI_I_ENUM_ID2 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
356 GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\
357 CONNECTOR_OBJECT_ID_SINGLE_LINK_DVI_I << OBJECT_ID_SHIFT)
359 #define CONNECTOR_DUAL_LINK_DVI_I_ENUM_ID1 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
360 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
361 CONNECTOR_OBJECT_ID_DUAL_LINK_DVI_I << OBJECT_ID_SHIFT)
363 #define CONNECTOR_DUAL_LINK_DVI_I_ENUM_ID2 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
364 GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\
365 CONNECTOR_OBJECT_ID_DUAL_LINK_DVI_I << OBJECT_ID_SHIFT)
367 #define CONNECTOR_SINGLE_LINK_DVI_D_ENUM_ID1 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
368 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
369 CONNECTOR_OBJECT_ID_SINGLE_LINK_DVI_D << OBJECT_ID_SHIFT)
371 #define CONNECTOR_SINGLE_LINK_DVI_D_ENUM_ID2 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
372 GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\
373 CONNECTOR_OBJECT_ID_SINGLE_LINK_DVI_D << OBJECT_ID_SHIFT)
375 #define CONNECTOR_DUAL_LINK_DVI_D_ENUM_ID1 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
376 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
377 CONNECTOR_OBJECT_ID_DUAL_LINK_DVI_D << OBJECT_ID_SHIFT)
379 #define CONNECTOR_VGA_ENUM_ID1 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
380 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
381 CONNECTOR_OBJECT_ID_VGA << OBJECT_ID_SHIFT)
383 #define CONNECTOR_VGA_ENUM_ID2 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
384 GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\
385 CONNECTOR_OBJECT_ID_VGA << OBJECT_ID_SHIFT)
387 #define CONNECTOR_COMPOSITE_ENUM_ID1 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
388 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
389 CONNECTOR_OBJECT_ID_COMPOSITE << OBJECT_ID_SHIFT)
391 #define CONNECTOR_SVIDEO_ENUM_ID1 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
392 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
393 CONNECTOR_OBJECT_ID_SVIDEO << OBJECT_ID_SHIFT)
395 #define CONNECTOR_YPbPr_ENUM_ID1 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
396 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
397 CONNECTOR_OBJECT_ID_YPbPr << OBJECT_ID_SHIFT)
399 #define CONNECTOR_D_CONNECTOR_ENUM_ID1 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
400 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
401 CONNECTOR_OBJECT_ID_D_CONNECTOR << OBJECT_ID_SHIFT)
403 #define CONNECTOR_9PIN_DIN_ENUM_ID1 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
404 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
405 CONNECTOR_OBJECT_ID_9PIN_DIN << OBJECT_ID_SHIFT)
407 #define CONNECTOR_SCART_ENUM_ID1 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
408 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
409 CONNECTOR_OBJECT_ID_SCART << OBJECT_ID_SHIFT)
411 #define CONNECTOR_HDMI_TYPE_A_ENUM_ID1 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
412 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
413 CONNECTOR_OBJECT_ID_HDMI_TYPE_A << OBJECT_ID_SHIFT)
415 #define CONNECTOR_HDMI_TYPE_B_ENUM_ID1 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
416 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
417 CONNECTOR_OBJECT_ID_HDMI_TYPE_B << OBJECT_ID_SHIFT)
419 #define CONNECTOR_7PIN_DIN_ENUM_ID1 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
420 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
421 CONNECTOR_OBJECT_ID_7PIN_DIN << OBJECT_ID_SHIFT)
423 #define CONNECTOR_PCIE_CONNECTOR_ENUM_ID1 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
424 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
425 CONNECTOR_OBJECT_ID_PCIE_CONNECTOR << OBJECT_ID_SHIFT)
427 #define CONNECTOR_PCIE_CONNECTOR_ENUM_ID2 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
428 GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\
429 CONNECTOR_OBJECT_ID_PCIE_CONNECTOR << OBJECT_ID_SHIFT)
431 #define CONNECTOR_CROSSFIRE_ENUM_ID1 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
432 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
433 CONNECTOR_OBJECT_ID_CROSSFIRE << OBJECT_ID_SHIFT)
435 #define CONNECTOR_CROSSFIRE_ENUM_ID2 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
436 GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\
437 CONNECTOR_OBJECT_ID_CROSSFIRE << OBJECT_ID_SHIFT)
440 #define CONNECTOR_HARDCODE_DVI_ENUM_ID1 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
441 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
442 CONNECTOR_OBJECT_ID_HARDCODE_DVI << OBJECT_ID_SHIFT)
444 #define CONNECTOR_HARDCODE_DVI_ENUM_ID2 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
445 GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\
446 CONNECTOR_OBJECT_ID_HARDCODE_DVI << OBJECT_ID_SHIFT)
448 #define CONNECTOR_DISPLAYPORT_ENUM_ID1 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
449 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
450 CONNECTOR_OBJECT_ID_DISPLAYPORT << OBJECT_ID_SHIFT)
452 #define CONNECTOR_DISPLAYPORT_ENUM_ID2 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
453 GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\
454 CONNECTOR_OBJECT_ID_DISPLAYPORT << OBJECT_ID_SHIFT)
456 /****************************************************/
457 /* Router Object ID definition - Shared with BIOS */
458 /****************************************************/
459 #define ROUTER_I2C_EXTENDER_CNTL_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ROUTER << OBJECT_TYPE_SHIFT |\
460 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
461 ROUTER_OBJECT_ID_I2C_EXTENDER_CNTL << OBJECT_ID_SHIFT)
465 /****************************************************/
466 /* Object Cap definition - Shared with BIOS */
467 /****************************************************/
468 #define GRAPHICS_OBJECT_CAP_I2C 0x00000001L
469 #define GRAPHICS_OBJECT_CAP_TABLE_ID 0x00000002L
472 #define GRAPHICS_OBJECT_I2CCOMMAND_TABLE_ID 0x01
473 #define GRAPHICS_OBJECT_HOTPLUGDETECTIONINTERUPT_TABLE_ID 0x02
474 #define GRAPHICS_OBJECT_ENCODER_OUTPUT_PROTECTION_TABLE_ID 0x03
480 #endif /*GRAPHICTYPE */