1 /* mga_drv.h -- Private header for the Matrox g200/g400 driver -*- linux-c -*-
2 * Created: Mon Dec 13 01:50:01 1999 by jhartmann@precisioninsight.com
4 * Copyright 1999 Precision Insight, Inc., Cedar Park, Texas.
7 * Permission is hereby granted, free of charge, to any person obtaining a
8 * copy of this software and associated documentation files (the "Software"),
9 * to deal in the Software without restriction, including without limitation
10 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
11 * and/or sell copies of the Software, and to permit persons to whom the
12 * Software is furnished to do so, subject to the following conditions:
14 * The above copyright notice and this permission notice (including the next
15 * paragraph) shall be included in all copies or substantial portions of the
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
19 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
20 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
21 * PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
22 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
23 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
24 * DEALINGS IN THE SOFTWARE.
26 * Authors: Rickard E. (Rik) Faith <faith@precisioninsight.com>
27 * Jeff Hartmann <jhartmann@precisioninsight.com>
36 unsigned int num_dwords;
37 unsigned int max_dwords;
46 atomic_t needs_overflow;
49 typedef struct _drm_mga_freelist {
52 struct _drm_mga_freelist *next;
53 struct _drm_mga_freelist *prev;
56 typedef struct _drm_mga_private {
59 drm_mga_sarea_t *sarea_priv;
72 drm_mga_warp_index_t WarpIndex[MGA_MAX_G400_PIPES];
73 unsigned int WarpPipe;
74 __volatile__ unsigned long softrap_age;
78 atomic_t pending_bufs;
79 unsigned int last_sync_tag;
80 unsigned int sync_tag;
82 unsigned long real_status_page;
84 drm_mga_prim_buf_t **prim_bufs;
85 drm_mga_prim_buf_t *next_prim;
86 drm_mga_prim_buf_t *last_prim;
87 drm_mga_prim_buf_t *current_prim;
89 struct pci_dev *device;
90 drm_mga_freelist_t *head;
91 drm_mga_freelist_t *tail;
92 wait_queue_head_t flush_queue; /* Processes waiting until flush */
93 wait_queue_head_t wait_queue; /* Processes waiting until interrupt */
95 /* Some validated register values:
101 extern int mga_init(void);
102 extern void mga_cleanup(void);
103 extern int mga_version(struct inode *inode, struct file *filp,
104 unsigned int cmd, unsigned long arg);
105 extern int mga_open(struct inode *inode, struct file *filp);
106 extern int mga_release(struct inode *inode, struct file *filp);
107 extern int mga_ioctl(struct inode *inode, struct file *filp,
108 unsigned int cmd, unsigned long arg);
109 extern int mga_unlock(struct inode *inode, struct file *filp,
110 unsigned int cmd, unsigned long arg);
113 extern int mga_dma_schedule(drm_device_t *dev, int locked);
114 extern int mga_dma(struct inode *inode, struct file *filp,
115 unsigned int cmd, unsigned long arg);
116 extern int mga_irq_install(drm_device_t *dev, int irq);
117 extern int mga_irq_uninstall(drm_device_t *dev);
118 extern int mga_control(struct inode *inode, struct file *filp,
119 unsigned int cmd, unsigned long arg);
120 extern int mga_lock(struct inode *inode, struct file *filp,
121 unsigned int cmd, unsigned long arg);
123 /* mga_dma_init does init and release */
124 extern int mga_dma_init(struct inode *inode, struct file *filp,
125 unsigned int cmd, unsigned long arg);
126 extern int mga_dma_cleanup(drm_device_t *dev);
127 extern int mga_flush_ioctl(struct inode *inode, struct file *filp,
128 unsigned int cmd, unsigned long arg);
130 extern unsigned int mga_create_sync_tag(drm_device_t *dev);
131 extern drm_buf_t *mga_freelist_get(drm_device_t *dev);
132 extern int mga_freelist_put(drm_device_t *dev, drm_buf_t *buf);
133 extern int mga_advance_primary(drm_device_t *dev);
137 extern int mga_addbufs(struct inode *inode, struct file *filp,
138 unsigned int cmd, unsigned long arg);
139 extern int mga_infobufs(struct inode *inode, struct file *filp,
140 unsigned int cmd, unsigned long arg);
141 extern int mga_markbufs(struct inode *inode, struct file *filp,
142 unsigned int cmd, unsigned long arg);
143 extern int mga_freebufs(struct inode *inode, struct file *filp,
144 unsigned int cmd, unsigned long arg);
145 extern int mga_mapbufs(struct inode *inode, struct file *filp,
146 unsigned int cmd, unsigned long arg);
147 extern int mga_addmap(struct inode *inode, struct file *filp,
148 unsigned int cmd, unsigned long arg);
150 extern int mga_clear_bufs(struct inode *inode, struct file *filp,
151 unsigned int cmd, unsigned long arg);
152 extern int mga_swap_bufs(struct inode *inode, struct file *filp,
153 unsigned int cmd, unsigned long arg);
154 extern int mga_iload(struct inode *inode, struct file *filp,
155 unsigned int cmd, unsigned long arg);
156 extern int mga_vertex(struct inode *inode, struct file *filp,
157 unsigned int cmd, unsigned long arg);
159 extern int mga_resctx(struct inode *inode, struct file *filp,
160 unsigned int cmd, unsigned long arg);
161 extern int mga_addctx(struct inode *inode, struct file *filp,
162 unsigned int cmd, unsigned long arg);
163 extern int mga_modctx(struct inode *inode, struct file *filp,
164 unsigned int cmd, unsigned long arg);
165 extern int mga_getctx(struct inode *inode, struct file *filp,
166 unsigned int cmd, unsigned long arg);
167 extern int mga_switchctx(struct inode *inode, struct file *filp,
168 unsigned int cmd, unsigned long arg);
169 extern int mga_newctx(struct inode *inode, struct file *filp,
170 unsigned int cmd, unsigned long arg);
171 extern int mga_rmctx(struct inode *inode, struct file *filp,
172 unsigned int cmd, unsigned long arg);
174 extern int mga_context_switch(drm_device_t *dev, int old, int new);
175 extern int mga_context_switch_complete(drm_device_t *dev, int new);
186 drm_mga_freelist_t *my_freelist;
188 } drm_mga_buf_priv_t;
190 #define DWGREG0 0x1c00
191 #define DWGREG0_END 0x1dff
192 #define DWGREG1 0x2c00
193 #define DWGREG1_END 0x2dff
195 #define ISREG0(r) (r >= DWGREG0 && r <= DWGREG0_END)
196 #define ADRINDEX0(r) (u8)((r - DWGREG0) >> 2)
197 #define ADRINDEX1(r) (u8)(((r - DWGREG1) >> 2) | 0x80)
198 #define ADRINDEX(r) (ISREG0(r) ? ADRINDEX0(r) : ADRINDEX1(r))
200 #define MGA_VERBOSE 0
201 #define MGA_NUM_PRIM_BUFS 8
203 #define PRIMLOCALS u8 tempIndex[4]; u32 *dma_ptr; u32 phys_head; \
204 int outcount, num_dwords
206 #define PRIM_OVERFLOW(dev, dev_priv, length) do { \
207 drm_mga_prim_buf_t *tmp_buf = \
208 dev_priv->prim_bufs[dev_priv->current_prim_idx]; \
209 if( tmp_buf->max_dwords - tmp_buf->num_dwords < length || \
210 tmp_buf->sec_used > MGA_DMA_BUF_NR/2) { \
211 atomic_set(&tmp_buf->force_fire, 1); \
212 mga_advance_primary(dev); \
213 mga_dma_schedule(dev, 1); \
214 } else if( atomic_read(&tmp_buf->needs_overflow)) { \
215 mga_advance_primary(dev); \
216 mga_dma_schedule(dev, 1); \
220 #define PRIMGETPTR(dev_priv) do { \
221 drm_mga_prim_buf_t *tmp_buf = \
222 dev_priv->prim_bufs[dev_priv->current_prim_idx]; \
224 DRM_DEBUG("PRIMGETPTR in %s\n", __FUNCTION__); \
225 dma_ptr = tmp_buf->current_dma_ptr; \
226 num_dwords = tmp_buf->num_dwords; \
227 phys_head = tmp_buf->phys_head; \
231 #define PRIMPTR(prim_buf) do { \
233 DRM_DEBUG("PRIMPTR in %s\n", __FUNCTION__); \
234 dma_ptr = prim_buf->current_dma_ptr; \
235 num_dwords = prim_buf->num_dwords; \
236 phys_head = prim_buf->phys_head; \
240 #define PRIMFINISH(prim_buf) do { \
242 DRM_DEBUG( "PRIMFINISH in %s\n", __FUNCTION__); \
244 DRM_DEBUG(" --- truncation\n"); \
246 prim_buf->num_dwords = num_dwords; \
247 prim_buf->current_dma_ptr = dma_ptr; \
250 #define PRIMADVANCE(dev_priv) do { \
251 drm_mga_prim_buf_t *tmp_buf = \
252 dev_priv->prim_bufs[dev_priv->current_prim_idx]; \
254 DRM_DEBUG("PRIMADVANCE in %s\n", __FUNCTION__); \
256 DRM_DEBUG(" --- truncation\n"); \
258 tmp_buf->num_dwords = num_dwords; \
259 tmp_buf->current_dma_ptr = dma_ptr; \
262 #define PRIMUPDATE(dev_priv) do { \
263 drm_mga_prim_buf_t *tmp_buf = \
264 dev_priv->prim_bufs[dev_priv->current_prim_idx]; \
265 tmp_buf->sec_used++; \
268 #define PRIMOUTREG(reg, val) do { \
269 tempIndex[outcount]=ADRINDEX(reg); \
270 dma_ptr[1+outcount] = val; \
272 DRM_DEBUG(" PRIMOUT %d: 0x%x -- 0x%x\n", \
273 num_dwords + 1 + outcount, ADRINDEX(reg), val); \
274 if( ++outcount == 4) { \
276 dma_ptr[0] = *(u32 *)tempIndex; \
282 /* A reduced set of the mga registers.
285 #define MGAREG_MGA_EXEC 0x0100
286 #define MGAREG_ALPHACTRL 0x2c7c
287 #define MGAREG_AR0 0x1c60
288 #define MGAREG_AR1 0x1c64
289 #define MGAREG_AR2 0x1c68
290 #define MGAREG_AR3 0x1c6c
291 #define MGAREG_AR4 0x1c70
292 #define MGAREG_AR5 0x1c74
293 #define MGAREG_AR6 0x1c78
294 #define MGAREG_CXBNDRY 0x1c80
295 #define MGAREG_CXLEFT 0x1ca0
296 #define MGAREG_CXRIGHT 0x1ca4
297 #define MGAREG_DMAPAD 0x1c54
298 #define MGAREG_DSTORG 0x2cb8
299 #define MGAREG_DWGCTL 0x1c00
300 #define MGAREG_DWGSYNC 0x2c4c
301 #define MGAREG_FCOL 0x1c24
302 #define MGAREG_FIFOSTATUS 0x1e10
303 #define MGAREG_FOGCOL 0x1cf4
304 #define MGAREG_FXBNDRY 0x1c84
305 #define MGAREG_FXLEFT 0x1ca8
306 #define MGAREG_FXRIGHT 0x1cac
307 #define MGAREG_ICLEAR 0x1e18
308 #define MGAREG_IEN 0x1e1c
309 #define MGAREG_LEN 0x1c5c
310 #define MGAREG_MACCESS 0x1c04
311 #define MGAREG_PITCH 0x1c8c
312 #define MGAREG_PLNWT 0x1c1c
313 #define MGAREG_PRIMADDRESS 0x1e58
314 #define MGAREG_PRIMEND 0x1e5c
315 #define MGAREG_PRIMPTR 0x1e50
316 #define MGAREG_SECADDRESS 0x2c40
317 #define MGAREG_SECEND 0x2c44
318 #define MGAREG_SETUPADDRESS 0x2cd0
319 #define MGAREG_SETUPEND 0x2cd4
320 #define MGAREG_SOFTRAP 0x2c48
321 #define MGAREG_SRCORG 0x2cb4
322 #define MGAREG_STATUS 0x1e14
323 #define MGAREG_STENCIL 0x2cc8
324 #define MGAREG_STENCILCTL 0x2ccc
325 #define MGAREG_TDUALSTAGE0 0x2cf8
326 #define MGAREG_TDUALSTAGE1 0x2cfc
327 #define MGAREG_TEXBORDERCOL 0x2c5c
328 #define MGAREG_TEXCTL 0x2c30
329 #define MGAREG_TEXCTL2 0x2c3c
330 #define MGAREG_TEXFILTER 0x2c58
331 #define MGAREG_TEXHEIGHT 0x2c2c
332 #define MGAREG_TEXORG 0x2c24
333 #define MGAREG_TEXORG1 0x2ca4
334 #define MGAREG_TEXORG2 0x2ca8
335 #define MGAREG_TEXORG3 0x2cac
336 #define MGAREG_TEXORG4 0x2cb0
337 #define MGAREG_TEXTRANS 0x2c34
338 #define MGAREG_TEXTRANSHIGH 0x2c38
339 #define MGAREG_TEXWIDTH 0x2c28
340 #define MGAREG_WACCEPTSEQ 0x1dd4
341 #define MGAREG_WCODEADDR 0x1e6c
342 #define MGAREG_WFLAG 0x1dc4
343 #define MGAREG_WFLAG1 0x1de0
344 #define MGAREG_WFLAGNB 0x1e64
345 #define MGAREG_WFLAGNB1 0x1e08
346 #define MGAREG_WGETMSB 0x1dc8
347 #define MGAREG_WIADDR 0x1dc0
348 #define MGAREG_WIADDR2 0x1dd8
349 #define MGAREG_WMISC 0x1e70
350 #define MGAREG_WVRTXSZ 0x1dcc
351 #define MGAREG_YBOT 0x1c9c
352 #define MGAREG_YDST 0x1c90
353 #define MGAREG_YDSTLEN 0x1c88
354 #define MGAREG_YDSTORG 0x1c94
355 #define MGAREG_YTOP 0x1c98
356 #define MGAREG_ZORG 0x1c0c
358 #define DC_atype_rstr 0x10
359 #define DC_atype_blk 0x40
360 #define PDEA_pagpxfer_enable 0x2
361 #define WIA_wmode_suspend 0x0
362 #define WIA_wmode_start 0x3
363 #define WIA_wagp_agp 0x4
364 #define DC_opcod_trap 0x4
365 #define DC_arzero_enable 0x1000
366 #define DC_sgnzero_enable 0x2000
367 #define DC_shftzero_enable 0x4000
368 #define DC_bop_SHIFT 16
369 #define DC_clipdis_enable 0x80000000
370 #define DC_solid_enable 0x800
371 #define DC_transc_enable 0x40000000
372 #define DC_opcod_bitblt 0x8
373 #define DC_atype_rpl 0x0
374 #define DC_linear_xy 0x0
375 #define DC_solid_disable 0x0
376 #define DC_arzero_disable 0x0
377 #define DC_bltmod_bfcol 0x4000000
378 #define DC_pattern_disable 0x0
379 #define DC_transc_disable 0x0
381 #define MGA_CLEAR_CMD (DC_opcod_trap | DC_arzero_enable | \
382 DC_sgnzero_enable | DC_shftzero_enable | \
383 (0xC << DC_bop_SHIFT) | DC_clipdis_enable | \
384 DC_solid_enable | DC_transc_enable)
387 #define MGA_COPY_CMD (DC_opcod_bitblt | DC_atype_rpl | DC_linear_xy | \
388 DC_solid_disable | DC_arzero_disable | \
389 DC_sgnzero_enable | DC_shftzero_enable | \
390 (0xC << DC_bop_SHIFT) | DC_bltmod_bfcol | \
391 DC_pattern_disable | DC_transc_disable | \