linux/mga_dma.c

   1 /* mga_dma.c -- DMA support for mga g200/g400 -*- linux-c -*-
   2  * Created: Mon Dec 13 01:50:01 1999 by jhartmann@precisioninsight.com
   3  *
   4  * Copyright 1999 Precision Insight, Inc., Cedar Park, Texas.
   5  * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
   6  * All Rights Reserved.
   7  *
   8  * Permission is hereby granted, free of charge, to any person obtaining a
   9  * copy of this software and associated documentation files (the "Software"),
  10  * to deal in the Software without restriction, including without limitation
  11  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  12  * and/or sell copies of the Software, and to permit persons to whom the
  13  * Software is furnished to do so, subject to the following conditions:
  14  *
  15  * The above copyright notice and this permission notice (including the next
  16  * paragraph) shall be included in all copies or substantial portions of the
  17  * Software.
  18  *
  19  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  20  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  21  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  22  * PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
  23  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  24  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
  25  * DEALINGS IN THE SOFTWARE.
  26  *
  27  * Authors:
  28  *    Rickard E. (Rik) Faith <faith@valinux.com>
  29  *    Jeff Hartmann <jhartmann@valinux.com>
  30  *    Keith Whitwell <keithw@valinux.com>
  31  *
  32  * Rewritten by:
  33  *    Gareth Hughes <gareth@valinux.com>
  34  */
  35
  36 #define __NO_VERSION__
  37 #include "mga.h"
  38 #include "drmP.h"
  39 #include "drm.h"
  40 #include "mga_drm.h"
  41 #include "mga_drv.h"
  42
  43 #include <linux/interrupt.h>    /* For task queue support */
  44 #include <linux/delay.h>
  45
  46 #define MGA_DEFAULT_USEC_TIMEOUT        10000
  47 #define MGA_FREELIST_DEBUG              0
  48
  49
  50 /* ================================================================
  51  * Engine control
  52  */
  53
  54 int mga_do_wait_for_idle( drm_mga_private_t *dev_priv )
  55 {
  56         u32 status = 0;
  57         int i;
  58         DRM_DEBUG( "%s\n", __FUNCTION__ );
  59
  60         for ( i = 0 ; i < dev_priv->usec_timeout ; i++ ) {
  61                 status = MGA_READ( MGA_STATUS ) & MGA_ENGINE_IDLE_MASK;
  62                 if ( status == MGA_ENDPRDMASTS ) {
  63                         MGA_WRITE8( MGA_CRTC_INDEX, 0 );
  64                         return 0;
  65                 }
  66                 udelay( 1 );
  67         }
  68
  69 #if MGA_DMA_DEBUG
  70         DRM_ERROR( "failed!\n" );
  71         DRM_INFO( "   status=0x%08x\n", status );
  72 #endif
  73         return -EBUSY;
  74 }
  75
  76 int mga_do_dma_idle( drm_mga_private_t *dev_priv )
  77 {
  78         u32 status = 0;
  79         int i;
  80         DRM_DEBUG( "%s\n", __FUNCTION__ );
  81
  82         for ( i = 0 ; i < dev_priv->usec_timeout ; i++ ) {
  83                 status = MGA_READ( MGA_STATUS ) & MGA_DMA_IDLE_MASK;
  84                 if ( status == MGA_ENDPRDMASTS ) return 0;
  85                 udelay( 1 );
  86         }
  87
  88 #if MGA_DMA_DEBUG
  89         DRM_ERROR( "failed! status=0x%08x\n", status );
  90 #endif
  91         return -EBUSY;
  92 }
  93
  94 int mga_do_dma_reset( drm_mga_private_t *dev_priv )
  95 {
  96         drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv;
  97         drm_mga_primary_buffer_t *primary = &dev_priv->prim;
  98
  99         DRM_DEBUG( "%s\n", __FUNCTION__ );
 100
 101         /* The primary DMA stream should look like new right about now.
 102          */
 103         primary->tail = 0;
 104         primary->space = primary->size;
 105         primary->last_flush = 0;
 106
 107         sarea_priv->last_wrap = 0;
 108
 109         /* FIXME: Reset counters, buffer ages etc...
 110          */
 111
 112         /* FIXME: What else do we need to reinitialize?  WARP stuff?
 113          */
 114
 115         return 0;
 116 }
 117
 118 int mga_do_engine_reset( drm_mga_private_t *dev_priv )
 119 {
 120         DRM_DEBUG( "%s\n", __FUNCTION__ );
 121
 122         /* Okay, so we've completely screwed up and locked the engine.
 123          * How about we clean up after ourselves?
 124          */
 125         MGA_WRITE( MGA_RST, MGA_SOFTRESET );
 126         udelay( 15 );                           /* Wait at least 10 usecs */
 127         MGA_WRITE( MGA_RST, 0 );
 128
 129         /* Initialize the registers that get clobbered by the soft
 130          * reset.  Many of the core register values survive a reset,
 131          * but the drawing registers are basically all gone.
 132          *
 133          * 3D clients should probably die after calling this.  The X
 134          * server should reset the engine state to known values.
 135          */
 136 #if 0
 137         MGA_WRITE( MGA_PRIMPTR,
 138                    virt_to_bus((void *)dev_priv->prim.status_page) |
 139                    MGA_PRIMPTREN0 |
 140                    MGA_PRIMPTREN1 );
 141 #endif
 142
 143         MGA_WRITE( MGA_ICLEAR, MGA_SOFTRAPICLR );
 144         MGA_WRITE( MGA_IEN,    MGA_SOFTRAPIEN );
 145
 146         /* The primary DMA stream should look like new right about now.
 147          */
 148         mga_do_dma_reset( dev_priv );
 149
 150         /* This bad boy will never fail.
 151          */
 152         return 0;
 153 }
 154
 155
 156 /* ================================================================
 157  * Primary DMA stream
 158  */
 159
 160 void mga_do_dma_flush( drm_mga_private_t *dev_priv )
 161 {
 162         drm_mga_primary_buffer_t *primary = &dev_priv->prim;
 163         u32 head, tail;
 164         DMA_LOCALS;
 165         DRM_DEBUG( "%s:\n", __FUNCTION__ );
 166
 167         if ( primary->tail == primary->last_flush ) {
 168                 DRM_DEBUG( "   bailing out...\n" );
 169                 return;
 170         }
 171
 172         tail = primary->tail + dev_priv->primary->offset;
 173
 174         /* We need to pad the stream between flushes, as the card
 175          * actually (partially?) reads the first of these commands.
 176          * See page 4-16 in the G400 manual, middle of the page or so.
 177          */
 178         BEGIN_DMA( 1 );
 179
 180         DMA_BLOCK( MGA_DMAPAD,  0x00000000,
 181                    MGA_DMAPAD,  0x00000000,
 182                    MGA_DMAPAD,  0x00000000,
 183                    MGA_DMAPAD,  0x00000000 );
 184
 185         ADVANCE_DMA();
 186
 187         primary->last_flush = primary->tail;
 188
 189         head = MGA_READ( MGA_PRIMADDRESS );
 190
 191         if ( head <= tail ) {
 192                 primary->space = primary->size - primary->tail;
 193         } else {
 194                 primary->space = head - tail;
 195         }
 196
 197         DRM_DEBUG( "   head = 0x%06lx\n", head - dev_priv->primary->offset );
 198         DRM_DEBUG( "   tail = 0x%06lx\n", tail - dev_priv->primary->offset );
 199         DRM_DEBUG( "  space = 0x%06x\n", primary->space );
 200
 201         mga_flush_write_combine();
 202         MGA_WRITE( MGA_PRIMEND, tail | MGA_PAGPXFER );
 203
 204         DRM_DEBUG( "%s: done.\n", __FUNCTION__ );
 205 }
 206
 207 void mga_do_dma_wrap_start( drm_mga_private_t *dev_priv )
 208 {
 209         drm_mga_primary_buffer_t *primary = &dev_priv->prim;
 210         u32 head, tail;
 211         DMA_LOCALS;
 212         DRM_DEBUG( "%s:\n", __FUNCTION__ );
 213
 214         BEGIN_DMA_WRAP();
 215
 216         DMA_BLOCK( MGA_DMAPAD,  0x00000000,
 217                    MGA_DMAPAD,  0x00000000,
 218                    MGA_DMAPAD,  0x00000000,
 219                    MGA_DMAPAD,  0x00000000 );
 220
 221         ADVANCE_DMA();
 222
 223         tail = primary->tail + dev_priv->primary->offset;
 224
 225         primary->tail = 0;
 226         primary->last_flush = 0;
 227         primary->last_wrap++;
 228
 229         head = MGA_READ( MGA_PRIMADDRESS );
 230
 231         if ( head == dev_priv->primary->offset ) {
 232                 primary->space = primary->size;
 233         } else {
 234                 primary->space = head - dev_priv->primary->offset;
 235         }
 236
 237         DRM_DEBUG( "   head = 0x%06lx\n",
 238                   head - dev_priv->primary->offset );
 239         DRM_DEBUG( "   tail = 0x%06x\n", primary->tail );
 240         DRM_DEBUG( "   wrap = %d\n", primary->last_wrap );
 241         DRM_DEBUG( "  space = 0x%06x\n", primary->space );
 242
 243         mga_flush_write_combine();
 244         MGA_WRITE( MGA_PRIMEND, tail | MGA_PAGPXFER );
 245
 246         set_bit( 0, &primary->wrapped );
 247         DRM_DEBUG( "%s: done.\n", __FUNCTION__ );
 248 }
 249
 250 void mga_do_dma_wrap_end( drm_mga_private_t *dev_priv )
 251 {
 252         drm_mga_primary_buffer_t *primary = &dev_priv->prim;
 253         drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv;
 254         u32 head = dev_priv->primary->offset;
 255         DRM_DEBUG( "%s:\n", __FUNCTION__ );
 256
 257         sarea_priv->last_wrap++;
 258         DRM_DEBUG( "   wrap = %d\n", sarea_priv->last_wrap );
 259
 260         mga_flush_write_combine();
 261         MGA_WRITE( MGA_PRIMADDRESS, head | MGA_DMA_GENERAL );
 262
 263         clear_bit( 0, &primary->wrapped );
 264         DRM_DEBUG( "%s: done.\n", __FUNCTION__ );
 265 }
 266
 267
 268 /* ================================================================
 269  * Freelist management
 270  */
 271
 272 #define MGA_BUFFER_USED         ~0
 273 #define MGA_BUFFER_FREE         0
 274
 275 #if MGA_FREELIST_DEBUG
 276 static void mga_freelist_print( drm_device_t *dev )
 277 {
 278         drm_mga_private_t *dev_priv = dev->dev_private;
 279         drm_mga_freelist_t *entry;
 280
 281         DRM_INFO( "\n" );
 282         DRM_INFO( "current dispatch: last=0x%x done=0x%x\n",
 283                   dev_priv->sarea_priv->last_dispatch,
 284                   (unsigned int)(MGA_READ( MGA_PRIMADDRESS ) -
 285                                  dev_priv->primary->offset) );
 286         DRM_INFO( "current freelist:\n" );
 287
 288         for ( entry = dev_priv->head->next ; entry ; entry = entry->next ) {
 289                 DRM_INFO( "   %p   idx=%2d  age=0x%x 0x%06lx\n",
 290                           entry, entry->buf->idx, entry->age.head,
 291                           entry->age.head - dev_priv->primary->offset );
 292         }
 293         DRM_INFO( "\n" );
 294 }
 295 #endif
 296
 297 static int mga_freelist_init( drm_device_t *dev, drm_mga_private_t *dev_priv )
 298 {
 299         drm_device_dma_t *dma = dev->dma;
 300         drm_buf_t *buf;
 301         drm_mga_buf_priv_t *buf_priv;
 302         drm_mga_freelist_t *entry;
 303         int i;
 304         DRM_DEBUG( "%s: count=%d\n",
 305                    __FUNCTION__, dma->buf_count );
 306
 307         dev_priv->head = DRM(alloc)( sizeof(drm_mga_freelist_t),
 308                                      DRM_MEM_DRIVER );
 309         if ( dev_priv->head == NULL )
 310                 return -ENOMEM;
 311
 312         memset( dev_priv->head, 0, sizeof(drm_mga_freelist_t) );
 313         SET_AGE( &dev_priv->head->age, MGA_BUFFER_USED, 0 );
 314
 315         for ( i = 0 ; i < dma->buf_count ; i++ ) {
 316                 buf = dma->buflist[i];
 317                 buf_priv = buf->dev_private;
 318
 319                 entry = DRM(alloc)( sizeof(drm_mga_freelist_t),
 320                                     DRM_MEM_DRIVER );
 321                 if ( entry == NULL )
 322                         return -ENOMEM;
 323
 324                 memset( entry, 0, sizeof(drm_mga_freelist_t) );
 325
 326                 entry->next = dev_priv->head->next;
 327                 entry->prev = dev_priv->head;
 328                 SET_AGE( &entry->age, MGA_BUFFER_FREE, 0 );
 329                 entry->buf = buf;
 330
 331                 if ( dev_priv->head->next != NULL )
 332                         dev_priv->head->next->prev = entry;
 333                 if ( entry->next == NULL )
 334                         dev_priv->tail = entry;
 335
 336                 buf_priv->list_entry = entry;
 337                 buf_priv->discard = 0;
 338                 buf_priv->dispatched = 0;
 339
 340                 dev_priv->head->next = entry;
 341         }
 342
 343         return 0;
 344 }
 345
 346 static void mga_freelist_cleanup( drm_device_t *dev )
 347 {
 348         drm_mga_private_t *dev_priv = dev->dev_private;
 349         drm_mga_freelist_t *entry;
 350         drm_mga_freelist_t *next;
 351         DRM_DEBUG( "%s\n", __FUNCTION__ );
 352
 353         entry = dev_priv->head;
 354         while ( entry ) {
 355                 next = entry->next;
 356                 DRM(free)( entry, sizeof(drm_mga_freelist_t), DRM_MEM_DRIVER );
 357                 entry = next;
 358         }
 359
 360         dev_priv->head = dev_priv->tail = NULL;
 361 }
 362
 363 #if 0
 364 /* FIXME: Still needed?
 365  */
 366 static void mga_freelist_reset( drm_device_t *dev )
 367 {
 368         drm_device_dma_t *dma = dev->dma;
 369         drm_buf_t *buf;
 370         drm_mga_buf_priv_t *buf_priv;
 371         int i;
 372
 373         for ( i = 0 ; i < dma->buf_count ; i++ ) {
 374                 buf = dma->buflist[i];
 375                 buf_priv = buf->dev_private;
 376                 SET_AGE( &buf_priv->list_entry->age,
 377                          MGA_BUFFER_FREE, 0 );
 378         }
 379 }
 380 #endif
 381
 382 static drm_buf_t *mga_freelist_get( drm_device_t *dev )
 383 {
 384         drm_mga_private_t *dev_priv = dev->dev_private;
 385         drm_mga_freelist_t *next;
 386         drm_mga_freelist_t *prev;
 387         drm_mga_freelist_t *tail = dev_priv->tail;
 388         u32 head, wrap;
 389         DRM_DEBUG( "%s:\n", __FUNCTION__ );
 390
 391         head = MGA_READ( MGA_PRIMADDRESS );
 392         wrap = dev_priv->sarea_priv->last_wrap;
 393
 394         DRM_DEBUG( "   tail=0x%06lx %d\n",
 395                    tail->age.head ?
 396                    tail->age.head - dev_priv->primary->offset : 0,
 397                    tail->age.wrap );
 398         DRM_DEBUG( "   head=0x%06lx %d\n",
 399                    head - dev_priv->primary->offset, wrap );
 400
 401         if ( TEST_AGE( &tail->age, head, wrap ) ) {
 402                 prev = dev_priv->tail->prev;
 403                 next = dev_priv->tail;
 404                 prev->next = NULL;
 405                 next->prev = next->next = NULL;
 406                 dev_priv->tail = prev;
 407                 SET_AGE( &next->age, MGA_BUFFER_USED, 0 );
 408                 return next->buf;
 409         }
 410
 411         DRM_DEBUG( "returning NULL!\n" );
 412         return NULL;
 413 }
 414
 415 int mga_freelist_put( drm_device_t *dev, drm_buf_t *buf )
 416 {
 417         drm_mga_private_t *dev_priv = dev->dev_private;
 418         drm_mga_buf_priv_t *buf_priv = buf->dev_private;
 419         drm_mga_freelist_t *head, *entry, *prev;
 420
 421         DRM_DEBUG( "%s: age=0x%06lx wrap=%d\n",
 422                    __FUNCTION__,
 423                    buf_priv->list_entry->age.head -
 424                    dev_priv->primary->offset,
 425                    buf_priv->list_entry->age.wrap );
 426
 427         entry = buf_priv->list_entry;
 428         head = dev_priv->head;
 429
 430         if ( buf_priv->list_entry->age.head == MGA_BUFFER_USED ) {
 431                 SET_AGE( &entry->age, MGA_BUFFER_FREE, 0 );
 432                 prev = dev_priv->tail;
 433                 prev->next = entry;
 434                 entry->prev = prev;
 435                 entry->next = NULL;
 436         } else {
 437                 prev = head->next;
 438                 head->next = entry;
 439                 prev->prev = entry;
 440                 entry->prev = head;
 441                 entry->next = prev;
 442         }
 443
 444         return 0;
 445 }
 446
 447
 448 /* ================================================================
 449  * DMA initialization, cleanup
 450  */
 451
 452 static int mga_do_init_dma( drm_device_t *dev, drm_mga_init_t *init )
 453 {
 454         drm_mga_private_t *dev_priv;
 455         struct list_head *list;
 456         int ret;
 457         DRM_DEBUG( "%s\n", __FUNCTION__ );
 458
 459         dev_priv = DRM(alloc)( sizeof(drm_mga_private_t), DRM_MEM_DRIVER );
 460         if ( !dev_priv )
 461                 return -ENOMEM;
 462
 463         memset( dev_priv, 0, sizeof(drm_mga_private_t) );
 464
 465         dev_priv->chipset = init->chipset;
 466
 467         dev_priv->usec_timeout = MGA_DEFAULT_USEC_TIMEOUT;
 468
 469         if ( init->sgram ) {
 470                 dev_priv->clear_cmd = MGA_DWGCTL_CLEAR | MGA_ATYPE_BLK;
 471         } else {
 472                 dev_priv->clear_cmd = MGA_DWGCTL_CLEAR | MGA_ATYPE_RSTR;
 473         }
 474         dev_priv->maccess       = init->maccess;
 475
 476         dev_priv->fb_cpp        = init->fb_cpp;
 477         dev_priv->front_offset  = init->front_offset;
 478         dev_priv->front_pitch   = init->front_pitch;
 479         dev_priv->back_offset   = init->back_offset;
 480         dev_priv->back_pitch    = init->back_pitch;
 481
 482         dev_priv->depth_cpp     = init->depth_cpp;
 483         dev_priv->depth_offset  = init->depth_offset;
 484         dev_priv->depth_pitch   = init->depth_pitch;
 485
 486         /* FIXME: Need to support AGP textures...
 487          */
 488         dev_priv->texture_offset = init->texture_offset[0];
 489         dev_priv->texture_size = init->texture_size[0];
 490
 491         list_for_each( list, &dev->maplist->head ) {
 492                 drm_map_list_t *entry = (drm_map_list_t *)list;
 493                 if ( entry->map &&
 494                      entry->map->type == _DRM_SHM &&
 495                      (entry->map->flags & _DRM_CONTAINS_LOCK) ) {
 496                         dev_priv->sarea = entry->map;
 497                         break;
 498                 }
 499         }
 500         if(!dev_priv->sarea) {
 501                 DRM_ERROR( "failed to find sarea!\n" );
 502                 /* Assign dev_private so we can do cleanup. */
 503                 dev->dev_private = (void *)dev_priv;
 504                 mga_do_cleanup_dma( dev );
 505                 return -EINVAL;
 506         }
 507
 508         DRM_FIND_MAP( dev_priv->fb, init->fb_offset );
 509         if(!dev_priv->fb) {
 510                 DRM_ERROR( "failed to find framebuffer!\n" );
 511                 /* Assign dev_private so we can do cleanup. */
 512                 dev->dev_private = (void *)dev_priv;
 513                 mga_do_cleanup_dma( dev );
 514                 return -EINVAL;
 515         }
 516         DRM_FIND_MAP( dev_priv->mmio, init->mmio_offset );
 517         if(!dev_priv->mmio) {
 518                 DRM_ERROR( "failed to find mmio region!\n" );
 519                 /* Assign dev_private so we can do cleanup. */
 520                 dev->dev_private = (void *)dev_priv;
 521                 mga_do_cleanup_dma( dev );
 522                 return -EINVAL;
 523         }
 524         DRM_FIND_MAP( dev_priv->status, init->status_offset );
 525         if(!dev_priv->status) {
 526                 DRM_ERROR( "failed to find status page!\n" );
 527                 /* Assign dev_private so we can do cleanup. */
 528                 dev->dev_private = (void *)dev_priv;
 529                 mga_do_cleanup_dma( dev );
 530                 return -EINVAL;
 531         }
 532
 533         DRM_FIND_MAP( dev_priv->warp, init->warp_offset );
 534         if(!dev_priv->warp) {
 535                 DRM_ERROR( "failed to find warp microcode region!\n" );
 536                 /* Assign dev_private so we can do cleanup. */
 537                 dev->dev_private = (void *)dev_priv;
 538                 mga_do_cleanup_dma( dev );
 539                 return -EINVAL;
 540         }
 541         DRM_FIND_MAP( dev_priv->primary, init->primary_offset );
 542         if(!dev_priv->primary) {
 543                 DRM_ERROR( "failed to find primary dma region!\n" );
 544                 /* Assign dev_private so we can do cleanup. */
 545                 dev->dev_private = (void *)dev_priv;
 546                 mga_do_cleanup_dma( dev );
 547                 return -EINVAL;
 548         }
 549         DRM_FIND_MAP( dev_priv->buffers, init->buffers_offset );
 550         if(!dev_priv->buffers) {
 551                 DRM_ERROR( "failed to find dma buffer region!\n" );
 552                 /* Assign dev_private so we can do cleanup. */
 553                 dev->dev_private = (void *)dev_priv;
 554                 mga_do_cleanup_dma( dev );
 555                 return -EINVAL;
 556         }
 557
 558         dev_priv->sarea_priv =
 559                 (drm_mga_sarea_t *)((u8 *)dev_priv->sarea->handle +
 560                                     init->sarea_priv_offset);
 561
 562         DRM_IOREMAP( dev_priv->warp );
 563         DRM_IOREMAP( dev_priv->primary );
 564         DRM_IOREMAP( dev_priv->buffers );
 565
 566         if(!dev_priv->warp->handle ||
 567            !dev_priv->primary->handle ||
 568            !dev_priv->buffers->handle ) {
 569                 DRM_ERROR( "failed to ioremap agp regions!\n" );
 570                 /* Assign dev_private so we can do cleanup. */
 571                 dev->dev_private = (void *)dev_priv;
 572                 mga_do_cleanup_dma( dev );
 573                 return -ENOMEM;
 574         }
 575
 576         ret = mga_warp_install_microcode( dev_priv );
 577         if ( ret < 0 ) {
 578                 DRM_ERROR( "failed to install WARP ucode!\n" );
 579                 /* Assign dev_private so we can do cleanup. */
 580                 dev->dev_private = (void *)dev_priv;
 581                 mga_do_cleanup_dma( dev );
 582                 return ret;
 583         }
 584
 585         ret = mga_warp_init( dev_priv );
 586         if ( ret < 0 ) {
 587                 DRM_ERROR( "failed to init WARP engine!\n" );
 588                 /* Assign dev_private so we can do cleanup. */
 589                 dev->dev_private = (void *)dev_priv;
 590                 mga_do_cleanup_dma( dev );
 591                 return ret;
 592         }
 593
 594         dev_priv->prim.status = (u32 *)dev_priv->status->handle;
 595
 596         mga_do_wait_for_idle( dev_priv );
 597
 598         /* Init the primary DMA registers.
 599          */
 600         MGA_WRITE( MGA_PRIMADDRESS,
 601                    dev_priv->primary->offset | MGA_DMA_GENERAL );
 602 #if 0
 603         MGA_WRITE( MGA_PRIMPTR,
 604                    virt_to_bus((void *)dev_priv->prim.status) |
 605                    MGA_PRIMPTREN0 |     /* Soft trap, SECEND, SETUPEND */
 606                    MGA_PRIMPTREN1 );    /* DWGSYNC */
 607 #endif
 608
 609         dev_priv->prim.start = (u8 *)dev_priv->primary->handle;
 610         dev_priv->prim.end = ((u8 *)dev_priv->primary->handle
 611                               + dev_priv->primary->size);
 612         dev_priv->prim.size = dev_priv->primary->size;
 613
 614         dev_priv->prim.tail = 0;
 615         dev_priv->prim.space = dev_priv->prim.size;
 616         dev_priv->prim.wrapped = 0;
 617
 618         dev_priv->prim.last_flush = 0;
 619         dev_priv->prim.last_wrap = 0;
 620
 621         dev_priv->prim.high_mark = 256 * DMA_BLOCK_SIZE;
 622
 623         spin_lock_init( &dev_priv->prim.list_lock );
 624
 625         dev_priv->prim.status[0] = dev_priv->primary->offset;
 626         dev_priv->prim.status[1] = 0;
 627
 628         dev_priv->sarea_priv->last_wrap = 0;
 629         dev_priv->sarea_priv->last_frame.head = 0;
 630         dev_priv->sarea_priv->last_frame.wrap = 0;
 631
 632         if ( mga_freelist_init( dev, dev_priv ) < 0 ) {
 633                 DRM_ERROR( "could not initialize freelist\n" );
 634                 /* Assign dev_private so we can do cleanup. */
 635                 dev->dev_private = (void *)dev_priv;
 636                 mga_do_cleanup_dma( dev );
 637                 return -ENOMEM;
 638         }
 639
 640         /* Make dev_private visable to others. */
 641         dev->dev_private = (void *)dev_priv;
 642         return 0;
 643 }
 644
 645 int mga_do_cleanup_dma( drm_device_t *dev )
 646 {
 647         DRM_DEBUG( "%s\n", __FUNCTION__ );
 648
 649         if ( dev->dev_private ) {
 650                 drm_mga_private_t *dev_priv = dev->dev_private;
 651
 652                 DRM_IOREMAPFREE( dev_priv->warp );
 653                 DRM_IOREMAPFREE( dev_priv->primary );
 654                 DRM_IOREMAPFREE( dev_priv->buffers );
 655
 656                 if ( dev_priv->head != NULL ) {
 657                         mga_freelist_cleanup( dev );
 658                 }
 659
 660                 DRM(free)( dev->dev_private, sizeof(drm_mga_private_t),
 661                            DRM_MEM_DRIVER );
 662                 dev->dev_private = NULL;
 663         }
 664
 665         return 0;
 666 }
 667
 668 int mga_dma_init( struct inode *inode, struct file *filp,
 669                   unsigned int cmd, unsigned long arg )
 670 {
 671         drm_file_t *priv = filp->private_data;
 672         drm_device_t *dev = priv->dev;
 673         drm_mga_init_t init;
 674
 675         if ( copy_from_user( &init, (drm_mga_init_t *)arg, sizeof(init) ) )
 676                 return -EFAULT;
 677
 678         switch ( init.func ) {
 679         case MGA_INIT_DMA:
 680                 return mga_do_init_dma( dev, &init );
 681         case MGA_CLEANUP_DMA:
 682                 return mga_do_cleanup_dma( dev );
 683         }
 684
 685         return -EINVAL;
 686 }
 687
 688
 689 /* ================================================================
 690  * Primary DMA stream management
 691  */
 692
 693 int mga_dma_flush( struct inode *inode, struct file *filp,
 694                    unsigned int cmd, unsigned long arg )
 695 {
 696         drm_file_t *priv = filp->private_data;
 697         drm_device_t *dev = priv->dev;
 698         drm_mga_private_t *dev_priv = (drm_mga_private_t *)dev->dev_private;
 699         drm_lock_t lock;
 700
 701         LOCK_TEST_WITH_RETURN( dev );
 702
 703         if ( copy_from_user( &lock, (drm_lock_t *)arg, sizeof(lock) ) )
 704                 return -EFAULT;
 705
 706         DRM_DEBUG( "%s: %s%s%s\n",
 707                    __FUNCTION__,
 708                    (lock.flags & _DRM_LOCK_FLUSH) ?     "flush, " : "",
 709                    (lock.flags & _DRM_LOCK_FLUSH_ALL) ? "flush all, " : "",
 710                    (lock.flags & _DRM_LOCK_QUIESCENT) ? "idle, " : "" );
 711
 712         WRAP_WAIT_WITH_RETURN( dev_priv );
 713
 714         if ( lock.flags & (_DRM_LOCK_FLUSH | _DRM_LOCK_FLUSH_ALL) ) {
 715                 mga_do_dma_flush( dev_priv );
 716         }
 717
 718         if ( lock.flags & _DRM_LOCK_QUIESCENT ) {
 719 #if MGA_DMA_DEBUG
 720                 int ret = mga_do_wait_for_idle( dev_priv );
 721                 if ( ret < 0 )
 722                         DRM_INFO( __FUNCTION__": -EBUSY\n" );
 723                 return ret;
 724 #else
 725                 return mga_do_wait_for_idle( dev_priv );
 726 #endif
 727         } else {
 728                 return 0;
 729         }
 730 }
 731
 732 int mga_dma_reset( struct inode *inode, struct file *filp,
 733                    unsigned int cmd, unsigned long arg )
 734 {
 735         drm_file_t *priv = filp->private_data;
 736         drm_device_t *dev = priv->dev;
 737         drm_mga_private_t *dev_priv = (drm_mga_private_t *)dev->dev_private;
 738
 739         LOCK_TEST_WITH_RETURN( dev );
 740
 741         return mga_do_dma_reset( dev_priv );
 742 }
 743
 744
 745 /* ================================================================
 746  * DMA buffer management
 747  */
 748
 749 static int mga_dma_get_buffers( drm_device_t *dev, drm_dma_t *d )
 750 {
 751         drm_buf_t *buf;
 752         int i;
 753
 754         for ( i = d->granted_count ; i < d->request_count ; i++ ) {
 755                 buf = mga_freelist_get( dev );
 756                 if ( !buf ) return -EAGAIN;
 757
 758                 buf->pid = current->pid;
 759
 760                 if ( copy_to_user( &d->request_indices[i],
 761                                    &buf->idx, sizeof(buf->idx) ) )
 762                         return -EFAULT;
 763                 if ( copy_to_user( &d->request_sizes[i],
 764                                    &buf->total, sizeof(buf->total) ) )
 765                         return -EFAULT;
 766
 767                 d->granted_count++;
 768         }
 769         return 0;
 770 }
 771
 772 int mga_dma_buffers( struct inode *inode, struct file *filp,
 773                      unsigned int cmd, unsigned long arg )
 774 {
 775         drm_file_t *priv = filp->private_data;
 776         drm_device_t *dev = priv->dev;
 777         drm_device_dma_t *dma = dev->dma;
 778         drm_mga_private_t *dev_priv = (drm_mga_private_t *)dev->dev_private;
 779         drm_dma_t d;
 780         int ret = 0;
 781
 782         LOCK_TEST_WITH_RETURN( dev );
 783
 784         if ( copy_from_user( &d, (drm_dma_t *)arg, sizeof(d) ) )
 785                 return -EFAULT;
 786
 787         /* Please don't send us buffers.
 788          */
 789         if ( d.send_count != 0 ) {
 790                 DRM_ERROR( "Process %d trying to send %d buffers via drmDMA\n",
 791                            current->pid, d.send_count );
 792                 return -EINVAL;
 793         }
 794
 795         /* We'll send you buffers.
 796          */
 797         if ( d.request_count < 0 || d.request_count > dma->buf_count ) {
 798                 DRM_ERROR( "Process %d trying to get %d buffers (of %d max)\n",
 799                            current->pid, d.request_count, dma->buf_count );
 800                 return -EINVAL;
 801         }
 802
 803         WRAP_TEST_WITH_RETURN( dev_priv );
 804
 805         d.granted_count = 0;
 806
 807         if ( d.request_count ) {
 808                 ret = mga_dma_get_buffers( dev, &d );
 809         }
 810
 811         if ( copy_to_user( (drm_dma_t *)arg, &d, sizeof(d) ) )
 812                 return -EFAULT;
 813
 814         return ret;
 815 }