2 * This file has been modified for the cdrkit suite.
4 * The behaviour and appearence of the program code below can differ to a major
5 * extent from the version distributed by the original author(s).
7 * For details, see Changelog file distributed with the cdrkit package. If you
8 * received this file from another source then ask the distributing person for
9 * a log of modifications.
13 /* @(#)scsicdb.h 2.19 04/09/04 Copyright 1986 J. Schilling */
15 * Definitions for the SCSI Command Descriptor Block
17 * Copyright (c) 1986 J. Schilling
20 * This program is free software; you can redistribute it and/or modify
21 * it under the terms of the GNU General Public License version 2
22 * as published by the Free Software Foundation.
24 * This program is distributed in the hope that it will be useful,
25 * but WITHOUT ANY WARRANTY; without even the implied warranty of
26 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
27 * GNU General Public License for more details.
29 * You should have received a copy of the GNU General Public License along with
30 * this program; see the file COPYING. If not, write to the Free Software
31 * Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
34 #ifndef _SCG_SCSICDB_H
35 #define _SCG_SCSICDB_H
45 * SCSI Operation codes.
47 #define SC_TEST_UNIT_READY 0x00
48 #define SC_REZERO_UNIT 0x01
49 #define SC_REQUEST_SENSE 0x03
50 #define SC_FORMAT 0x04
51 #define SC_FORMAT_TRACK 0x06
52 #define SC_REASSIGN_BLOCK 0x07 /* CCS only */
54 #define SC_TRANSLATE 0x0f /* ACB4000 only */
55 #define SC_INQUIRY 0x12 /* CCS only */
56 #define SC_MODE_SELECT 0x15
57 #define SC_RESERVE 0x16
58 #define SC_RELEASE 0x17
59 #define SC_MODE_SENSE 0x1a
61 #define SC_READ_DEFECT_LIST 0x37 /* CCS only, group 1 */
62 #define SC_READ_BUFFER 0x3c /* CCS only, group 1 */
64 * Note, these two commands use identical command blocks for all
65 * controllers except the Adaptec ACB 4000 which sets bit 1 of byte 1.
69 #define SC_EREAD 0x28 /* 10 byte read */
70 #define SC_EWRITE 0x2a /* 10 byte write */
71 #define SC_WRITE_VERIFY 0x2e /* 10 byte write+verify */
72 #define SC_WRITE_FILE_MARK 0x10
73 #define SC_UNKNOWN 0xff /* cmd list terminator */
77 * Standard SCSI control blocks.
78 * These go in or out over the SCSI bus.
81 #if defined(_BIT_FIELDS_LTOH) /* Intel byteorder */
83 struct scsi_g0cdb { /* scsi group 0 command description block */
84 Uchar cmd; /* command code */
85 Ucbit high_addr : 5; /* high part of block address */
86 Ucbit lun : 3; /* logical unit number */
87 Uchar mid_addr; /* middle part of block address */
88 Uchar low_addr; /* low part of block address */
89 Uchar count; /* transfer length */
90 Ucbit link : 1; /* link (another command follows) */
91 Ucbit fr : 1; /* flag request (interrupt at completion) */
92 Ucbit naca : 1; /* Normal ACA (Auto Contingent Allegiance) */
93 Ucbit rsvd : 3; /* reserved */
94 Ucbit vu_56 : 1; /* vendor unique (byte 5 bit 6) */
95 Ucbit vu_57 : 1; /* vendor unique (byte 5 bit 7) */
98 #else /* Motorola byteorder */
100 struct scsi_g0cdb { /* scsi group 0 command description block */
101 Uchar cmd; /* command code */
102 Ucbit lun : 3; /* logical unit number */
103 Ucbit high_addr : 5; /* high part of block address */
104 Uchar mid_addr; /* middle part of block address */
105 Uchar low_addr; /* low part of block address */
106 Uchar count; /* transfer length */
107 Ucbit vu_57 : 1; /* vendor unique (byte 5 bit 7) */
108 Ucbit vu_56 : 1; /* vendor unique (byte 5 bit 6) */
109 Ucbit rsvd : 3; /* reserved */
110 Ucbit naca : 1; /* Normal ACA (Auto Contingent Allegiance) */
111 Ucbit fr : 1; /* flag request (interrupt at completion) */
112 Ucbit link : 1; /* link (another command follows) */
116 #if defined(_BIT_FIELDS_LTOH) /* Intel byteorder */
118 struct scsi_g1cdb { /* scsi group 1 command description block */
119 Uchar cmd; /* command code */
120 Ucbit reladr : 1; /* address is relative */
121 Ucbit res : 4; /* reserved bits 1-4 of byte 1 */
122 Ucbit lun : 3; /* logical unit number */
123 Uchar addr[4]; /* logical block address */
124 Uchar res6; /* reserved byte 6 */
125 Uchar count[2]; /* transfer length */
126 Ucbit link : 1; /* link (another command follows) */
127 Ucbit fr : 1; /* flag request (interrupt at completion) */
128 Ucbit naca : 1; /* Normal ACA (Auto Contingent Allegiance) */
129 Ucbit rsvd : 3; /* reserved */
130 Ucbit vu_96 : 1; /* vendor unique (byte 5 bit 6) */
131 Ucbit vu_97 : 1; /* vendor unique (byte 5 bit 7) */
134 #else /* Motorola byteorder */
136 struct scsi_g1cdb { /* scsi group 1 command description block */
137 Uchar cmd; /* command code */
138 Ucbit lun : 3; /* logical unit number */
139 Ucbit res : 4; /* reserved bits 1-4 of byte 1 */
140 Ucbit reladr : 1; /* address is relative */
141 Uchar addr[4]; /* logical block address */
142 Uchar res6; /* reserved byte 6 */
143 Uchar count[2]; /* transfer length */
144 Ucbit vu_97 : 1; /* vendor unique (byte 5 bit 7) */
145 Ucbit vu_96 : 1; /* vendor unique (byte 5 bit 6) */
146 Ucbit rsvd : 3; /* reserved */
147 Ucbit naca : 1; /* Normal ACA (Auto Contingent Allegiance) */
148 Ucbit fr : 1; /* flag request (interrupt at completion) */
149 Ucbit link : 1; /* link (another command follows) */
153 #if defined(_BIT_FIELDS_LTOH) /* Intel byteorder */
155 struct scsi_g5cdb { /* scsi group 5 command description block */
156 Uchar cmd; /* command code */
157 Ucbit reladr : 1; /* address is relative */
158 Ucbit res : 4; /* reserved bits 1-4 of byte 1 */
159 Ucbit lun : 3; /* logical unit number */
160 Uchar addr[4]; /* logical block address */
161 Uchar count[4]; /* transfer length */
162 Uchar res10; /* reserved byte 10 */
163 Ucbit link : 1; /* link (another command follows) */
164 Ucbit fr : 1; /* flag request (interrupt at completion) */
165 Ucbit naca : 1; /* Normal ACA (Auto Contingent Allegiance) */
166 Ucbit rsvd : 3; /* reserved */
167 Ucbit vu_B6 : 1; /* vendor unique (byte B bit 6) */
168 Ucbit vu_B7 : 1; /* vendor unique (byte B bit 7) */
171 #else /* Motorola byteorder */
173 struct scsi_g5cdb { /* scsi group 5 command description block */
174 Uchar cmd; /* command code */
175 Ucbit lun : 3; /* logical unit number */
176 Ucbit res : 4; /* reserved bits 1-4 of byte 1 */
177 Ucbit reladr : 1; /* address is relative */
178 Uchar addr[4]; /* logical block address */
179 Uchar count[4]; /* transfer length */
180 Uchar res10; /* reserved byte 10 */
181 Ucbit vu_B7 : 1; /* vendor unique (byte B bit 7) */
182 Ucbit vu_B6 : 1; /* vendor unique (byte B bit 6) */
183 Ucbit rsvd : 3; /* reserved */
184 Ucbit naca : 1; /* Normal ACA (Auto Contingent Allegiance) */
185 Ucbit fr : 1; /* flag request (interrupt at completion) */
186 Ucbit link : 1; /* link (another command follows) */
190 #define g0_cdbaddr(cdb, a) ((cdb)->high_addr = (a) >> 16,\
191 (cdb)->mid_addr = ((a) >> 8) & 0xFF,\
192 (cdb)->low_addr = (a) & 0xFF)
194 #define g1_cdbaddr(cdb, a) ((cdb)->addr[0] = (a) >> 24,\
195 (cdb)->addr[1] = ((a) >> 16)& 0xFF,\
196 (cdb)->addr[2] = ((a) >> 8) & 0xFF,\
197 (cdb)->addr[3] = (a) & 0xFF)
199 #define g5_cdbaddr(cdb, a) g1_cdbaddr(cdb, a)
202 #define g0_cdblen(cdb, len) ((cdb)->count = (len))
204 #define g1_cdblen(cdb, len) ((cdb)->count[0] = ((len) >> 8) & 0xFF,\
205 (cdb)->count[1] = (len) & 0xFF)
207 #define g5_cdblen(cdb, len) ((cdb)->count[0] = (len) >> 24L,\
208 (cdb)->count[1] = ((len) >> 16L)& 0xFF,\
209 (cdb)->count[2] = ((len) >> 8L) & 0xFF,\
210 (cdb)->count[3] = (len) & 0xFF)
214 #define i_to_long(a, i) (((Uchar *)(a))[0] = ((i) >> 24)& 0xFF,\
215 ((Uchar *)(a))[1] = ((i) >> 16)& 0xFF,\
216 ((Uchar *)(a))[2] = ((i) >> 8) & 0xFF,\
217 ((Uchar *)(a))[3] = (i) & 0xFF)
219 #define i_to_3_byte(a, i) (((Uchar *)(a))[0] = ((i) >> 16)& 0xFF,\
220 ((Uchar *)(a))[1] = ((i) >> 8) & 0xFF,\
221 ((Uchar *)(a))[2] = (i) & 0xFF)
223 #define i_to_4_byte(a, i) (((Uchar *)(a))[0] = ((i) >> 24)& 0xFF,\
224 ((Uchar *)(a))[1] = ((i) >> 16)& 0xFF,\
225 ((Uchar *)(a))[2] = ((i) >> 8) & 0xFF,\
226 ((Uchar *)(a))[3] = (i) & 0xFF)
228 #define i_to_short(a, i) (((Uchar *)(a))[0] = ((i) >> 8) & 0xFF,\
229 ((Uchar *)(a))[1] = (i) & 0xFF)
231 #define a_to_u_short(a) ((unsigned short) \
232 ((((Uchar*) a)[1] & 0xFF) | \
233 (((Uchar*) a)[0] << 8 & 0xFF00)))
235 #define a_to_3_byte(a) ((Ulong) \
236 ((((Uchar*) a)[2] & 0xFF) | \
237 (((Uchar*) a)[1] << 8 & 0xFF00) | \
238 (((Uchar*) a)[0] << 16 & 0xFF0000)))
241 #define a_to_u_long(a) ((Ulong) \
242 ((((Uchar*) a)[3] & 0xFF) | \
243 (((Uchar*) a)[2] << 8 & 0xFF00) | \
244 (((Uchar*) a)[1] << 16 & 0xFF0000) | \
245 (((Uchar*) a)[0] << 24 & 0xFF000000UL)))
247 #define a_to_u_long(a) ((Ulong) \
248 ((((Uchar*) a)[3] & 0xFF) | \
249 (((Uchar*) a)[2] << 8 & 0xFF00) | \
250 (((Uchar*) a)[1] << 16 & 0xFF0000) | \
251 (((Uchar*) a)[0] << 24 & 0xFF000000)))
260 #endif /* _SCG_SCSICDB_H */