1 //===----------------------------------------------------------------------===//
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
8 // Processor specific interpretation of DWARF unwind info.
10 //===----------------------------------------------------------------------===//
12 #ifndef __DWARF_INSTRUCTIONS_HPP__
13 #define __DWARF_INSTRUCTIONS_HPP__
20 #include "Registers.hpp"
21 #include "DwarfParser.hpp"
28 /// DwarfInstructions maps abtract DWARF unwind instructions to a particular
30 template <typename A, typename R>
31 class DwarfInstructions {
33 typedef typename A::pint_t pint_t;
34 typedef typename A::sint_t sint_t;
36 static int stepWithDwarf(A &addressSpace, pint_t pc, pint_t fdeStart,
37 R ®isters, bool &isSignalFrame);
42 DW_X86_64_RET_ADDR = 16
49 typedef typename CFI_Parser<A>::RegisterLocation RegisterLocation;
50 typedef typename CFI_Parser<A>::PrologInfo PrologInfo;
51 typedef typename CFI_Parser<A>::FDE_Info FDE_Info;
52 typedef typename CFI_Parser<A>::CIE_Info CIE_Info;
54 static pint_t evaluateExpression(pint_t expression, A &addressSpace,
56 pint_t initialStackValue);
57 static pint_t getSavedRegister(A &addressSpace, const R ®isters,
58 pint_t cfa, const RegisterLocation &savedReg);
59 static double getSavedFloatRegister(A &addressSpace, const R ®isters,
60 pint_t cfa, const RegisterLocation &savedReg);
61 static v128 getSavedVectorRegister(A &addressSpace, const R ®isters,
62 pint_t cfa, const RegisterLocation &savedReg);
64 static pint_t getCFA(A &addressSpace, const PrologInfo &prolog,
66 if (prolog.cfaRegister != 0)
67 return (pint_t)((sint_t)registers.getRegister((int)prolog.cfaRegister) +
68 prolog.cfaRegisterOffset);
69 if (prolog.cfaExpression != 0)
70 return evaluateExpression((pint_t)prolog.cfaExpression, addressSpace,
72 assert(0 && "getCFA(): unknown location");
73 __builtin_unreachable();
78 template <typename A, typename R>
79 typename A::pint_t DwarfInstructions<A, R>::getSavedRegister(
80 A &addressSpace, const R ®isters, pint_t cfa,
81 const RegisterLocation &savedReg) {
82 switch (savedReg.location) {
83 case CFI_Parser<A>::kRegisterInCFA:
84 return (pint_t)addressSpace.getRegister(cfa + (pint_t)savedReg.value);
86 case CFI_Parser<A>::kRegisterAtExpression:
87 return (pint_t)addressSpace.getRegister(evaluateExpression(
88 (pint_t)savedReg.value, addressSpace, registers, cfa));
90 case CFI_Parser<A>::kRegisterIsExpression:
91 return evaluateExpression((pint_t)savedReg.value, addressSpace,
94 case CFI_Parser<A>::kRegisterInRegister:
95 return registers.getRegister((int)savedReg.value);
96 case CFI_Parser<A>::kRegisterUndefined:
98 case CFI_Parser<A>::kRegisterUnused:
99 case CFI_Parser<A>::kRegisterOffsetFromCFA:
103 _LIBUNWIND_ABORT("unsupported restore location for register");
106 template <typename A, typename R>
107 double DwarfInstructions<A, R>::getSavedFloatRegister(
108 A &addressSpace, const R ®isters, pint_t cfa,
109 const RegisterLocation &savedReg) {
110 switch (savedReg.location) {
111 case CFI_Parser<A>::kRegisterInCFA:
112 return addressSpace.getDouble(cfa + (pint_t)savedReg.value);
114 case CFI_Parser<A>::kRegisterAtExpression:
115 return addressSpace.getDouble(
116 evaluateExpression((pint_t)savedReg.value, addressSpace,
118 case CFI_Parser<A>::kRegisterUndefined:
120 case CFI_Parser<A>::kRegisterInRegister:
121 #ifndef _LIBUNWIND_TARGET_ARM
122 return registers.getFloatRegister((int)savedReg.value);
124 case CFI_Parser<A>::kRegisterIsExpression:
125 case CFI_Parser<A>::kRegisterUnused:
126 case CFI_Parser<A>::kRegisterOffsetFromCFA:
130 _LIBUNWIND_ABORT("unsupported restore location for float register");
133 template <typename A, typename R>
134 v128 DwarfInstructions<A, R>::getSavedVectorRegister(
135 A &addressSpace, const R ®isters, pint_t cfa,
136 const RegisterLocation &savedReg) {
137 switch (savedReg.location) {
138 case CFI_Parser<A>::kRegisterInCFA:
139 return addressSpace.getVector(cfa + (pint_t)savedReg.value);
141 case CFI_Parser<A>::kRegisterAtExpression:
142 return addressSpace.getVector(
143 evaluateExpression((pint_t)savedReg.value, addressSpace,
146 case CFI_Parser<A>::kRegisterIsExpression:
147 case CFI_Parser<A>::kRegisterUnused:
148 case CFI_Parser<A>::kRegisterUndefined:
149 case CFI_Parser<A>::kRegisterOffsetFromCFA:
150 case CFI_Parser<A>::kRegisterInRegister:
154 _LIBUNWIND_ABORT("unsupported restore location for vector register");
157 template <typename A, typename R>
158 int DwarfInstructions<A, R>::stepWithDwarf(A &addressSpace, pint_t pc,
159 pint_t fdeStart, R ®isters,
160 bool &isSignalFrame) {
163 if (CFI_Parser<A>::decodeFDE(addressSpace, fdeStart, &fdeInfo,
166 if (CFI_Parser<A>::parseFDEInstructions(addressSpace, fdeInfo, cieInfo, pc,
167 R::getArch(), &prolog)) {
168 // get pointer to cfa (architecture specific)
169 pint_t cfa = getCFA(addressSpace, prolog, registers);
171 // restore registers that DWARF says were saved
172 R newRegisters = registers;
174 // Typically, the CFA is the stack pointer at the call site in
175 // the previous frame. However, there are scenarios in which this is not
176 // true. For example, if we switched to a new stack. In that case, the
177 // value of the previous SP might be indicated by a CFI directive.
179 // We set the SP here to the CFA, allowing for it to be overridden
180 // by a CFI directive later on.
181 newRegisters.setSP(cfa);
183 pint_t returnAddress = 0;
184 const int lastReg = R::lastDwarfRegNum();
185 assert(static_cast<int>(CFI_Parser<A>::kMaxRegisterNumber) >= lastReg &&
186 "register range too large");
187 assert(lastReg >= (int)cieInfo.returnAddressRegister &&
188 "register range does not contain return address register");
189 for (int i = 0; i <= lastReg; ++i) {
190 if (prolog.savedRegisters[i].location !=
191 CFI_Parser<A>::kRegisterUnused) {
192 if (registers.validFloatRegister(i))
193 newRegisters.setFloatRegister(
194 i, getSavedFloatRegister(addressSpace, registers, cfa,
195 prolog.savedRegisters[i]));
196 else if (registers.validVectorRegister(i))
197 newRegisters.setVectorRegister(
198 i, getSavedVectorRegister(addressSpace, registers, cfa,
199 prolog.savedRegisters[i]));
200 else if (i == (int)cieInfo.returnAddressRegister)
201 returnAddress = getSavedRegister(addressSpace, registers, cfa,
202 prolog.savedRegisters[i]);
203 else if (registers.validRegister(i))
204 newRegisters.setRegister(
205 i, getSavedRegister(addressSpace, registers, cfa,
206 prolog.savedRegisters[i]));
209 } else if (i == (int)cieInfo.returnAddressRegister) {
210 // Leaf function keeps the return address in register and there is no
211 // explicit intructions how to restore it.
212 returnAddress = registers.getRegister(cieInfo.returnAddressRegister);
216 isSignalFrame = cieInfo.isSignalFrame;
218 #if defined(_LIBUNWIND_TARGET_AARCH64)
219 // If the target is aarch64 then the return address may have been signed
220 // using the v8.3 pointer authentication extensions. The original
221 // return address needs to be authenticated before the return address is
222 // restored. autia1716 is used instead of autia as autia1716 assembles
223 // to a NOP on pre-v8.3a architectures.
224 if ((R::getArch() == REGISTERS_ARM64) &&
225 prolog.savedRegisters[UNW_AARCH64_RA_SIGN_STATE].value &&
226 returnAddress != 0) {
227 #if !defined(_LIBUNWIND_IS_NATIVE_ONLY)
228 return UNW_ECROSSRASIGNING;
230 register unsigned long long x17 __asm("x17") = returnAddress;
231 register unsigned long long x16 __asm("x16") = cfa;
233 // These are the autia1716/autib1716 instructions. The hint instructions
234 // are used here as gcc does not assemble autia1716/autib1716 for pre
236 if (cieInfo.addressesSignedWithBKey)
237 asm("hint 0xe" : "+r"(x17) : "r"(x16)); // autib1716
239 asm("hint 0xc" : "+r"(x17) : "r"(x16)); // autia1716
245 #if defined(_LIBUNWIND_IS_NATIVE_ONLY) && defined(_LIBUNWIND_TARGET_ARM) && \
246 defined(__ARM_FEATURE_PAUTH)
247 if ((R::getArch() == REGISTERS_ARM) &&
248 prolog.savedRegisters[UNW_ARM_RA_AUTH_CODE].value) {
250 getSavedRegister(addressSpace, registers, cfa,
251 prolog.savedRegisters[UNW_ARM_RA_AUTH_CODE]);
252 __asm__ __volatile__("autg %0, %1, %2"
254 : "r"(pac), "r"(returnAddress), "r"(cfa)
259 #if defined(_LIBUNWIND_TARGET_SPARC)
260 if (R::getArch() == REGISTERS_SPARC) {
261 // Skip call site instruction and delay slot
263 // Skip unimp instruction if function returns a struct
264 if ((addressSpace.get32(returnAddress) & 0xC1C00000) == 0)
269 #if defined(_LIBUNWIND_TARGET_PPC64)
270 #define PPC64_ELFV1_R2_LOAD_INST_ENCODING 0xe8410028u // ld r2,40(r1)
271 #define PPC64_ELFV1_R2_OFFSET 40
272 #define PPC64_ELFV2_R2_LOAD_INST_ENCODING 0xe8410018u // ld r2,24(r1)
273 #define PPC64_ELFV2_R2_OFFSET 24
274 // If the instruction at return address is a TOC (r2) restore,
275 // then r2 was saved and needs to be restored.
276 // ELFv2 ABI specifies that the TOC Pointer must be saved at SP + 24,
277 // while in ELFv1 ABI it is saved at SP + 40.
278 if (R::getArch() == REGISTERS_PPC64 && returnAddress != 0) {
279 pint_t sp = newRegisters.getRegister(UNW_REG_SP);
281 switch (addressSpace.get32(returnAddress)) {
282 case PPC64_ELFV1_R2_LOAD_INST_ENCODING:
283 r2 = addressSpace.get64(sp + PPC64_ELFV1_R2_OFFSET);
285 case PPC64_ELFV2_R2_LOAD_INST_ENCODING:
286 r2 = addressSpace.get64(sp + PPC64_ELFV2_R2_OFFSET);
290 newRegisters.setRegister(UNW_PPC64_R2, r2);
294 // Return address is address after call site instruction, so setting IP to
295 // that does simualates a return.
296 newRegisters.setIP(returnAddress);
298 // Simulate the step by replacing the register set with the new ones.
299 registers = newRegisters;
301 return UNW_STEP_SUCCESS;
304 return UNW_EBADFRAME;
307 template <typename A, typename R>
309 DwarfInstructions<A, R>::evaluateExpression(pint_t expression, A &addressSpace,
311 pint_t initialStackValue) {
312 const bool log = false;
313 pint_t p = expression;
314 pint_t expressionEnd = expression + 20; // temp, until len read
315 pint_t length = (pint_t)addressSpace.getULEB128(p, expressionEnd);
316 expressionEnd = p + length;
318 fprintf(stderr, "evaluateExpression(): length=%" PRIu64 "\n",
322 *(++sp) = initialStackValue;
324 while (p < expressionEnd) {
326 for (pint_t *t = sp; t > stack; --t) {
327 fprintf(stderr, "sp[] = 0x%" PRIx64 "\n", (uint64_t)(*t));
330 uint8_t opcode = addressSpace.get8(p++);
331 sint_t svalue, svalue2;
336 // push immediate address sized value
337 value = addressSpace.getP(p);
341 fprintf(stderr, "push 0x%" PRIx64 "\n", (uint64_t)value);
345 // pop stack, dereference, push result
347 *(++sp) = addressSpace.getP(value);
349 fprintf(stderr, "dereference 0x%" PRIx64 "\n", (uint64_t)value);
353 // push immediate 1 byte value
354 value = addressSpace.get8(p);
358 fprintf(stderr, "push 0x%" PRIx64 "\n", (uint64_t)value);
362 // push immediate 1 byte signed value
363 svalue = (int8_t) addressSpace.get8(p);
365 *(++sp) = (pint_t)svalue;
367 fprintf(stderr, "push 0x%" PRIx64 "\n", (uint64_t)svalue);
371 // push immediate 2 byte value
372 value = addressSpace.get16(p);
376 fprintf(stderr, "push 0x%" PRIx64 "\n", (uint64_t)value);
380 // push immediate 2 byte signed value
381 svalue = (int16_t) addressSpace.get16(p);
383 *(++sp) = (pint_t)svalue;
385 fprintf(stderr, "push 0x%" PRIx64 "\n", (uint64_t)svalue);
389 // push immediate 4 byte value
390 value = addressSpace.get32(p);
394 fprintf(stderr, "push 0x%" PRIx64 "\n", (uint64_t)value);
398 // push immediate 4 byte signed value
399 svalue = (int32_t)addressSpace.get32(p);
401 *(++sp) = (pint_t)svalue;
403 fprintf(stderr, "push 0x%" PRIx64 "\n", (uint64_t)svalue);
407 // push immediate 8 byte value
408 value = (pint_t)addressSpace.get64(p);
412 fprintf(stderr, "push 0x%" PRIx64 "\n", (uint64_t)value);
416 // push immediate 8 byte signed value
417 value = (pint_t)addressSpace.get64(p);
421 fprintf(stderr, "push 0x%" PRIx64 "\n", (uint64_t)value);
425 // push immediate ULEB128 value
426 value = (pint_t)addressSpace.getULEB128(p, expressionEnd);
429 fprintf(stderr, "push 0x%" PRIx64 "\n", (uint64_t)value);
433 // push immediate SLEB128 value
434 svalue = (sint_t)addressSpace.getSLEB128(p, expressionEnd);
435 *(++sp) = (pint_t)svalue;
437 fprintf(stderr, "push 0x%" PRIx64 "\n", (uint64_t)svalue);
445 fprintf(stderr, "duplicate top of stack\n");
452 fprintf(stderr, "pop top of stack\n");
460 fprintf(stderr, "duplicate second in stack\n");
465 reg = addressSpace.get8(p);
467 value = sp[-(int)reg];
470 fprintf(stderr, "duplicate %d in stack\n", reg);
479 fprintf(stderr, "swap top of stack\n");
489 fprintf(stderr, "rotate top three of stack\n");
493 // pop stack, dereference, push result
495 *sp = *((pint_t*)value);
497 fprintf(stderr, "x-dereference 0x%" PRIx64 "\n", (uint64_t)value);
501 svalue = (sint_t)*sp;
503 *sp = (pint_t)(-svalue);
505 fprintf(stderr, "abs\n");
512 fprintf(stderr, "and\n");
516 svalue = (sint_t)(*sp--);
517 svalue2 = (sint_t)*sp;
518 *sp = (pint_t)(svalue2 / svalue);
520 fprintf(stderr, "div\n");
527 fprintf(stderr, "minus\n");
531 svalue = (sint_t)(*sp--);
532 svalue2 = (sint_t)*sp;
533 *sp = (pint_t)(svalue2 % svalue);
535 fprintf(stderr, "module\n");
539 svalue = (sint_t)(*sp--);
540 svalue2 = (sint_t)*sp;
541 *sp = (pint_t)(svalue2 * svalue);
543 fprintf(stderr, "mul\n");
549 fprintf(stderr, "neg\n");
553 svalue = (sint_t)(*sp);
554 *sp = (pint_t)(~svalue);
556 fprintf(stderr, "not\n");
563 fprintf(stderr, "or\n");
570 fprintf(stderr, "plus\n");
573 case DW_OP_plus_uconst:
574 // pop stack, add uelb128 constant, push result
575 *sp += static_cast<pint_t>(addressSpace.getULEB128(p, expressionEnd));
577 fprintf(stderr, "add constant\n");
584 fprintf(stderr, "shift left\n");
591 fprintf(stderr, "shift left\n");
596 svalue = (sint_t)*sp;
597 *sp = (pint_t)(svalue >> value);
599 fprintf(stderr, "shift left arithmetric\n");
606 fprintf(stderr, "xor\n");
610 svalue = (int16_t) addressSpace.get16(p);
612 p = (pint_t)((sint_t)p + svalue);
614 fprintf(stderr, "skip %" PRIu64 "\n", (uint64_t)svalue);
618 svalue = (int16_t) addressSpace.get16(p);
621 p = (pint_t)((sint_t)p + svalue);
623 fprintf(stderr, "bra %" PRIu64 "\n", (uint64_t)svalue);
628 *sp = (*sp == value);
630 fprintf(stderr, "eq\n");
635 *sp = (*sp >= value);
637 fprintf(stderr, "ge\n");
644 fprintf(stderr, "gt\n");
649 *sp = (*sp <= value);
651 fprintf(stderr, "le\n");
658 fprintf(stderr, "lt\n");
663 *sp = (*sp != value);
665 fprintf(stderr, "ne\n");
700 value = static_cast<pint_t>(opcode - DW_OP_lit0);
703 fprintf(stderr, "push literal 0x%" PRIx64 "\n", (uint64_t)value);
738 reg = static_cast<uint32_t>(opcode - DW_OP_reg0);
739 *(++sp) = registers.getRegister((int)reg);
741 fprintf(stderr, "push reg %d\n", reg);
745 reg = static_cast<uint32_t>(addressSpace.getULEB128(p, expressionEnd));
746 *(++sp) = registers.getRegister((int)reg);
748 fprintf(stderr, "push reg %d + 0x%" PRIx64 "\n", reg, (uint64_t)svalue);
783 reg = static_cast<uint32_t>(opcode - DW_OP_breg0);
784 svalue = (sint_t)addressSpace.getSLEB128(p, expressionEnd);
785 svalue += static_cast<sint_t>(registers.getRegister((int)reg));
786 *(++sp) = (pint_t)(svalue);
788 fprintf(stderr, "push reg %d + 0x%" PRIx64 "\n", reg, (uint64_t)svalue);
792 reg = static_cast<uint32_t>(addressSpace.getULEB128(p, expressionEnd));
793 svalue = (sint_t)addressSpace.getSLEB128(p, expressionEnd);
794 svalue += static_cast<sint_t>(registers.getRegister((int)reg));
795 *(++sp) = (pint_t)(svalue);
797 fprintf(stderr, "push reg %d + 0x%" PRIx64 "\n", reg, (uint64_t)svalue);
801 _LIBUNWIND_ABORT("DW_OP_fbreg not implemented");
805 _LIBUNWIND_ABORT("DW_OP_piece not implemented");
808 case DW_OP_deref_size:
809 // pop stack, dereference, push result
811 switch (addressSpace.get8(p++)) {
813 value = addressSpace.get8(value);
816 value = addressSpace.get16(value);
819 value = addressSpace.get32(value);
822 value = (pint_t)addressSpace.get64(value);
825 _LIBUNWIND_ABORT("DW_OP_deref_size with bad size");
829 fprintf(stderr, "sized dereference 0x%" PRIx64 "\n", (uint64_t)value);
832 case DW_OP_xderef_size:
834 case DW_OP_push_object_addres:
839 _LIBUNWIND_ABORT("DWARF opcode not implemented");
844 fprintf(stderr, "expression evaluates to 0x%" PRIx64 "\n", (uint64_t)*sp);
850 } // namespace libunwind
852 #endif // __DWARF_INSTRUCTIONS_HPP__