packaging: support aarch64 build
[platform/upstream/gcc48.git] / libgcc / config / ia64 / sfp-machine.h
1 #define _FP_W_TYPE_SIZE         64
2 #define _FP_W_TYPE              unsigned long
3 #define _FP_WS_TYPE             signed long
4 #define _FP_I_TYPE              long
5
6 typedef int TItype __attribute__ ((mode (TI)));
7 typedef unsigned int UTItype __attribute__ ((mode (TI)));
8
9 #define TI_BITS (__CHAR_BIT__ * (int)sizeof(TItype))
10
11 /* The type of the result of a floating point comparison.  This must
12    match `__libgcc_cmp_return__' in GCC for the target.  */
13 typedef int __gcc_CMPtype __attribute__ ((mode (__libgcc_cmp_return__)));
14 #define CMPtype __gcc_CMPtype
15
16 #define _FP_MUL_MEAT_Q(R,X,Y)                           \
17   _FP_MUL_MEAT_2_wide(_FP_WFRACBITS_Q,R,X,Y,umul_ppmm)
18
19 #define _FP_DIV_MEAT_Q(R,X,Y)   _FP_DIV_MEAT_2_udiv(Q,R,X,Y)
20
21 #define _FP_NANFRAC_S           _FP_QNANBIT_S
22 #define _FP_NANFRAC_D           _FP_QNANBIT_D
23 #define _FP_NANFRAC_E           _FP_QNANBIT_E, 0
24 #define _FP_NANFRAC_Q           _FP_QNANBIT_Q, 0
25
26 #define _FP_KEEPNANFRACP        1
27
28 #define _FP_NANSIGN_S           1
29 #define _FP_NANSIGN_D           1
30 #define _FP_NANSIGN_E           1
31 #define _FP_NANSIGN_Q           1
32
33 /* Here is something Intel misdesigned: the specs don't define
34    the case where we have two NaNs with same mantissas, but
35    different sign. Different operations pick up different NaNs.  */
36 #define _FP_CHOOSENAN(fs, wc, R, X, Y, OP)                      \
37   do {                                                          \
38     if (_FP_FRAC_GT_##wc(X, Y)                                  \
39         || (_FP_FRAC_EQ_##wc(X,Y) && (OP == '+' || OP == '*'))) \
40       {                                                         \
41         R##_s = X##_s;                                          \
42         _FP_FRAC_COPY_##wc(R,X);                                \
43       }                                                         \
44     else                                                        \
45       {                                                         \
46         R##_s = Y##_s;                                          \
47         _FP_FRAC_COPY_##wc(R,Y);                                \
48       }                                                         \
49     R##_c = FP_CLS_NAN;                                         \
50   } while (0)
51
52 #define FP_EX_INVALID           0x01
53 #define FP_EX_DENORM            0x02
54 #define FP_EX_DIVZERO           0x04
55 #define FP_EX_OVERFLOW          0x08
56 #define FP_EX_UNDERFLOW         0x10
57 #define FP_EX_INEXACT           0x20
58
59 void __sfp_handle_exceptions (int);
60
61 #define FP_HANDLE_EXCEPTIONS                    \
62   do {                                          \
63     if (__builtin_expect (_fex, 0))             \
64       __sfp_handle_exceptions (_fex);           \
65   } while (0);
66
67 #define FP_RND_NEAREST          0
68 #define FP_RND_ZERO             0xc00L
69 #define FP_RND_PINF             0x800L
70 #define FP_RND_MINF             0x400L
71
72 #define FP_RND_MASK             0xc00L
73
74 #define _FP_DECL_EX \
75   unsigned long int _fcw __attribute__ ((unused)) = FP_RND_NEAREST
76
77 #define FP_INIT_ROUNDMODE                                       \
78   do {                                                          \
79     __asm__ __volatile__ ("mov.m %0 = ar.fpsr" : "=r" (_fcw));  \
80   } while (0)
81
82 #define FP_ROUNDMODE            (_fcw & FP_RND_MASK)
83
84 #define __LITTLE_ENDIAN 1234
85 #define __BIG_ENDIAN    4321
86
87 #define __BYTE_ORDER __LITTLE_ENDIAN
88
89 /* Define ALIASNAME as a strong alias for NAME.  */
90 #define strong_alias(name, aliasname) _strong_alias(name, aliasname)
91 #define _strong_alias(name, aliasname) \
92   extern __typeof (name) aliasname __attribute__ ((alias (#name)));