3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
5 * See file CREDITS for list of people who contributed to this
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
25 #include <asm/cache.h>
27 void flush_cache (ulong start_addr, ulong size)
30 ulong addr, end_addr = start_addr + size;
32 if (CFG_CACHELINE_SIZE) {
33 addr = start_addr & (CFG_CACHELINE_SIZE - 1);
34 for (addr = start_addr;
36 addr += CFG_CACHELINE_SIZE) {
37 asm ("dcbst 0,%0": :"r" (addr));
39 asm ("sync"); /* Wait for all dcbst to complete on bus */
41 for (addr = start_addr;
43 addr += CFG_CACHELINE_SIZE) {
44 asm ("icbi 0,%0": :"r" (addr));
47 asm ("sync"); /* Always flush prefetch queue in any case */