2 * (C) Copyright 2003 Josef Baumgartner <josef.baumgartner@telex.de>
5 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
7 * See file CREDITS for list of people who contributed to this
10 * This program is free software; you can redistribute it and/or
11 * modify it under the terms of the GNU General Public License as
12 * published by the Free Software Foundation; either version 2 of
13 * the License, or (at your option) any later version.
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
28 #include <asm/mcftimer.h>
31 #include <asm/m5271.h>
32 #include <asm/immap_5271.h>
36 #include <asm/m5272.h>
37 #include <asm/immap_5272.h>
41 #include <asm/m5282.h>
45 #include <asm/m5249.h>
46 #include <asm/immap_5249.h>
50 static ulong timestamp;
51 #if defined(CONFIG_M5282) || defined(CONFIG_M5271)
52 static unsigned short lastinc;
56 #if defined(CONFIG_M5272)
58 * We use timer 3 which is running with a period of 1 us
60 void udelay(unsigned long usec)
62 volatile timer_t *timerp = (timer_t *) (CFG_MBAR + MCFTIMER_BASE3);
72 /* Set up TIMER 3 as timebase clock */
73 timerp->timer_tmr = MCFTIMER_TMR_DISABLE;
74 timerp->timer_tcn = 0;
75 /* set period to 1 us */
76 timerp->timer_tmr = (((CFG_CLK / 1000000) - 1) << 8) | MCFTIMER_TMR_CLK1 |
77 MCFTIMER_TMR_FREERUN | MCFTIMER_TMR_ENABLE;
79 start = now = timerp->timer_tcn;
80 while (now < start + tmp)
81 now = timerp->timer_tcn;
85 void mcf_timer_interrupt (void * not_used){
86 volatile timer_t *timerp = (timer_t *) (CFG_MBAR + MCFTIMER_BASE4);
87 volatile intctrl_t *intp = (intctrl_t *) (CFG_MBAR + MCFSIM_ICR1);
89 /* check for timer 4 interrupts */
90 if ((intp->int_isr & 0x01000000) != 0) {
95 timerp->timer_ter = MCFTIMER_TER_CAP | MCFTIMER_TER_REF;
99 void timer_init (void) {
100 volatile timer_t *timerp = (timer_t *) (CFG_MBAR + MCFTIMER_BASE4);
101 volatile intctrl_t *intp = (intctrl_t *) (CFG_MBAR + MCFSIM_ICR1);
105 /* Set up TIMER 4 as clock */
106 timerp->timer_tmr = MCFTIMER_TMR_DISABLE;
108 /* initialize and enable timer 4 interrupt */
109 irq_install_handler (72, mcf_timer_interrupt, 0);
110 intp->int_icr1 |= 0x0000000d;
112 timerp->timer_tcn = 0;
113 timerp->timer_trr = 1000; /* Interrupt every ms */
114 /* set a period of 1us, set timer mode to restart and enable timer and interrupt */
115 timerp->timer_tmr = (((CFG_CLK / 1000000) - 1) << 8) | MCFTIMER_TMR_CLK1 |
116 MCFTIMER_TMR_RESTART | MCFTIMER_TMR_ENORI | MCFTIMER_TMR_ENABLE;
119 void reset_timer (void)
124 ulong get_timer (ulong base)
126 return (timestamp - base);
129 void set_timer (ulong t)
135 #if defined(CONFIG_M5282) || defined(CONFIG_M5271)
137 void udelay(unsigned long usec)
139 volatile unsigned short *timerp;
142 timerp = (volatile unsigned short *) (CFG_MBAR + MCFTIMER_BASE3);
151 /* Set up TIMER 3 as timebase clock */
152 timerp[MCFTIMER_PCSR] = MCFTIMER_PCSR_OVW;
153 timerp[MCFTIMER_PMR] = 0;
154 /* set period to 1 us */
155 timerp[MCFTIMER_PCSR] =
157 (6 << 8) | MCFTIMER_PCSR_EN | MCFTIMER_PCSR_OVW;
158 #else /* !CONFIG_M5271 */
159 (5 << 8) | MCFTIMER_PCSR_EN | MCFTIMER_PCSR_OVW;
160 #endif /* CONFIG_M5271 */
162 timerp[MCFTIMER_PMR] = tmp;
163 while (timerp[MCFTIMER_PCNTR] > 0);
167 void timer_init (void)
169 volatile unsigned short *timerp;
171 timerp = (volatile unsigned short *) (CFG_MBAR + MCFTIMER_BASE4);
174 /* Set up TIMER 4 as poll clock */
175 timerp[MCFTIMER_PCSR] = MCFTIMER_PCSR_OVW;
176 timerp[MCFTIMER_PMR] = lastinc = 0;
177 timerp[MCFTIMER_PCSR] =
179 (6 << 8) | MCFTIMER_PCSR_EN | MCFTIMER_PCSR_OVW;
180 #else /* !CONFIG_M5271 */
181 (5 << 8) | MCFTIMER_PCSR_EN | MCFTIMER_PCSR_OVW;
182 #endif /* CONFIG_M5271 */
185 void set_timer (ulong t)
187 volatile unsigned short *timerp;
189 timerp = (volatile unsigned short *) (CFG_MBAR + MCFTIMER_BASE4);
191 timerp[MCFTIMER_PMR] = lastinc = 0;
194 ulong get_timer (ulong base)
196 unsigned short now, diff;
197 volatile unsigned short *timerp;
199 timerp = (volatile unsigned short *) (CFG_MBAR + MCFTIMER_BASE4);
200 now = timerp[MCFTIMER_PCNTR];
201 diff = -(now - lastinc);
205 return timestamp - base;
208 void wait_ticks (unsigned long ticks)
211 while (get_timer (0) < ticks);
216 #if defined(CONFIG_M5249)
218 * We use timer 1 which is running with a period of 1 us
220 void udelay(unsigned long usec)
222 volatile timer_t *timerp = (timer_t *) (CFG_MBAR + MCFTIMER_BASE1);
223 uint start, now, tmp;
232 /* Set up TIMER 1 as timebase clock */
233 timerp->timer_tmr = MCFTIMER_TMR_DISABLE;
234 timerp->timer_tcn = 0;
235 /* set period to 1 us */
236 /* on m5249 the system clock is (cpu_clk / 2) -> divide by 2000000 */
237 timerp->timer_tmr = (((CFG_CLK / 2000000) - 1) << 8) | MCFTIMER_TMR_CLK1 |
238 MCFTIMER_TMR_FREERUN | MCFTIMER_TMR_ENABLE;
240 start = now = timerp->timer_tcn;
241 while (now < start + tmp)
242 now = timerp->timer_tcn;
246 void mcf_timer_interrupt (void * not_used){
247 volatile timer_t *timerp = (timer_t *) (CFG_MBAR + MCFTIMER_BASE2);
249 /* check for timer 2 interrupts */
250 if ((mbar_readLong(MCFSIM_IPR) & 0x00000400) == 0) {
255 timerp->timer_ter = MCFTIMER_TER_CAP | MCFTIMER_TER_REF;
259 void timer_init (void) {
260 volatile timer_t *timerp = (timer_t *) (CFG_MBAR + MCFTIMER_BASE2);
264 /* Set up TIMER 2 as clock */
265 timerp->timer_tmr = MCFTIMER_TMR_DISABLE;
267 /* initialize and enable timer 2 interrupt */
268 irq_install_handler (31, mcf_timer_interrupt, 0);
269 mbar_writeLong(MCFSIM_IMR, mbar_readLong(MCFSIM_IMR) & ~0x00000400);
270 mbar_writeByte(MCFSIM_TIMER2ICR, MCFSIM_ICR_AUTOVEC | MCFSIM_ICR_LEVEL7 | MCFSIM_ICR_PRI3);
272 timerp->timer_tcn = 0;
273 timerp->timer_trr = 1000; /* Interrupt every ms */
274 /* set a period of 1us, set timer mode to restart and enable timer and interrupt */
275 /* on m5249 the system clock is (cpu_clk / 2) -> divide by 2000000 */
276 timerp->timer_tmr = (((CFG_CLK / 2000000) - 1) << 8) | MCFTIMER_TMR_CLK1 |
277 MCFTIMER_TMR_RESTART | MCFTIMER_TMR_ENORI | MCFTIMER_TMR_ENABLE;
280 void reset_timer (void)
285 ulong get_timer (ulong base)
287 return (timestamp - base);
290 void set_timer (ulong t)
298 * This function is derived from PowerPC code (read timebase as long long).
299 * On M68K it just returns the timer value.
301 unsigned long long get_ticks(void)
307 * This function is derived from PowerPC code (timebase clock frequency).
308 * On M68K it returns the number of timer ticks per second.
310 ulong get_tbclk (void)