Blackfin: check cache bits, not cplb bits
[platform/kernel/u-boot.git] / lib_blackfin / cache.c
1 /*
2  * U-boot - cache.c
3  *
4  * Copyright (c) 2005-2008 Analog Devices Inc.
5  *
6  * (C) Copyright 2000-2004
7  * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
8  *
9  * Licensed under the GPL-2 or later.
10  */
11
12 #include <common.h>
13 #include <asm/blackfin.h>
14 #include <asm/mach-common/bits/mpu.h>
15
16 void flush_cache(unsigned long addr, unsigned long size)
17 {
18         /* no need to flush stuff in on chip memory (L1/L2/etc...) */
19         if (addr >= 0xE0000000)
20                 return;
21
22         if (icache_status())
23                 blackfin_icache_flush_range((void *)addr, (void *)(addr + size));
24
25         if (dcache_status())
26                 blackfin_dcache_flush_range((void *)addr, (void *)(addr + size));
27 }
28
29 void icache_enable(void)
30 {
31         bfin_write_IMEM_CONTROL(IMC | ENICPLB);
32         SSYNC();
33 }
34
35 void icache_disable(void)
36 {
37         bfin_write_IMEM_CONTROL(0);
38         SSYNC();
39 }
40
41 int icache_status(void)
42 {
43         return bfin_read_IMEM_CONTROL() & IMC;
44 }
45
46 void dcache_enable(void)
47 {
48         bfin_write_DMEM_CONTROL(ACACHE_BCACHE | ENDCPLB | PORT_PREF0);
49         SSYNC();
50 }
51
52 void dcache_disable(void)
53 {
54         bfin_write_DMEM_CONTROL(0);
55         SSYNC();
56 }
57
58 int dcache_status(void)
59 {
60         return bfin_read_DMEM_CONTROL() & ACACHE_BCACHE;
61 }