2 * Dynamic DMA mapping support.
4 * This implementation is a fallback for platforms that do not support
5 * I/O TLBs (aka DMA address translation hardware).
6 * Copyright (C) 2000 Asit Mallick <Asit.K.Mallick@intel.com>
7 * Copyright (C) 2000 Goutham Rao <goutham.rao@intel.com>
8 * Copyright (C) 2000, 2003 Hewlett-Packard Co
9 * David Mosberger-Tang <davidm@hpl.hp.com>
11 * 03/05/07 davidm Switch from PCI-DMA to generic device DMA API.
12 * 00/12/13 davidm Rename to swiotlb.c and add mark_clean() to avoid
13 * unnecessary i-cache flushing.
14 * 04/07/.. ak Better overflow handling. Assorted fixes.
15 * 05/09/10 linville Add support for syncing ranges, support syncing for
16 * DMA_BIDIRECTIONAL mappings, miscellaneous cleanup.
17 * 08/12/11 beckyb Add highmem support
20 #include <linux/cache.h>
21 #include <linux/dma-mapping.h>
23 #include <linux/export.h>
24 #include <linux/spinlock.h>
25 #include <linux/string.h>
26 #include <linux/swiotlb.h>
27 #include <linux/pfn.h>
28 #include <linux/types.h>
29 #include <linux/ctype.h>
30 #include <linux/highmem.h>
31 #include <linux/gfp.h>
32 #include <linux/scatterlist.h>
33 #include <linux/mem_encrypt.h>
38 #include <linux/init.h>
39 #include <linux/bootmem.h>
40 #include <linux/iommu-helper.h>
42 #define CREATE_TRACE_POINTS
43 #include <trace/events/swiotlb.h>
45 #define OFFSET(val,align) ((unsigned long) \
46 ( (val) & ( (align) - 1)))
48 #define SLABS_PER_PAGE (1 << (PAGE_SHIFT - IO_TLB_SHIFT))
51 * Minimum IO TLB size to bother booting with. Systems with mainly
52 * 64bit capable cards will only lightly use the swiotlb. If we can't
53 * allocate a contiguous 1MB, we're probably in trouble anyway.
55 #define IO_TLB_MIN_SLABS ((1<<20) >> IO_TLB_SHIFT)
57 enum swiotlb_force swiotlb_force;
60 * Used to do a quick range check in swiotlb_tbl_unmap_single and
61 * swiotlb_tbl_sync_single_*, to see if the memory was in fact allocated by this
64 static phys_addr_t io_tlb_start, io_tlb_end;
67 * The number of IO TLB blocks (in groups of 64) between io_tlb_start and
68 * io_tlb_end. This is command line adjustable via setup_io_tlb_npages.
70 static unsigned long io_tlb_nslabs;
73 * When the IOMMU overflows we return a fallback buffer. This sets the size.
75 static unsigned long io_tlb_overflow = 32*1024;
77 static phys_addr_t io_tlb_overflow_buffer;
80 * This is a free list describing the number of free entries available from
83 static unsigned int *io_tlb_list;
84 static unsigned int io_tlb_index;
87 * Max segment that we can provide which (if pages are contingous) will
88 * not be bounced (unless SWIOTLB_FORCE is set).
90 unsigned int max_segment;
93 * We need to save away the original address corresponding to a mapped entry
94 * for the sync operations.
96 #define INVALID_PHYS_ADDR (~(phys_addr_t)0)
97 static phys_addr_t *io_tlb_orig_addr;
100 * Protect the above data structures in the map and unmap calls
102 static DEFINE_SPINLOCK(io_tlb_lock);
104 static int late_alloc;
107 setup_io_tlb_npages(char *str)
110 io_tlb_nslabs = simple_strtoul(str, &str, 0);
111 /* avoid tail segment of size < IO_TLB_SEGSIZE */
112 io_tlb_nslabs = ALIGN(io_tlb_nslabs, IO_TLB_SEGSIZE);
116 if (!strcmp(str, "force")) {
117 swiotlb_force = SWIOTLB_FORCE;
118 } else if (!strcmp(str, "noforce")) {
119 swiotlb_force = SWIOTLB_NO_FORCE;
125 early_param("swiotlb", setup_io_tlb_npages);
126 /* make io_tlb_overflow tunable too? */
128 unsigned long swiotlb_nr_tbl(void)
130 return io_tlb_nslabs;
132 EXPORT_SYMBOL_GPL(swiotlb_nr_tbl);
134 unsigned int swiotlb_max_segment(void)
138 EXPORT_SYMBOL_GPL(swiotlb_max_segment);
140 void swiotlb_set_max_segment(unsigned int val)
142 if (swiotlb_force == SWIOTLB_FORCE)
145 max_segment = rounddown(val, PAGE_SIZE);
148 /* default to 64MB */
149 #define IO_TLB_DEFAULT_SIZE (64UL<<20)
150 unsigned long swiotlb_size_or_default(void)
154 size = io_tlb_nslabs << IO_TLB_SHIFT;
156 return size ? size : (IO_TLB_DEFAULT_SIZE);
159 void __weak swiotlb_set_mem_attributes(void *vaddr, unsigned long size) { }
161 /* For swiotlb, clear memory encryption mask from dma addresses */
162 static dma_addr_t swiotlb_phys_to_dma(struct device *hwdev,
165 return __sme_clr(phys_to_dma(hwdev, address));
168 /* Note that this doesn't work with highmem page */
169 static dma_addr_t swiotlb_virt_to_bus(struct device *hwdev,
170 volatile void *address)
172 return phys_to_dma(hwdev, virt_to_phys(address));
175 static bool no_iotlb_memory;
177 void swiotlb_print_info(void)
179 unsigned long bytes = io_tlb_nslabs << IO_TLB_SHIFT;
180 unsigned char *vstart, *vend;
182 if (no_iotlb_memory) {
183 pr_warn("software IO TLB: No low mem\n");
187 vstart = phys_to_virt(io_tlb_start);
188 vend = phys_to_virt(io_tlb_end);
190 printk(KERN_INFO "software IO TLB [mem %#010llx-%#010llx] (%luMB) mapped at [%p-%p]\n",
191 (unsigned long long)io_tlb_start,
192 (unsigned long long)io_tlb_end,
193 bytes >> 20, vstart, vend - 1);
197 * Early SWIOTLB allocation may be too early to allow an architecture to
198 * perform the desired operations. This function allows the architecture to
199 * call SWIOTLB when the operations are possible. It needs to be called
200 * before the SWIOTLB memory is used.
202 void __init swiotlb_update_mem_attributes(void)
207 if (no_iotlb_memory || late_alloc)
210 vaddr = phys_to_virt(io_tlb_start);
211 bytes = PAGE_ALIGN(io_tlb_nslabs << IO_TLB_SHIFT);
212 swiotlb_set_mem_attributes(vaddr, bytes);
213 memset(vaddr, 0, bytes);
215 vaddr = phys_to_virt(io_tlb_overflow_buffer);
216 bytes = PAGE_ALIGN(io_tlb_overflow);
217 swiotlb_set_mem_attributes(vaddr, bytes);
218 memset(vaddr, 0, bytes);
221 int __init swiotlb_init_with_tbl(char *tlb, unsigned long nslabs, int verbose)
223 void *v_overflow_buffer;
224 unsigned long i, bytes;
226 bytes = nslabs << IO_TLB_SHIFT;
228 io_tlb_nslabs = nslabs;
229 io_tlb_start = __pa(tlb);
230 io_tlb_end = io_tlb_start + bytes;
233 * Get the overflow emergency buffer
235 v_overflow_buffer = memblock_virt_alloc_low_nopanic(
236 PAGE_ALIGN(io_tlb_overflow),
238 if (!v_overflow_buffer)
241 io_tlb_overflow_buffer = __pa(v_overflow_buffer);
244 * Allocate and initialize the free list array. This array is used
245 * to find contiguous free memory regions of size up to IO_TLB_SEGSIZE
246 * between io_tlb_start and io_tlb_end.
248 io_tlb_list = memblock_virt_alloc(
249 PAGE_ALIGN(io_tlb_nslabs * sizeof(int)),
251 io_tlb_orig_addr = memblock_virt_alloc(
252 PAGE_ALIGN(io_tlb_nslabs * sizeof(phys_addr_t)),
254 for (i = 0; i < io_tlb_nslabs; i++) {
255 io_tlb_list[i] = IO_TLB_SEGSIZE - OFFSET(i, IO_TLB_SEGSIZE);
256 io_tlb_orig_addr[i] = INVALID_PHYS_ADDR;
261 swiotlb_print_info();
263 swiotlb_set_max_segment(io_tlb_nslabs << IO_TLB_SHIFT);
268 * Statically reserve bounce buffer space and initialize bounce buffer data
269 * structures for the software IO TLB used to implement the DMA API.
272 swiotlb_init(int verbose)
274 size_t default_size = IO_TLB_DEFAULT_SIZE;
275 unsigned char *vstart;
278 if (!io_tlb_nslabs) {
279 io_tlb_nslabs = (default_size >> IO_TLB_SHIFT);
280 io_tlb_nslabs = ALIGN(io_tlb_nslabs, IO_TLB_SEGSIZE);
283 bytes = io_tlb_nslabs << IO_TLB_SHIFT;
285 /* Get IO TLB memory from the low pages */
286 vstart = memblock_virt_alloc_low_nopanic(PAGE_ALIGN(bytes), PAGE_SIZE);
287 if (vstart && !swiotlb_init_with_tbl(vstart, io_tlb_nslabs, verbose))
291 memblock_free_early(io_tlb_start,
292 PAGE_ALIGN(io_tlb_nslabs << IO_TLB_SHIFT));
293 pr_warn("Cannot allocate SWIOTLB buffer");
294 no_iotlb_memory = true;
298 * Systems with larger DMA zones (those that don't support ISA) can
299 * initialize the swiotlb later using the slab allocator if needed.
300 * This should be just like above, but with some error catching.
303 swiotlb_late_init_with_default_size(size_t default_size)
305 unsigned long bytes, req_nslabs = io_tlb_nslabs;
306 unsigned char *vstart = NULL;
310 if (!io_tlb_nslabs) {
311 io_tlb_nslabs = (default_size >> IO_TLB_SHIFT);
312 io_tlb_nslabs = ALIGN(io_tlb_nslabs, IO_TLB_SEGSIZE);
316 * Get IO TLB memory from the low pages
318 order = get_order(io_tlb_nslabs << IO_TLB_SHIFT);
319 io_tlb_nslabs = SLABS_PER_PAGE << order;
320 bytes = io_tlb_nslabs << IO_TLB_SHIFT;
322 while ((SLABS_PER_PAGE << order) > IO_TLB_MIN_SLABS) {
323 vstart = (void *)__get_free_pages(GFP_DMA | __GFP_NOWARN,
331 io_tlb_nslabs = req_nslabs;
334 if (order != get_order(bytes)) {
335 printk(KERN_WARNING "Warning: only able to allocate %ld MB "
336 "for software IO TLB\n", (PAGE_SIZE << order) >> 20);
337 io_tlb_nslabs = SLABS_PER_PAGE << order;
339 rc = swiotlb_late_init_with_tbl(vstart, io_tlb_nslabs);
341 free_pages((unsigned long)vstart, order);
347 swiotlb_late_init_with_tbl(char *tlb, unsigned long nslabs)
349 unsigned long i, bytes;
350 unsigned char *v_overflow_buffer;
352 bytes = nslabs << IO_TLB_SHIFT;
354 io_tlb_nslabs = nslabs;
355 io_tlb_start = virt_to_phys(tlb);
356 io_tlb_end = io_tlb_start + bytes;
358 swiotlb_set_mem_attributes(tlb, bytes);
359 memset(tlb, 0, bytes);
362 * Get the overflow emergency buffer
364 v_overflow_buffer = (void *)__get_free_pages(GFP_DMA,
365 get_order(io_tlb_overflow));
366 if (!v_overflow_buffer)
369 swiotlb_set_mem_attributes(v_overflow_buffer, io_tlb_overflow);
370 memset(v_overflow_buffer, 0, io_tlb_overflow);
371 io_tlb_overflow_buffer = virt_to_phys(v_overflow_buffer);
374 * Allocate and initialize the free list array. This array is used
375 * to find contiguous free memory regions of size up to IO_TLB_SEGSIZE
376 * between io_tlb_start and io_tlb_end.
378 io_tlb_list = (unsigned int *)__get_free_pages(GFP_KERNEL,
379 get_order(io_tlb_nslabs * sizeof(int)));
383 io_tlb_orig_addr = (phys_addr_t *)
384 __get_free_pages(GFP_KERNEL,
385 get_order(io_tlb_nslabs *
386 sizeof(phys_addr_t)));
387 if (!io_tlb_orig_addr)
390 for (i = 0; i < io_tlb_nslabs; i++) {
391 io_tlb_list[i] = IO_TLB_SEGSIZE - OFFSET(i, IO_TLB_SEGSIZE);
392 io_tlb_orig_addr[i] = INVALID_PHYS_ADDR;
396 swiotlb_print_info();
400 swiotlb_set_max_segment(io_tlb_nslabs << IO_TLB_SHIFT);
405 free_pages((unsigned long)io_tlb_list, get_order(io_tlb_nslabs *
409 free_pages((unsigned long)v_overflow_buffer,
410 get_order(io_tlb_overflow));
411 io_tlb_overflow_buffer = 0;
420 void __init swiotlb_free(void)
422 if (!io_tlb_orig_addr)
426 free_pages((unsigned long)phys_to_virt(io_tlb_overflow_buffer),
427 get_order(io_tlb_overflow));
428 free_pages((unsigned long)io_tlb_orig_addr,
429 get_order(io_tlb_nslabs * sizeof(phys_addr_t)));
430 free_pages((unsigned long)io_tlb_list, get_order(io_tlb_nslabs *
432 free_pages((unsigned long)phys_to_virt(io_tlb_start),
433 get_order(io_tlb_nslabs << IO_TLB_SHIFT));
435 memblock_free_late(io_tlb_overflow_buffer,
436 PAGE_ALIGN(io_tlb_overflow));
437 memblock_free_late(__pa(io_tlb_orig_addr),
438 PAGE_ALIGN(io_tlb_nslabs * sizeof(phys_addr_t)));
439 memblock_free_late(__pa(io_tlb_list),
440 PAGE_ALIGN(io_tlb_nslabs * sizeof(int)));
441 memblock_free_late(io_tlb_start,
442 PAGE_ALIGN(io_tlb_nslabs << IO_TLB_SHIFT));
448 int is_swiotlb_buffer(phys_addr_t paddr)
450 return paddr >= io_tlb_start && paddr < io_tlb_end;
454 * Bounce: copy the swiotlb buffer back to the original dma location
456 static void swiotlb_bounce(phys_addr_t orig_addr, phys_addr_t tlb_addr,
457 size_t size, enum dma_data_direction dir)
459 unsigned long pfn = PFN_DOWN(orig_addr);
460 unsigned char *vaddr = phys_to_virt(tlb_addr);
462 if (PageHighMem(pfn_to_page(pfn))) {
463 /* The buffer does not have a mapping. Map it in and copy */
464 unsigned int offset = orig_addr & ~PAGE_MASK;
470 sz = min_t(size_t, PAGE_SIZE - offset, size);
472 local_irq_save(flags);
473 buffer = kmap_atomic(pfn_to_page(pfn));
474 if (dir == DMA_TO_DEVICE)
475 memcpy(vaddr, buffer + offset, sz);
477 memcpy(buffer + offset, vaddr, sz);
478 kunmap_atomic(buffer);
479 local_irq_restore(flags);
486 } else if (dir == DMA_TO_DEVICE) {
487 memcpy(vaddr, phys_to_virt(orig_addr), size);
489 memcpy(phys_to_virt(orig_addr), vaddr, size);
493 phys_addr_t swiotlb_tbl_map_single(struct device *hwdev,
494 dma_addr_t tbl_dma_addr,
495 phys_addr_t orig_addr, size_t size,
496 enum dma_data_direction dir,
500 phys_addr_t tlb_addr;
501 unsigned int nslots, stride, index, wrap;
504 unsigned long offset_slots;
505 unsigned long max_slots;
508 panic("Can not allocate SWIOTLB buffer earlier and can't now provide you with the DMA bounce buffer");
511 pr_warn_once("SME is active and system is using DMA bounce buffers\n");
513 mask = dma_get_seg_boundary(hwdev);
515 tbl_dma_addr &= mask;
517 offset_slots = ALIGN(tbl_dma_addr, 1 << IO_TLB_SHIFT) >> IO_TLB_SHIFT;
520 * Carefully handle integer overflow which can occur when mask == ~0UL.
523 ? ALIGN(mask + 1, 1 << IO_TLB_SHIFT) >> IO_TLB_SHIFT
524 : 1UL << (BITS_PER_LONG - IO_TLB_SHIFT);
527 * For mappings greater than or equal to a page, we limit the stride
528 * (and hence alignment) to a page size.
530 nslots = ALIGN(size, 1 << IO_TLB_SHIFT) >> IO_TLB_SHIFT;
531 if (size >= PAGE_SIZE)
532 stride = (1 << (PAGE_SHIFT - IO_TLB_SHIFT));
539 * Find suitable number of IO TLB entries size that will fit this
540 * request and allocate a buffer from that IO TLB pool.
542 spin_lock_irqsave(&io_tlb_lock, flags);
543 index = ALIGN(io_tlb_index, stride);
544 if (index >= io_tlb_nslabs)
549 while (iommu_is_span_boundary(index, nslots, offset_slots,
552 if (index >= io_tlb_nslabs)
559 * If we find a slot that indicates we have 'nslots' number of
560 * contiguous buffers, we allocate the buffers from that slot
561 * and mark the entries as '0' indicating unavailable.
563 if (io_tlb_list[index] >= nslots) {
566 for (i = index; i < (int) (index + nslots); i++)
568 for (i = index - 1; (OFFSET(i, IO_TLB_SEGSIZE) != IO_TLB_SEGSIZE - 1) && io_tlb_list[i]; i--)
569 io_tlb_list[i] = ++count;
570 tlb_addr = io_tlb_start + (index << IO_TLB_SHIFT);
573 * Update the indices to avoid searching in the next
576 io_tlb_index = ((index + nslots) < io_tlb_nslabs
577 ? (index + nslots) : 0);
582 if (index >= io_tlb_nslabs)
584 } while (index != wrap);
587 spin_unlock_irqrestore(&io_tlb_lock, flags);
588 if (printk_ratelimit())
589 dev_warn(hwdev, "swiotlb buffer is full (sz: %zd bytes)\n", size);
590 return SWIOTLB_MAP_ERROR;
592 spin_unlock_irqrestore(&io_tlb_lock, flags);
595 * Save away the mapping from the original address to the DMA address.
596 * This is needed when we sync the memory. Then we sync the buffer if
599 for (i = 0; i < nslots; i++)
600 io_tlb_orig_addr[index+i] = orig_addr + (i << IO_TLB_SHIFT);
601 if (!(attrs & DMA_ATTR_SKIP_CPU_SYNC) &&
602 (dir == DMA_TO_DEVICE || dir == DMA_BIDIRECTIONAL))
603 swiotlb_bounce(orig_addr, tlb_addr, size, DMA_TO_DEVICE);
607 EXPORT_SYMBOL_GPL(swiotlb_tbl_map_single);
610 * Allocates bounce buffer and returns its kernel virtual address.
614 map_single(struct device *hwdev, phys_addr_t phys, size_t size,
615 enum dma_data_direction dir, unsigned long attrs)
617 dma_addr_t start_dma_addr;
619 if (swiotlb_force == SWIOTLB_NO_FORCE) {
620 dev_warn_ratelimited(hwdev, "Cannot do DMA to address %pa\n",
622 return SWIOTLB_MAP_ERROR;
625 start_dma_addr = swiotlb_phys_to_dma(hwdev, io_tlb_start);
626 return swiotlb_tbl_map_single(hwdev, start_dma_addr, phys, size,
631 * dma_addr is the kernel virtual address of the bounce buffer to unmap.
633 void swiotlb_tbl_unmap_single(struct device *hwdev, phys_addr_t tlb_addr,
634 size_t size, enum dma_data_direction dir,
638 int i, count, nslots = ALIGN(size, 1 << IO_TLB_SHIFT) >> IO_TLB_SHIFT;
639 int index = (tlb_addr - io_tlb_start) >> IO_TLB_SHIFT;
640 phys_addr_t orig_addr = io_tlb_orig_addr[index];
643 * First, sync the memory before unmapping the entry
645 if (orig_addr != INVALID_PHYS_ADDR &&
646 !(attrs & DMA_ATTR_SKIP_CPU_SYNC) &&
647 ((dir == DMA_FROM_DEVICE) || (dir == DMA_BIDIRECTIONAL)))
648 swiotlb_bounce(orig_addr, tlb_addr, size, DMA_FROM_DEVICE);
651 * Return the buffer to the free list by setting the corresponding
652 * entries to indicate the number of contiguous entries available.
653 * While returning the entries to the free list, we merge the entries
654 * with slots below and above the pool being returned.
656 spin_lock_irqsave(&io_tlb_lock, flags);
658 count = ((index + nslots) < ALIGN(index + 1, IO_TLB_SEGSIZE) ?
659 io_tlb_list[index + nslots] : 0);
661 * Step 1: return the slots to the free list, merging the
662 * slots with superceeding slots
664 for (i = index + nslots - 1; i >= index; i--) {
665 io_tlb_list[i] = ++count;
666 io_tlb_orig_addr[i] = INVALID_PHYS_ADDR;
669 * Step 2: merge the returned slots with the preceding slots,
670 * if available (non zero)
672 for (i = index - 1; (OFFSET(i, IO_TLB_SEGSIZE) != IO_TLB_SEGSIZE -1) && io_tlb_list[i]; i--)
673 io_tlb_list[i] = ++count;
675 spin_unlock_irqrestore(&io_tlb_lock, flags);
677 EXPORT_SYMBOL_GPL(swiotlb_tbl_unmap_single);
679 void swiotlb_tbl_sync_single(struct device *hwdev, phys_addr_t tlb_addr,
680 size_t size, enum dma_data_direction dir,
681 enum dma_sync_target target)
683 int index = (tlb_addr - io_tlb_start) >> IO_TLB_SHIFT;
684 phys_addr_t orig_addr = io_tlb_orig_addr[index];
686 if (orig_addr == INVALID_PHYS_ADDR)
688 orig_addr += (unsigned long)tlb_addr & ((1 << IO_TLB_SHIFT) - 1);
692 if (likely(dir == DMA_FROM_DEVICE || dir == DMA_BIDIRECTIONAL))
693 swiotlb_bounce(orig_addr, tlb_addr,
694 size, DMA_FROM_DEVICE);
696 BUG_ON(dir != DMA_TO_DEVICE);
698 case SYNC_FOR_DEVICE:
699 if (likely(dir == DMA_TO_DEVICE || dir == DMA_BIDIRECTIONAL))
700 swiotlb_bounce(orig_addr, tlb_addr,
701 size, DMA_TO_DEVICE);
703 BUG_ON(dir != DMA_FROM_DEVICE);
709 EXPORT_SYMBOL_GPL(swiotlb_tbl_sync_single);
712 swiotlb_alloc_coherent(struct device *hwdev, size_t size,
713 dma_addr_t *dma_handle, gfp_t flags)
717 int order = get_order(size);
718 u64 dma_mask = DMA_BIT_MASK(32);
720 if (hwdev && hwdev->coherent_dma_mask)
721 dma_mask = hwdev->coherent_dma_mask;
723 ret = (void *)__get_free_pages(flags, order);
725 dev_addr = swiotlb_virt_to_bus(hwdev, ret);
726 if (dev_addr + size - 1 > dma_mask) {
728 * The allocated memory isn't reachable by the device.
730 free_pages((unsigned long) ret, order);
736 * We are either out of memory or the device can't DMA to
737 * GFP_DMA memory; fall back on map_single(), which
738 * will grab memory from the lowest available address range.
740 phys_addr_t paddr = map_single(hwdev, 0, size,
742 if (paddr == SWIOTLB_MAP_ERROR)
745 ret = phys_to_virt(paddr);
746 dev_addr = swiotlb_phys_to_dma(hwdev, paddr);
748 /* Confirm address can be DMA'd by device */
749 if (dev_addr + size - 1 > dma_mask) {
750 printk("hwdev DMA mask = 0x%016Lx, dev_addr = 0x%016Lx\n",
751 (unsigned long long)dma_mask,
752 (unsigned long long)dev_addr);
755 * DMA_TO_DEVICE to avoid memcpy in unmap_single.
756 * The DMA_ATTR_SKIP_CPU_SYNC is optional.
758 swiotlb_tbl_unmap_single(hwdev, paddr,
760 DMA_ATTR_SKIP_CPU_SYNC);
765 *dma_handle = dev_addr;
766 memset(ret, 0, size);
771 pr_warn("swiotlb: coherent allocation failed for device %s size=%zu\n",
772 dev_name(hwdev), size);
777 EXPORT_SYMBOL(swiotlb_alloc_coherent);
780 swiotlb_free_coherent(struct device *hwdev, size_t size, void *vaddr,
783 phys_addr_t paddr = dma_to_phys(hwdev, dev_addr);
785 WARN_ON(irqs_disabled());
786 if (!is_swiotlb_buffer(paddr))
787 free_pages((unsigned long)vaddr, get_order(size));
790 * DMA_TO_DEVICE to avoid memcpy in swiotlb_tbl_unmap_single.
791 * DMA_ATTR_SKIP_CPU_SYNC is optional.
793 swiotlb_tbl_unmap_single(hwdev, paddr, size, DMA_TO_DEVICE,
794 DMA_ATTR_SKIP_CPU_SYNC);
796 EXPORT_SYMBOL(swiotlb_free_coherent);
799 swiotlb_full(struct device *dev, size_t size, enum dma_data_direction dir,
802 if (swiotlb_force == SWIOTLB_NO_FORCE)
806 * Ran out of IOMMU space for this operation. This is very bad.
807 * Unfortunately the drivers cannot handle this operation properly.
808 * unless they check for dma_mapping_error (most don't)
809 * When the mapping is small enough return a static buffer to limit
810 * the damage, or panic when the transfer is too big.
812 dev_err_ratelimited(dev, "DMA: Out of SW-IOMMU space for %zu bytes\n",
815 if (size <= io_tlb_overflow || !do_panic)
818 if (dir == DMA_BIDIRECTIONAL)
819 panic("DMA: Random memory could be DMA accessed\n");
820 if (dir == DMA_FROM_DEVICE)
821 panic("DMA: Random memory could be DMA written\n");
822 if (dir == DMA_TO_DEVICE)
823 panic("DMA: Random memory could be DMA read\n");
827 * Map a single buffer of the indicated size for DMA in streaming mode. The
828 * physical address to use is returned.
830 * Once the device is given the dma address, the device owns this memory until
831 * either swiotlb_unmap_page or swiotlb_dma_sync_single is performed.
833 dma_addr_t swiotlb_map_page(struct device *dev, struct page *page,
834 unsigned long offset, size_t size,
835 enum dma_data_direction dir,
838 phys_addr_t map, phys = page_to_phys(page) + offset;
839 dma_addr_t dev_addr = phys_to_dma(dev, phys);
841 BUG_ON(dir == DMA_NONE);
843 * If the address happens to be in the device's DMA window,
844 * we can safely return the device addr and not worry about bounce
847 if (dma_capable(dev, dev_addr, size) && swiotlb_force != SWIOTLB_FORCE)
850 trace_swiotlb_bounced(dev, dev_addr, size, swiotlb_force);
852 /* Oh well, have to allocate and map a bounce buffer. */
853 map = map_single(dev, phys, size, dir, attrs);
854 if (map == SWIOTLB_MAP_ERROR) {
855 swiotlb_full(dev, size, dir, 1);
856 return swiotlb_phys_to_dma(dev, io_tlb_overflow_buffer);
859 dev_addr = swiotlb_phys_to_dma(dev, map);
861 /* Ensure that the address returned is DMA'ble */
862 if (dma_capable(dev, dev_addr, size))
865 attrs |= DMA_ATTR_SKIP_CPU_SYNC;
866 swiotlb_tbl_unmap_single(dev, map, size, dir, attrs);
868 return swiotlb_phys_to_dma(dev, io_tlb_overflow_buffer);
870 EXPORT_SYMBOL_GPL(swiotlb_map_page);
873 * Unmap a single streaming mode DMA translation. The dma_addr and size must
874 * match what was provided for in a previous swiotlb_map_page call. All
875 * other usages are undefined.
877 * After this call, reads by the cpu to the buffer are guaranteed to see
878 * whatever the device wrote there.
880 static void unmap_single(struct device *hwdev, dma_addr_t dev_addr,
881 size_t size, enum dma_data_direction dir,
884 phys_addr_t paddr = dma_to_phys(hwdev, dev_addr);
886 BUG_ON(dir == DMA_NONE);
888 if (is_swiotlb_buffer(paddr)) {
889 swiotlb_tbl_unmap_single(hwdev, paddr, size, dir, attrs);
893 if (dir != DMA_FROM_DEVICE)
897 * phys_to_virt doesn't work with hihgmem page but we could
898 * call dma_mark_clean() with hihgmem page here. However, we
899 * are fine since dma_mark_clean() is null on POWERPC. We can
900 * make dma_mark_clean() take a physical address if necessary.
902 dma_mark_clean(phys_to_virt(paddr), size);
905 void swiotlb_unmap_page(struct device *hwdev, dma_addr_t dev_addr,
906 size_t size, enum dma_data_direction dir,
909 unmap_single(hwdev, dev_addr, size, dir, attrs);
911 EXPORT_SYMBOL_GPL(swiotlb_unmap_page);
914 * Make physical memory consistent for a single streaming mode DMA translation
917 * If you perform a swiotlb_map_page() but wish to interrogate the buffer
918 * using the cpu, yet do not wish to teardown the dma mapping, you must
919 * call this function before doing so. At the next point you give the dma
920 * address back to the card, you must first perform a
921 * swiotlb_dma_sync_for_device, and then the device again owns the buffer
924 swiotlb_sync_single(struct device *hwdev, dma_addr_t dev_addr,
925 size_t size, enum dma_data_direction dir,
926 enum dma_sync_target target)
928 phys_addr_t paddr = dma_to_phys(hwdev, dev_addr);
930 BUG_ON(dir == DMA_NONE);
932 if (is_swiotlb_buffer(paddr)) {
933 swiotlb_tbl_sync_single(hwdev, paddr, size, dir, target);
937 if (dir != DMA_FROM_DEVICE)
940 dma_mark_clean(phys_to_virt(paddr), size);
944 swiotlb_sync_single_for_cpu(struct device *hwdev, dma_addr_t dev_addr,
945 size_t size, enum dma_data_direction dir)
947 swiotlb_sync_single(hwdev, dev_addr, size, dir, SYNC_FOR_CPU);
949 EXPORT_SYMBOL(swiotlb_sync_single_for_cpu);
952 swiotlb_sync_single_for_device(struct device *hwdev, dma_addr_t dev_addr,
953 size_t size, enum dma_data_direction dir)
955 swiotlb_sync_single(hwdev, dev_addr, size, dir, SYNC_FOR_DEVICE);
957 EXPORT_SYMBOL(swiotlb_sync_single_for_device);
960 * Map a set of buffers described by scatterlist in streaming mode for DMA.
961 * This is the scatter-gather version of the above swiotlb_map_page
962 * interface. Here the scatter gather list elements are each tagged with the
963 * appropriate dma address and length. They are obtained via
964 * sg_dma_{address,length}(SG).
966 * NOTE: An implementation may be able to use a smaller number of
967 * DMA address/length pairs than there are SG table elements.
968 * (for example via virtual mapping capabilities)
969 * The routine returns the number of addr/length pairs actually
970 * used, at most nents.
972 * Device ownership issues as mentioned above for swiotlb_map_page are the
976 swiotlb_map_sg_attrs(struct device *hwdev, struct scatterlist *sgl, int nelems,
977 enum dma_data_direction dir, unsigned long attrs)
979 struct scatterlist *sg;
982 BUG_ON(dir == DMA_NONE);
984 for_each_sg(sgl, sg, nelems, i) {
985 phys_addr_t paddr = sg_phys(sg);
986 dma_addr_t dev_addr = phys_to_dma(hwdev, paddr);
988 if (swiotlb_force == SWIOTLB_FORCE ||
989 !dma_capable(hwdev, dev_addr, sg->length)) {
990 phys_addr_t map = map_single(hwdev, sg_phys(sg),
991 sg->length, dir, attrs);
992 if (map == SWIOTLB_MAP_ERROR) {
993 /* Don't panic here, we expect map_sg users
994 to do proper error handling. */
995 swiotlb_full(hwdev, sg->length, dir, 0);
996 attrs |= DMA_ATTR_SKIP_CPU_SYNC;
997 swiotlb_unmap_sg_attrs(hwdev, sgl, i, dir,
1002 sg->dma_address = swiotlb_phys_to_dma(hwdev, map);
1004 sg->dma_address = dev_addr;
1005 sg_dma_len(sg) = sg->length;
1009 EXPORT_SYMBOL(swiotlb_map_sg_attrs);
1012 * Unmap a set of streaming mode DMA translations. Again, cpu read rules
1013 * concerning calls here are the same as for swiotlb_unmap_page() above.
1016 swiotlb_unmap_sg_attrs(struct device *hwdev, struct scatterlist *sgl,
1017 int nelems, enum dma_data_direction dir,
1018 unsigned long attrs)
1020 struct scatterlist *sg;
1023 BUG_ON(dir == DMA_NONE);
1025 for_each_sg(sgl, sg, nelems, i)
1026 unmap_single(hwdev, sg->dma_address, sg_dma_len(sg), dir,
1029 EXPORT_SYMBOL(swiotlb_unmap_sg_attrs);
1032 * Make physical memory consistent for a set of streaming mode DMA translations
1035 * The same as swiotlb_sync_single_* but for a scatter-gather list, same rules
1039 swiotlb_sync_sg(struct device *hwdev, struct scatterlist *sgl,
1040 int nelems, enum dma_data_direction dir,
1041 enum dma_sync_target target)
1043 struct scatterlist *sg;
1046 for_each_sg(sgl, sg, nelems, i)
1047 swiotlb_sync_single(hwdev, sg->dma_address,
1048 sg_dma_len(sg), dir, target);
1052 swiotlb_sync_sg_for_cpu(struct device *hwdev, struct scatterlist *sg,
1053 int nelems, enum dma_data_direction dir)
1055 swiotlb_sync_sg(hwdev, sg, nelems, dir, SYNC_FOR_CPU);
1057 EXPORT_SYMBOL(swiotlb_sync_sg_for_cpu);
1060 swiotlb_sync_sg_for_device(struct device *hwdev, struct scatterlist *sg,
1061 int nelems, enum dma_data_direction dir)
1063 swiotlb_sync_sg(hwdev, sg, nelems, dir, SYNC_FOR_DEVICE);
1065 EXPORT_SYMBOL(swiotlb_sync_sg_for_device);
1068 swiotlb_dma_mapping_error(struct device *hwdev, dma_addr_t dma_addr)
1070 return (dma_addr == swiotlb_phys_to_dma(hwdev, io_tlb_overflow_buffer));
1072 EXPORT_SYMBOL(swiotlb_dma_mapping_error);
1075 * Return whether the given device DMA address mask can be supported
1076 * properly. For example, if your device can only drive the low 24-bits
1077 * during bus mastering, then you would pass 0x00ffffff as the mask to
1081 swiotlb_dma_supported(struct device *hwdev, u64 mask)
1083 return swiotlb_phys_to_dma(hwdev, io_tlb_end - 1) <= mask;
1085 EXPORT_SYMBOL(swiotlb_dma_supported);