2 * Dynamic DMA mapping support.
4 * This implementation is a fallback for platforms that do not support
5 * I/O TLBs (aka DMA address translation hardware).
6 * Copyright (C) 2000 Asit Mallick <Asit.K.Mallick@intel.com>
7 * Copyright (C) 2000 Goutham Rao <goutham.rao@intel.com>
8 * Copyright (C) 2000, 2003 Hewlett-Packard Co
9 * David Mosberger-Tang <davidm@hpl.hp.com>
11 * 03/05/07 davidm Switch from PCI-DMA to generic device DMA API.
12 * 00/12/13 davidm Rename to swiotlb.c and add mark_clean() to avoid
13 * unnecessary i-cache flushing.
14 * 04/07/.. ak Better overflow handling. Assorted fixes.
15 * 05/09/10 linville Add support for syncing ranges, support syncing for
16 * DMA_BIDIRECTIONAL mappings, miscellaneous cleanup.
17 * 08/12/11 beckyb Add highmem support
20 #include <linux/cache.h>
21 #include <linux/dma-mapping.h>
23 #include <linux/module.h>
24 #include <linux/spinlock.h>
25 #include <linux/string.h>
26 #include <linux/swiotlb.h>
27 #include <linux/pfn.h>
28 #include <linux/types.h>
29 #include <linux/ctype.h>
30 #include <linux/highmem.h>
31 #include <linux/gfp.h>
35 #include <asm/scatterlist.h>
37 #include <linux/init.h>
38 #include <linux/bootmem.h>
39 #include <linux/iommu-helper.h>
41 #define OFFSET(val,align) ((unsigned long) \
42 ( (val) & ( (align) - 1)))
44 #define SLABS_PER_PAGE (1 << (PAGE_SHIFT - IO_TLB_SHIFT))
47 * Minimum IO TLB size to bother booting with. Systems with mainly
48 * 64bit capable cards will only lightly use the swiotlb. If we can't
49 * allocate a contiguous 1MB, we're probably in trouble anyway.
51 #define IO_TLB_MIN_SLABS ((1<<20) >> IO_TLB_SHIFT)
54 * Enumeration for sync targets
56 enum dma_sync_target {
64 * Used to do a quick range check in swiotlb_tbl_unmap_single and
65 * swiotlb_tbl_sync_single_*, to see if the memory was in fact allocated by this
68 static char *io_tlb_start, *io_tlb_end;
71 * The number of IO TLB blocks (in groups of 64) betweeen io_tlb_start and
72 * io_tlb_end. This is command line adjustable via setup_io_tlb_npages.
74 static unsigned long io_tlb_nslabs;
77 * When the IOMMU overflows we return a fallback buffer. This sets the size.
79 static unsigned long io_tlb_overflow = 32*1024;
81 void *io_tlb_overflow_buffer;
84 * This is a free list describing the number of free entries available from
87 static unsigned int *io_tlb_list;
88 static unsigned int io_tlb_index;
91 * We need to save away the original address corresponding to a mapped entry
92 * for the sync operations.
94 static phys_addr_t *io_tlb_orig_addr;
97 * Protect the above data structures in the map and unmap calls
99 static DEFINE_SPINLOCK(io_tlb_lock);
101 static int late_alloc;
104 setup_io_tlb_npages(char *str)
107 io_tlb_nslabs = simple_strtoul(str, &str, 0);
108 /* avoid tail segment of size < IO_TLB_SEGSIZE */
109 io_tlb_nslabs = ALIGN(io_tlb_nslabs, IO_TLB_SEGSIZE);
113 if (!strcmp(str, "force"))
118 __setup("swiotlb=", setup_io_tlb_npages);
119 /* make io_tlb_overflow tunable too? */
121 /* Note that this doesn't work with highmem page */
122 static dma_addr_t swiotlb_virt_to_bus(struct device *hwdev,
123 volatile void *address)
125 return phys_to_dma(hwdev, virt_to_phys(address));
128 void swiotlb_print_info(void)
130 unsigned long bytes = io_tlb_nslabs << IO_TLB_SHIFT;
131 phys_addr_t pstart, pend;
133 pstart = virt_to_phys(io_tlb_start);
134 pend = virt_to_phys(io_tlb_end);
136 printk(KERN_INFO "Placing %luMB software IO TLB between %p - %p\n",
137 bytes >> 20, io_tlb_start, io_tlb_end);
138 printk(KERN_INFO "software IO TLB at phys %#llx - %#llx\n",
139 (unsigned long long)pstart,
140 (unsigned long long)pend);
143 void __init swiotlb_init_with_tbl(char *tlb, unsigned long nslabs, int verbose)
145 unsigned long i, bytes;
147 bytes = nslabs << IO_TLB_SHIFT;
149 io_tlb_nslabs = nslabs;
151 io_tlb_end = io_tlb_start + bytes;
154 * Allocate and initialize the free list array. This array is used
155 * to find contiguous free memory regions of size up to IO_TLB_SEGSIZE
156 * between io_tlb_start and io_tlb_end.
158 io_tlb_list = alloc_bootmem(io_tlb_nslabs * sizeof(int));
159 for (i = 0; i < io_tlb_nslabs; i++)
160 io_tlb_list[i] = IO_TLB_SEGSIZE - OFFSET(i, IO_TLB_SEGSIZE);
162 io_tlb_orig_addr = alloc_bootmem(io_tlb_nslabs * sizeof(phys_addr_t));
165 * Get the overflow emergency buffer
167 io_tlb_overflow_buffer = alloc_bootmem_low(io_tlb_overflow);
168 if (!io_tlb_overflow_buffer)
169 panic("Cannot allocate SWIOTLB overflow buffer!\n");
171 swiotlb_print_info();
175 * Statically reserve bounce buffer space and initialize bounce buffer data
176 * structures for the software IO TLB used to implement the DMA API.
179 swiotlb_init_with_default_size(size_t default_size, int verbose)
183 if (!io_tlb_nslabs) {
184 io_tlb_nslabs = (default_size >> IO_TLB_SHIFT);
185 io_tlb_nslabs = ALIGN(io_tlb_nslabs, IO_TLB_SEGSIZE);
188 bytes = io_tlb_nslabs << IO_TLB_SHIFT;
191 * Get IO TLB memory from the low pages
193 io_tlb_start = alloc_bootmem_low_pages(bytes);
195 panic("Cannot allocate SWIOTLB buffer");
197 swiotlb_init_with_tbl(io_tlb_start, io_tlb_nslabs, verbose);
201 swiotlb_init(int verbose)
203 swiotlb_init_with_default_size(64 * (1<<20), verbose); /* default to 64MB */
207 * Systems with larger DMA zones (those that don't support ISA) can
208 * initialize the swiotlb later using the slab allocator if needed.
209 * This should be just like above, but with some error catching.
212 swiotlb_late_init_with_default_size(size_t default_size)
214 unsigned long i, bytes, req_nslabs = io_tlb_nslabs;
217 if (!io_tlb_nslabs) {
218 io_tlb_nslabs = (default_size >> IO_TLB_SHIFT);
219 io_tlb_nslabs = ALIGN(io_tlb_nslabs, IO_TLB_SEGSIZE);
223 * Get IO TLB memory from the low pages
225 order = get_order(io_tlb_nslabs << IO_TLB_SHIFT);
226 io_tlb_nslabs = SLABS_PER_PAGE << order;
227 bytes = io_tlb_nslabs << IO_TLB_SHIFT;
229 while ((SLABS_PER_PAGE << order) > IO_TLB_MIN_SLABS) {
230 io_tlb_start = (void *)__get_free_pages(GFP_DMA | __GFP_NOWARN,
240 if (order != get_order(bytes)) {
241 printk(KERN_WARNING "Warning: only able to allocate %ld MB "
242 "for software IO TLB\n", (PAGE_SIZE << order) >> 20);
243 io_tlb_nslabs = SLABS_PER_PAGE << order;
244 bytes = io_tlb_nslabs << IO_TLB_SHIFT;
246 io_tlb_end = io_tlb_start + bytes;
247 memset(io_tlb_start, 0, bytes);
250 * Allocate and initialize the free list array. This array is used
251 * to find contiguous free memory regions of size up to IO_TLB_SEGSIZE
252 * between io_tlb_start and io_tlb_end.
254 io_tlb_list = (unsigned int *)__get_free_pages(GFP_KERNEL,
255 get_order(io_tlb_nslabs * sizeof(int)));
259 for (i = 0; i < io_tlb_nslabs; i++)
260 io_tlb_list[i] = IO_TLB_SEGSIZE - OFFSET(i, IO_TLB_SEGSIZE);
263 io_tlb_orig_addr = (phys_addr_t *)
264 __get_free_pages(GFP_KERNEL,
265 get_order(io_tlb_nslabs *
266 sizeof(phys_addr_t)));
267 if (!io_tlb_orig_addr)
270 memset(io_tlb_orig_addr, 0, io_tlb_nslabs * sizeof(phys_addr_t));
273 * Get the overflow emergency buffer
275 io_tlb_overflow_buffer = (void *)__get_free_pages(GFP_DMA,
276 get_order(io_tlb_overflow));
277 if (!io_tlb_overflow_buffer)
280 swiotlb_print_info();
287 free_pages((unsigned long)io_tlb_orig_addr,
288 get_order(io_tlb_nslabs * sizeof(phys_addr_t)));
289 io_tlb_orig_addr = NULL;
291 free_pages((unsigned long)io_tlb_list, get_order(io_tlb_nslabs *
296 free_pages((unsigned long)io_tlb_start, order);
299 io_tlb_nslabs = req_nslabs;
303 void __init swiotlb_free(void)
305 if (!io_tlb_overflow_buffer)
309 free_pages((unsigned long)io_tlb_overflow_buffer,
310 get_order(io_tlb_overflow));
311 free_pages((unsigned long)io_tlb_orig_addr,
312 get_order(io_tlb_nslabs * sizeof(phys_addr_t)));
313 free_pages((unsigned long)io_tlb_list, get_order(io_tlb_nslabs *
315 free_pages((unsigned long)io_tlb_start,
316 get_order(io_tlb_nslabs << IO_TLB_SHIFT));
318 free_bootmem_late(__pa(io_tlb_overflow_buffer),
320 free_bootmem_late(__pa(io_tlb_orig_addr),
321 io_tlb_nslabs * sizeof(phys_addr_t));
322 free_bootmem_late(__pa(io_tlb_list),
323 io_tlb_nslabs * sizeof(int));
324 free_bootmem_late(__pa(io_tlb_start),
325 io_tlb_nslabs << IO_TLB_SHIFT);
329 static int is_swiotlb_buffer(phys_addr_t paddr)
331 return paddr >= virt_to_phys(io_tlb_start) &&
332 paddr < virt_to_phys(io_tlb_end);
336 * Bounce: copy the swiotlb buffer back to the original dma location
338 static void swiotlb_bounce(phys_addr_t phys, char *dma_addr, size_t size,
339 enum dma_data_direction dir)
341 unsigned long pfn = PFN_DOWN(phys);
343 if (PageHighMem(pfn_to_page(pfn))) {
344 /* The buffer does not have a mapping. Map it in and copy */
345 unsigned int offset = phys & ~PAGE_MASK;
351 sz = min_t(size_t, PAGE_SIZE - offset, size);
353 local_irq_save(flags);
354 buffer = kmap_atomic(pfn_to_page(pfn),
356 if (dir == DMA_TO_DEVICE)
357 memcpy(dma_addr, buffer + offset, sz);
359 memcpy(buffer + offset, dma_addr, sz);
360 kunmap_atomic(buffer, KM_BOUNCE_READ);
361 local_irq_restore(flags);
369 if (dir == DMA_TO_DEVICE)
370 memcpy(dma_addr, phys_to_virt(phys), size);
372 memcpy(phys_to_virt(phys), dma_addr, size);
376 void *swiotlb_tbl_map_single(struct device *hwdev, dma_addr_t tbl_dma_addr,
377 phys_addr_t phys, size_t size,
378 enum dma_data_direction dir)
382 unsigned int nslots, stride, index, wrap;
385 unsigned long offset_slots;
386 unsigned long max_slots;
388 mask = dma_get_seg_boundary(hwdev);
390 tbl_dma_addr &= mask;
392 offset_slots = ALIGN(tbl_dma_addr, 1 << IO_TLB_SHIFT) >> IO_TLB_SHIFT;
395 * Carefully handle integer overflow which can occur when mask == ~0UL.
398 ? ALIGN(mask + 1, 1 << IO_TLB_SHIFT) >> IO_TLB_SHIFT
399 : 1UL << (BITS_PER_LONG - IO_TLB_SHIFT);
402 * For mappings greater than a page, we limit the stride (and
403 * hence alignment) to a page size.
405 nslots = ALIGN(size, 1 << IO_TLB_SHIFT) >> IO_TLB_SHIFT;
406 if (size > PAGE_SIZE)
407 stride = (1 << (PAGE_SHIFT - IO_TLB_SHIFT));
414 * Find suitable number of IO TLB entries size that will fit this
415 * request and allocate a buffer from that IO TLB pool.
417 spin_lock_irqsave(&io_tlb_lock, flags);
418 index = ALIGN(io_tlb_index, stride);
419 if (index >= io_tlb_nslabs)
424 while (iommu_is_span_boundary(index, nslots, offset_slots,
427 if (index >= io_tlb_nslabs)
434 * If we find a slot that indicates we have 'nslots' number of
435 * contiguous buffers, we allocate the buffers from that slot
436 * and mark the entries as '0' indicating unavailable.
438 if (io_tlb_list[index] >= nslots) {
441 for (i = index; i < (int) (index + nslots); i++)
443 for (i = index - 1; (OFFSET(i, IO_TLB_SEGSIZE) != IO_TLB_SEGSIZE - 1) && io_tlb_list[i]; i--)
444 io_tlb_list[i] = ++count;
445 dma_addr = io_tlb_start + (index << IO_TLB_SHIFT);
448 * Update the indices to avoid searching in the next
451 io_tlb_index = ((index + nslots) < io_tlb_nslabs
452 ? (index + nslots) : 0);
457 if (index >= io_tlb_nslabs)
459 } while (index != wrap);
462 spin_unlock_irqrestore(&io_tlb_lock, flags);
465 spin_unlock_irqrestore(&io_tlb_lock, flags);
468 * Save away the mapping from the original address to the DMA address.
469 * This is needed when we sync the memory. Then we sync the buffer if
472 for (i = 0; i < nslots; i++)
473 io_tlb_orig_addr[index+i] = phys + (i << IO_TLB_SHIFT);
474 if (dir == DMA_TO_DEVICE || dir == DMA_BIDIRECTIONAL)
475 swiotlb_bounce(phys, dma_addr, size, DMA_TO_DEVICE);
481 * Allocates bounce buffer and returns its kernel virtual address.
485 map_single(struct device *hwdev, phys_addr_t phys, size_t size,
486 enum dma_data_direction dir)
488 dma_addr_t start_dma_addr = swiotlb_virt_to_bus(hwdev, io_tlb_start);
490 return swiotlb_tbl_map_single(hwdev, start_dma_addr, phys, size, dir);
494 * dma_addr is the kernel virtual address of the bounce buffer to unmap.
497 swiotlb_tbl_unmap_single(struct device *hwdev, char *dma_addr, size_t size,
498 enum dma_data_direction dir)
501 int i, count, nslots = ALIGN(size, 1 << IO_TLB_SHIFT) >> IO_TLB_SHIFT;
502 int index = (dma_addr - io_tlb_start) >> IO_TLB_SHIFT;
503 phys_addr_t phys = io_tlb_orig_addr[index];
506 * First, sync the memory before unmapping the entry
508 if (phys && ((dir == DMA_FROM_DEVICE) || (dir == DMA_BIDIRECTIONAL)))
509 swiotlb_bounce(phys, dma_addr, size, DMA_FROM_DEVICE);
512 * Return the buffer to the free list by setting the corresponding
513 * entries to indicate the number of contiguous entries available.
514 * While returning the entries to the free list, we merge the entries
515 * with slots below and above the pool being returned.
517 spin_lock_irqsave(&io_tlb_lock, flags);
519 count = ((index + nslots) < ALIGN(index + 1, IO_TLB_SEGSIZE) ?
520 io_tlb_list[index + nslots] : 0);
522 * Step 1: return the slots to the free list, merging the
523 * slots with superceeding slots
525 for (i = index + nslots - 1; i >= index; i--)
526 io_tlb_list[i] = ++count;
528 * Step 2: merge the returned slots with the preceding slots,
529 * if available (non zero)
531 for (i = index - 1; (OFFSET(i, IO_TLB_SEGSIZE) != IO_TLB_SEGSIZE -1) && io_tlb_list[i]; i--)
532 io_tlb_list[i] = ++count;
534 spin_unlock_irqrestore(&io_tlb_lock, flags);
538 swiotlb_tbl_sync_single(struct device *hwdev, char *dma_addr, size_t size,
539 enum dma_data_direction dir, int target)
541 int index = (dma_addr - io_tlb_start) >> IO_TLB_SHIFT;
542 phys_addr_t phys = io_tlb_orig_addr[index];
544 phys += ((unsigned long)dma_addr & ((1 << IO_TLB_SHIFT) - 1));
548 if (likely(dir == DMA_FROM_DEVICE || dir == DMA_BIDIRECTIONAL))
549 swiotlb_bounce(phys, dma_addr, size, DMA_FROM_DEVICE);
551 BUG_ON(dir != DMA_TO_DEVICE);
553 case SYNC_FOR_DEVICE:
554 if (likely(dir == DMA_TO_DEVICE || dir == DMA_BIDIRECTIONAL))
555 swiotlb_bounce(phys, dma_addr, size, DMA_TO_DEVICE);
557 BUG_ON(dir != DMA_FROM_DEVICE);
565 swiotlb_alloc_coherent(struct device *hwdev, size_t size,
566 dma_addr_t *dma_handle, gfp_t flags)
570 int order = get_order(size);
571 u64 dma_mask = DMA_BIT_MASK(32);
573 if (hwdev && hwdev->coherent_dma_mask)
574 dma_mask = hwdev->coherent_dma_mask;
576 ret = (void *)__get_free_pages(flags, order);
577 if (ret && swiotlb_virt_to_bus(hwdev, ret) + size - 1 > dma_mask) {
579 * The allocated memory isn't reachable by the device.
581 free_pages((unsigned long) ret, order);
586 * We are either out of memory or the device can't DMA to
587 * GFP_DMA memory; fall back on map_single(), which
588 * will grab memory from the lowest available address range.
590 ret = map_single(hwdev, 0, size, DMA_FROM_DEVICE);
595 memset(ret, 0, size);
596 dev_addr = swiotlb_virt_to_bus(hwdev, ret);
598 /* Confirm address can be DMA'd by device */
599 if (dev_addr + size - 1 > dma_mask) {
600 printk("hwdev DMA mask = 0x%016Lx, dev_addr = 0x%016Lx\n",
601 (unsigned long long)dma_mask,
602 (unsigned long long)dev_addr);
604 /* DMA_TO_DEVICE to avoid memcpy in unmap_single */
605 swiotlb_tbl_unmap_single(hwdev, ret, size, DMA_TO_DEVICE);
608 *dma_handle = dev_addr;
611 EXPORT_SYMBOL(swiotlb_alloc_coherent);
614 swiotlb_free_coherent(struct device *hwdev, size_t size, void *vaddr,
617 phys_addr_t paddr = dma_to_phys(hwdev, dev_addr);
619 WARN_ON(irqs_disabled());
620 if (!is_swiotlb_buffer(paddr))
621 free_pages((unsigned long)vaddr, get_order(size));
623 /* DMA_TO_DEVICE to avoid memcpy in swiotlb_tbl_unmap_single */
624 swiotlb_tbl_unmap_single(hwdev, vaddr, size, DMA_TO_DEVICE);
626 EXPORT_SYMBOL(swiotlb_free_coherent);
629 swiotlb_full(struct device *dev, size_t size, enum dma_data_direction dir,
633 * Ran out of IOMMU space for this operation. This is very bad.
634 * Unfortunately the drivers cannot handle this operation properly.
635 * unless they check for dma_mapping_error (most don't)
636 * When the mapping is small enough return a static buffer to limit
637 * the damage, or panic when the transfer is too big.
639 printk(KERN_ERR "DMA: Out of SW-IOMMU space for %zu bytes at "
640 "device %s\n", size, dev ? dev_name(dev) : "?");
642 if (size <= io_tlb_overflow || !do_panic)
645 if (dir == DMA_BIDIRECTIONAL)
646 panic("DMA: Random memory could be DMA accessed\n");
647 if (dir == DMA_FROM_DEVICE)
648 panic("DMA: Random memory could be DMA written\n");
649 if (dir == DMA_TO_DEVICE)
650 panic("DMA: Random memory could be DMA read\n");
654 * Map a single buffer of the indicated size for DMA in streaming mode. The
655 * physical address to use is returned.
657 * Once the device is given the dma address, the device owns this memory until
658 * either swiotlb_unmap_page or swiotlb_dma_sync_single is performed.
660 dma_addr_t swiotlb_map_page(struct device *dev, struct page *page,
661 unsigned long offset, size_t size,
662 enum dma_data_direction dir,
663 struct dma_attrs *attrs)
665 phys_addr_t phys = page_to_phys(page) + offset;
666 dma_addr_t dev_addr = phys_to_dma(dev, phys);
669 BUG_ON(dir == DMA_NONE);
671 * If the address happens to be in the device's DMA window,
672 * we can safely return the device addr and not worry about bounce
675 if (dma_capable(dev, dev_addr, size) && !swiotlb_force)
679 * Oh well, have to allocate and map a bounce buffer.
681 map = map_single(dev, phys, size, dir);
683 swiotlb_full(dev, size, dir, 1);
684 map = io_tlb_overflow_buffer;
687 dev_addr = swiotlb_virt_to_bus(dev, map);
690 * Ensure that the address returned is DMA'ble
692 if (!dma_capable(dev, dev_addr, size))
693 panic("map_single: bounce buffer is not DMA'ble");
697 EXPORT_SYMBOL_GPL(swiotlb_map_page);
700 * Unmap a single streaming mode DMA translation. The dma_addr and size must
701 * match what was provided for in a previous swiotlb_map_page call. All
702 * other usages are undefined.
704 * After this call, reads by the cpu to the buffer are guaranteed to see
705 * whatever the device wrote there.
707 static void unmap_single(struct device *hwdev, dma_addr_t dev_addr,
708 size_t size, enum dma_data_direction dir)
710 phys_addr_t paddr = dma_to_phys(hwdev, dev_addr);
712 BUG_ON(dir == DMA_NONE);
714 if (is_swiotlb_buffer(paddr)) {
715 swiotlb_tbl_unmap_single(hwdev, phys_to_virt(paddr), size, dir);
719 if (dir != DMA_FROM_DEVICE)
723 * phys_to_virt doesn't work with hihgmem page but we could
724 * call dma_mark_clean() with hihgmem page here. However, we
725 * are fine since dma_mark_clean() is null on POWERPC. We can
726 * make dma_mark_clean() take a physical address if necessary.
728 dma_mark_clean(phys_to_virt(paddr), size);
731 void swiotlb_unmap_page(struct device *hwdev, dma_addr_t dev_addr,
732 size_t size, enum dma_data_direction dir,
733 struct dma_attrs *attrs)
735 unmap_single(hwdev, dev_addr, size, dir);
737 EXPORT_SYMBOL_GPL(swiotlb_unmap_page);
740 * Make physical memory consistent for a single streaming mode DMA translation
743 * If you perform a swiotlb_map_page() but wish to interrogate the buffer
744 * using the cpu, yet do not wish to teardown the dma mapping, you must
745 * call this function before doing so. At the next point you give the dma
746 * address back to the card, you must first perform a
747 * swiotlb_dma_sync_for_device, and then the device again owns the buffer
750 swiotlb_sync_single(struct device *hwdev, dma_addr_t dev_addr,
751 size_t size, enum dma_data_direction dir, int target)
753 phys_addr_t paddr = dma_to_phys(hwdev, dev_addr);
755 BUG_ON(dir == DMA_NONE);
757 if (is_swiotlb_buffer(paddr)) {
758 swiotlb_tbl_sync_single(hwdev, phys_to_virt(paddr), size, dir,
763 if (dir != DMA_FROM_DEVICE)
766 dma_mark_clean(phys_to_virt(paddr), size);
770 swiotlb_sync_single_for_cpu(struct device *hwdev, dma_addr_t dev_addr,
771 size_t size, enum dma_data_direction dir)
773 swiotlb_sync_single(hwdev, dev_addr, size, dir, SYNC_FOR_CPU);
775 EXPORT_SYMBOL(swiotlb_sync_single_for_cpu);
778 swiotlb_sync_single_for_device(struct device *hwdev, dma_addr_t dev_addr,
779 size_t size, enum dma_data_direction dir)
781 swiotlb_sync_single(hwdev, dev_addr, size, dir, SYNC_FOR_DEVICE);
783 EXPORT_SYMBOL(swiotlb_sync_single_for_device);
786 * Map a set of buffers described by scatterlist in streaming mode for DMA.
787 * This is the scatter-gather version of the above swiotlb_map_page
788 * interface. Here the scatter gather list elements are each tagged with the
789 * appropriate dma address and length. They are obtained via
790 * sg_dma_{address,length}(SG).
792 * NOTE: An implementation may be able to use a smaller number of
793 * DMA address/length pairs than there are SG table elements.
794 * (for example via virtual mapping capabilities)
795 * The routine returns the number of addr/length pairs actually
796 * used, at most nents.
798 * Device ownership issues as mentioned above for swiotlb_map_page are the
802 swiotlb_map_sg_attrs(struct device *hwdev, struct scatterlist *sgl, int nelems,
803 enum dma_data_direction dir, struct dma_attrs *attrs)
805 struct scatterlist *sg;
808 BUG_ON(dir == DMA_NONE);
810 for_each_sg(sgl, sg, nelems, i) {
811 phys_addr_t paddr = sg_phys(sg);
812 dma_addr_t dev_addr = phys_to_dma(hwdev, paddr);
815 !dma_capable(hwdev, dev_addr, sg->length)) {
816 void *map = map_single(hwdev, sg_phys(sg),
819 /* Don't panic here, we expect map_sg users
820 to do proper error handling. */
821 swiotlb_full(hwdev, sg->length, dir, 0);
822 swiotlb_unmap_sg_attrs(hwdev, sgl, i, dir,
824 sgl[0].dma_length = 0;
827 sg->dma_address = swiotlb_virt_to_bus(hwdev, map);
829 sg->dma_address = dev_addr;
830 sg->dma_length = sg->length;
834 EXPORT_SYMBOL(swiotlb_map_sg_attrs);
837 swiotlb_map_sg(struct device *hwdev, struct scatterlist *sgl, int nelems,
838 enum dma_data_direction dir)
840 return swiotlb_map_sg_attrs(hwdev, sgl, nelems, dir, NULL);
842 EXPORT_SYMBOL(swiotlb_map_sg);
845 * Unmap a set of streaming mode DMA translations. Again, cpu read rules
846 * concerning calls here are the same as for swiotlb_unmap_page() above.
849 swiotlb_unmap_sg_attrs(struct device *hwdev, struct scatterlist *sgl,
850 int nelems, enum dma_data_direction dir, struct dma_attrs *attrs)
852 struct scatterlist *sg;
855 BUG_ON(dir == DMA_NONE);
857 for_each_sg(sgl, sg, nelems, i)
858 unmap_single(hwdev, sg->dma_address, sg->dma_length, dir);
861 EXPORT_SYMBOL(swiotlb_unmap_sg_attrs);
864 swiotlb_unmap_sg(struct device *hwdev, struct scatterlist *sgl, int nelems,
865 enum dma_data_direction dir)
867 return swiotlb_unmap_sg_attrs(hwdev, sgl, nelems, dir, NULL);
869 EXPORT_SYMBOL(swiotlb_unmap_sg);
872 * Make physical memory consistent for a set of streaming mode DMA translations
875 * The same as swiotlb_sync_single_* but for a scatter-gather list, same rules
879 swiotlb_sync_sg(struct device *hwdev, struct scatterlist *sgl,
880 int nelems, enum dma_data_direction dir, int target)
882 struct scatterlist *sg;
885 for_each_sg(sgl, sg, nelems, i)
886 swiotlb_sync_single(hwdev, sg->dma_address,
887 sg->dma_length, dir, target);
891 swiotlb_sync_sg_for_cpu(struct device *hwdev, struct scatterlist *sg,
892 int nelems, enum dma_data_direction dir)
894 swiotlb_sync_sg(hwdev, sg, nelems, dir, SYNC_FOR_CPU);
896 EXPORT_SYMBOL(swiotlb_sync_sg_for_cpu);
899 swiotlb_sync_sg_for_device(struct device *hwdev, struct scatterlist *sg,
900 int nelems, enum dma_data_direction dir)
902 swiotlb_sync_sg(hwdev, sg, nelems, dir, SYNC_FOR_DEVICE);
904 EXPORT_SYMBOL(swiotlb_sync_sg_for_device);
907 swiotlb_dma_mapping_error(struct device *hwdev, dma_addr_t dma_addr)
909 return (dma_addr == swiotlb_virt_to_bus(hwdev, io_tlb_overflow_buffer));
911 EXPORT_SYMBOL(swiotlb_dma_mapping_error);
914 * Return whether the given device DMA address mask can be supported
915 * properly. For example, if your device can only drive the low 24-bits
916 * during bus mastering, then you would pass 0x00ffffff as the mask to
920 swiotlb_dma_supported(struct device *hwdev, u64 mask)
922 return swiotlb_virt_to_bus(hwdev, io_tlb_end - 1) <= mask;
924 EXPORT_SYMBOL(swiotlb_dma_supported);